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ice: Remove direct write for GLLAN_RCTL_0

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Clear PXE mode AQ call (opcode 0x0110) is now supported in FW. So
remove the direct register write to GLLAN_RCTL_0.

Signed-off-by: Anirudh Venkataramanan <anirudh.venkataramanan@intel.com>
Tested-by: Andrew Bowers <andrewx.bowers@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
This commit is contained in:
Anirudh Venkataramanan 2019-04-16 10:30:38 -07:00 committed by Jeff Kirsher
parent 95f8e8b931
commit 588d511f89
1 changed files with 0 additions and 3 deletions
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3
drivers/net/ethernet/intel/ice/ice_common.c
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@ -51,9 +51,6 @@ static enum ice_status ice_set_mac_type(struct ice_hw *hw)
*/
void ice_dev_onetime_setup(struct ice_hw *hw)
{
/* configure Rx - set non pxe mode */
wr32(hw, GLLAN_RCTL_0, 0x1);
#define MBX_PF_VT_PFALLOC 0x00231E80
/* set VFs per PF */
wr32(hw, MBX_PF_VT_PFALLOC, rd32(hw, PF_VT_PFALLOC_HIF));