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[media] s5p-mfc: Rename BANK1/2 to BANK_L/R to better match documentation

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Documentation for MFC hardware still uses 'left' and 'right' names for
the memory channel/banks, so replace BANK1/2 defines with more appropriate
BANK_L/R names.

Suggested-by: Shuah Khan <shuahkhan@gmail.com>
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>
This commit is contained in:
Marek Szyprowski 2017-03-20 07:49:24 -03:00 committed by Mauro Carvalho Chehab
parent 60641e2259
commit 5ea289febd
7 changed files with 62 additions and 61 deletions
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54
drivers/media/platform/s5p-mfc/s5p_mfc.c
View File

@ -1118,34 +1118,34 @@ static int s5p_mfc_configure_2port_memory(struct s5p_mfc_dev *mfc_dev)
* Create and initialize virtual devices for accessing
* reserved memory regions.
*/
mfc_dev->mem_dev[BANK1_CTX] = s5p_mfc_alloc_memdev(dev, "left",
BANK1_CTX);
if (!mfc_dev->mem_dev[BANK1_CTX])
mfc_dev->mem_dev[BANK_L_CTX] = s5p_mfc_alloc_memdev(dev, "left",
BANK_L_CTX);
if (!mfc_dev->mem_dev[BANK_L_CTX])
return -ENODEV;
mfc_dev->mem_dev[BANK2_CTX] = s5p_mfc_alloc_memdev(dev, "right",
BANK2_CTX);
if (!mfc_dev->mem_dev[BANK2_CTX]) {
device_unregister(mfc_dev->mem_dev[BANK1_CTX]);
mfc_dev->mem_dev[BANK_R_CTX] = s5p_mfc_alloc_memdev(dev, "right",
BANK_R_CTX);
if (!mfc_dev->mem_dev[BANK_R_CTX]) {
device_unregister(mfc_dev->mem_dev[BANK_L_CTX]);
return -ENODEV;
}
/* Allocate memory for firmware and initialize both banks addresses */
ret = s5p_mfc_alloc_firmware(mfc_dev);
if (ret) {
device_unregister(mfc_dev->mem_dev[BANK2_CTX]);
device_unregister(mfc_dev->mem_dev[BANK1_CTX]);
device_unregister(mfc_dev->mem_dev[BANK_R_CTX]);
device_unregister(mfc_dev->mem_dev[BANK_L_CTX]);
return ret;
}
mfc_dev->dma_base[BANK1_CTX] = mfc_dev->fw_buf.dma;
mfc_dev->dma_base[BANK_L_CTX] = mfc_dev->fw_buf.dma;
bank2_virt = dma_alloc_coherent(mfc_dev->mem_dev[BANK2_CTX], align_size,
&bank2_dma_addr, GFP_KERNEL);
bank2_virt = dma_alloc_coherent(mfc_dev->mem_dev[BANK_R_CTX],
align_size, &bank2_dma_addr, GFP_KERNEL);
if (!bank2_virt) {
mfc_err("Allocating bank2 base failed\n");
s5p_mfc_release_firmware(mfc_dev);
device_unregister(mfc_dev->mem_dev[BANK2_CTX]);
device_unregister(mfc_dev->mem_dev[BANK1_CTX]);
device_unregister(mfc_dev->mem_dev[BANK_R_CTX]);
device_unregister(mfc_dev->mem_dev[BANK_L_CTX]);
return -ENOMEM;
}
@ -1153,14 +1153,14 @@ static int s5p_mfc_configure_2port_memory(struct s5p_mfc_dev *mfc_dev)
* should not have address of bank2 - MFC will treat it as a null frame.
* To avoid such situation we set bank2 address below the pool address.
*/
mfc_dev->dma_base[BANK2_CTX] = bank2_dma_addr - align_size;
mfc_dev->dma_base[BANK_R_CTX] = bank2_dma_addr - align_size;
dma_free_coherent(mfc_dev->mem_dev[BANK2_CTX], align_size, bank2_virt,
dma_free_coherent(mfc_dev->mem_dev[BANK_R_CTX], align_size, bank2_virt,
bank2_dma_addr);
vb2_dma_contig_set_max_seg_size(mfc_dev->mem_dev[BANK1_CTX],
vb2_dma_contig_set_max_seg_size(mfc_dev->mem_dev[BANK_L_CTX],
DMA_BIT_MASK(32));
vb2_dma_contig_set_max_seg_size(mfc_dev->mem_dev[BANK2_CTX],
vb2_dma_contig_set_max_seg_size(mfc_dev->mem_dev[BANK_R_CTX],
DMA_BIT_MASK(32));
return 0;
@ -1168,10 +1168,10 @@ static int s5p_mfc_configure_2port_memory(struct s5p_mfc_dev *mfc_dev)
static void s5p_mfc_unconfigure_2port_memory(struct s5p_mfc_dev *mfc_dev)
{
device_unregister(mfc_dev->mem_dev[BANK1_CTX]);
device_unregister(mfc_dev->mem_dev[BANK2_CTX]);
vb2_dma_contig_clear_max_seg_size(mfc_dev->mem_dev[BANK1_CTX]);
vb2_dma_contig_clear_max_seg_size(mfc_dev->mem_dev[BANK2_CTX]);
device_unregister(mfc_dev->mem_dev[BANK_L_CTX]);
device_unregister(mfc_dev->mem_dev[BANK_R_CTX]);
vb2_dma_contig_clear_max_seg_size(mfc_dev->mem_dev[BANK_L_CTX]);
vb2_dma_contig_clear_max_seg_size(mfc_dev->mem_dev[BANK_R_CTX]);
}
static int s5p_mfc_configure_common_memory(struct s5p_mfc_dev *mfc_dev)
@ -1201,8 +1201,8 @@ static int s5p_mfc_configure_common_memory(struct s5p_mfc_dev *mfc_dev)
return -ENOMEM;
}
mfc_dev->mem_size = mem_size;
mfc_dev->dma_base[BANK1_CTX] = mfc_dev->mem_base;
mfc_dev->dma_base[BANK2_CTX] = mfc_dev->mem_base;
mfc_dev->dma_base[BANK_L_CTX] = mfc_dev->mem_base;
mfc_dev->dma_base[BANK_R_CTX] = mfc_dev->mem_base;
/*
* MFC hardware cannot handle 0 as a base address, so mark first 128K
@ -1212,14 +1212,14 @@ static int s5p_mfc_configure_common_memory(struct s5p_mfc_dev *mfc_dev)
unsigned int offset = 1 << MFC_BASE_ALIGN_ORDER;
bitmap_set(mfc_dev->mem_bitmap, 0, offset >> PAGE_SHIFT);
mfc_dev->dma_base[BANK1_CTX] += offset;
mfc_dev->dma_base[BANK2_CTX] += offset;
mfc_dev->dma_base[BANK_L_CTX] += offset;
mfc_dev->dma_base[BANK_R_CTX] += offset;
}
/* Firmware allocation cannot fail in this case */
s5p_mfc_alloc_firmware(mfc_dev);
mfc_dev->mem_dev[BANK1_CTX] = mfc_dev->mem_dev[BANK2_CTX] = dev;
mfc_dev->mem_dev[BANK_L_CTX] = mfc_dev->mem_dev[BANK_R_CTX] = dev;
vb2_dma_contig_set_max_seg_size(dev, DMA_BIT_MASK(32));
dev_info(dev, "preallocated %ld MiB buffer for the firmware and context buffers\n",

4
drivers/media/platform/s5p-mfc/s5p_mfc_common.h
View File

@ -33,8 +33,8 @@
* while mmaping */
#define DST_QUEUE_OFF_BASE (1 << 30)
#define BANK1_CTX 0
#define BANK2_CTX 1
#define BANK_L_CTX 0
#define BANK_R_CTX 1
#define BANK_CTX_NUM 2
#define MFC_BANK1_ALIGN_ORDER 13

13
drivers/media/platform/s5p-mfc/s5p_mfc_ctrl.c
View File

@ -36,7 +36,7 @@ int s5p_mfc_alloc_firmware(struct s5p_mfc_dev *dev)
return -ENOMEM;
}
err = s5p_mfc_alloc_priv_buf(dev, BANK1_CTX, &dev->fw_buf);
err = s5p_mfc_alloc_priv_buf(dev, BANK_L_CTX, &dev->fw_buf);
if (err) {
mfc_err("Allocating bitprocessor buffer failed\n");
return err;
@ -177,17 +177,18 @@ int s5p_mfc_reset(struct s5p_mfc_dev *dev)
static inline void s5p_mfc_init_memctrl(struct s5p_mfc_dev *dev)
{
if (IS_MFCV6_PLUS(dev)) {
mfc_write(dev, dev->dma_base[BANK1_CTX],
mfc_write(dev, dev->dma_base[BANK_L_CTX],
S5P_FIMV_RISC_BASE_ADDRESS_V6);
mfc_debug(2, "Base Address : %pad\n",
&dev->dma_base[BANK1_CTX]);
&dev->dma_base[BANK_L_CTX]);
} else {
mfc_write(dev, dev->dma_base[BANK1_CTX],
mfc_write(dev, dev->dma_base[BANK_L_CTX],
S5P_FIMV_MC_DRAMBASE_ADR_A);
mfc_write(dev, dev->dma_base[BANK2_CTX],
mfc_write(dev, dev->dma_base[BANK_R_CTX],
S5P_FIMV_MC_DRAMBASE_ADR_B);
mfc_debug(2, "Bank1: %pad, Bank2: %pad\n",
&dev->dma_base[BANK1_CTX], &dev->dma_base[BANK2_CTX]);
&dev->dma_base[BANK_L_CTX],
&dev->dma_base[BANK_R_CTX]);
}
}

8
drivers/media/platform/s5p-mfc/s5p_mfc_dec.c
View File

@ -931,14 +931,14 @@ static int s5p_mfc_queue_setup(struct vb2_queue *vq,
psize[1] = ctx->chroma_size;
if (IS_MFCV6_PLUS(dev))
alloc_devs[0] = ctx->dev->mem_dev[BANK1_CTX];
alloc_devs[0] = ctx->dev->mem_dev[BANK_L_CTX];
else
alloc_devs[0] = ctx->dev->mem_dev[BANK2_CTX];
alloc_devs[1] = ctx->dev->mem_dev[BANK1_CTX];
alloc_devs[0] = ctx->dev->mem_dev[BANK_R_CTX];
alloc_devs[1] = ctx->dev->mem_dev[BANK_L_CTX];
} else if (vq->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE &&
ctx->state == MFCINST_INIT) {
psize[0] = ctx->dec_src_buf_size;
alloc_devs[0] = ctx->dev->mem_dev[BANK1_CTX];
alloc_devs[0] = ctx->dev->mem_dev[BANK_L_CTX];
} else {
mfc_err("This video node is dedicated to decoding. Decoding not initialized\n");
return -EINVAL;

10
drivers/media/platform/s5p-mfc/s5p_mfc_enc.c
View File

@ -1832,7 +1832,7 @@ static int s5p_mfc_queue_setup(struct vb2_queue *vq,
if (*buf_count > MFC_MAX_BUFFERS)
*buf_count = MFC_MAX_BUFFERS;
psize[0] = ctx->enc_dst_buf_size;
alloc_devs[0] = ctx->dev->mem_dev[BANK1_CTX];
alloc_devs[0] = ctx->dev->mem_dev[BANK_L_CTX];
} else if (vq->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) {
if (ctx->src_fmt)
*plane_count = ctx->src_fmt->num_planes;
@ -1848,11 +1848,11 @@ static int s5p_mfc_queue_setup(struct vb2_queue *vq,
psize[1] = ctx->chroma_size;
if (IS_MFCV6_PLUS(dev)) {
alloc_devs[0] = ctx->dev->mem_dev[BANK1_CTX];
alloc_devs[1] = ctx->dev->mem_dev[BANK1_CTX];
alloc_devs[0] = ctx->dev->mem_dev[BANK_L_CTX];
alloc_devs[1] = ctx->dev->mem_dev[BANK_L_CTX];
} else {
alloc_devs[0] = ctx->dev->mem_dev[BANK2_CTX];
alloc_devs[1] = ctx->dev->mem_dev[BANK2_CTX];
alloc_devs[0] = ctx->dev->mem_dev[BANK_R_CTX];
alloc_devs[1] = ctx->dev->mem_dev[BANK_R_CTX];
}
} else {
mfc_err("invalid queue type: %d\n", vq->type);

28
drivers/media/platform/s5p-mfc/s5p_mfc_opr_v5.c
View File

@ -30,8 +30,8 @@
#include <linux/mm.h>
#include <linux/sched.h>
#define OFFSETA(x) (((x) - dev->dma_base[BANK1_CTX]) >> MFC_OFFSET_SHIFT)
#define OFFSETB(x) (((x) - dev->dma_base[BANK2_CTX]) >> MFC_OFFSET_SHIFT)
#define OFFSETA(x) (((x) - dev->dma_base[BANK_L_CTX]) >> MFC_OFFSET_SHIFT)
#define OFFSETB(x) (((x) - dev->dma_base[BANK_R_CTX]) >> MFC_OFFSET_SHIFT)
/* Allocate temporary buffers for decoding */
static int s5p_mfc_alloc_dec_temp_buffers_v5(struct s5p_mfc_ctx *ctx)
@ -41,7 +41,7 @@ static int s5p_mfc_alloc_dec_temp_buffers_v5(struct s5p_mfc_ctx *ctx)
int ret;
ctx->dsc.size = buf_size->dsc;
ret = s5p_mfc_alloc_priv_buf(dev, BANK1_CTX, &ctx->dsc);
ret = s5p_mfc_alloc_priv_buf(dev, BANK_L_CTX, &ctx->dsc);
if (ret) {
mfc_err("Failed to allocate temporary buffer\n");
return ret;
@ -172,7 +172,7 @@ static int s5p_mfc_alloc_codec_buffers_v5(struct s5p_mfc_ctx *ctx)
/* Allocate only if memory from bank 1 is necessary */
if (ctx->bank1.size > 0) {
ret = s5p_mfc_alloc_priv_buf(dev, BANK1_CTX, &ctx->bank1);
ret = s5p_mfc_alloc_priv_buf(dev, BANK_L_CTX, &ctx->bank1);
if (ret) {
mfc_err("Failed to allocate Bank1 temporary buffer\n");
return ret;
@ -181,7 +181,7 @@ static int s5p_mfc_alloc_codec_buffers_v5(struct s5p_mfc_ctx *ctx)
}
/* Allocate only if memory from bank 2 is necessary */
if (ctx->bank2.size > 0) {
ret = s5p_mfc_alloc_priv_buf(dev, BANK2_CTX, &ctx->bank2);
ret = s5p_mfc_alloc_priv_buf(dev, BANK_R_CTX, &ctx->bank2);
if (ret) {
mfc_err("Failed to allocate Bank2 temporary buffer\n");
s5p_mfc_release_priv_buf(ctx->dev, &ctx->bank1);
@ -212,7 +212,7 @@ static int s5p_mfc_alloc_instance_buffer_v5(struct s5p_mfc_ctx *ctx)
else
ctx->ctx.size = buf_size->non_h264_ctx;
ret = s5p_mfc_alloc_priv_buf(dev, BANK1_CTX, &ctx->ctx);
ret = s5p_mfc_alloc_priv_buf(dev, BANK_L_CTX, &ctx->ctx);
if (ret) {
mfc_err("Failed to allocate instance buffer\n");
return ret;
@ -225,7 +225,7 @@ static int s5p_mfc_alloc_instance_buffer_v5(struct s5p_mfc_ctx *ctx)
/* Initialize shared memory */
ctx->shm.size = buf_size->shm;
ret = s5p_mfc_alloc_priv_buf(dev, BANK1_CTX, &ctx->shm);
ret = s5p_mfc_alloc_priv_buf(dev, BANK_L_CTX, &ctx->shm);
if (ret) {
mfc_err("Failed to allocate shared memory buffer\n");
s5p_mfc_release_priv_buf(dev, &ctx->ctx);
@ -233,7 +233,7 @@ static int s5p_mfc_alloc_instance_buffer_v5(struct s5p_mfc_ctx *ctx)
}
/* shared memory offset only keeps the offset from base (port a) */
ctx->shm.ofs = ctx->shm.dma - dev->dma_base[BANK1_CTX];
ctx->shm.ofs = ctx->shm.dma - dev->dma_base[BANK_L_CTX];
BUG_ON(ctx->shm.ofs & ((1 << MFC_BANK1_ALIGN_ORDER) - 1));
memset(ctx->shm.virt, 0, buf_size->shm);
@ -532,9 +532,9 @@ static void s5p_mfc_get_enc_frame_buffer_v5(struct s5p_mfc_ctx *ctx,
{
struct s5p_mfc_dev *dev = ctx->dev;
*y_addr = dev->dma_base[BANK2_CTX] +
*y_addr = dev->dma_base[BANK_R_CTX] +
(mfc_read(dev, S5P_FIMV_ENCODED_Y_ADDR) << MFC_OFFSET_SHIFT);
*c_addr = dev->dma_base[BANK2_CTX] +
*c_addr = dev->dma_base[BANK_R_CTX] +
(mfc_read(dev, S5P_FIMV_ENCODED_C_ADDR) << MFC_OFFSET_SHIFT);
}
@ -1212,8 +1212,8 @@ static int s5p_mfc_run_enc_frame(struct s5p_mfc_ctx *ctx)
}
if (list_empty(&ctx->src_queue)) {
/* send null frame */
s5p_mfc_set_enc_frame_buffer_v5(ctx, dev->dma_base[BANK2_CTX],
dev->dma_base[BANK2_CTX]);
s5p_mfc_set_enc_frame_buffer_v5(ctx, dev->dma_base[BANK_R_CTX],
dev->dma_base[BANK_R_CTX]);
src_mb = NULL;
} else {
src_mb = list_entry(ctx->src_queue.next, struct s5p_mfc_buf,
@ -1222,8 +1222,8 @@ static int s5p_mfc_run_enc_frame(struct s5p_mfc_ctx *ctx)
if (src_mb->b->vb2_buf.planes[0].bytesused == 0) {
/* send null frame */
s5p_mfc_set_enc_frame_buffer_v5(ctx,
dev->dma_base[BANK2_CTX],
dev->dma_base[BANK2_CTX]);
dev->dma_base[BANK_R_CTX],
dev->dma_base[BANK_R_CTX]);
ctx->state = MFCINST_FINISHING;
} else {
src_y_addr = vb2_dma_contig_plane_dma_addr(

6
drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c
View File

@ -239,7 +239,7 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx)
/* Allocate only if memory from bank 1 is necessary */
if (ctx->bank1.size > 0) {
ret = s5p_mfc_alloc_priv_buf(dev, BANK1_CTX, &ctx->bank1);
ret = s5p_mfc_alloc_priv_buf(dev, BANK_L_CTX, &ctx->bank1);
if (ret) {
mfc_err("Failed to allocate Bank1 memory\n");
return ret;
@ -291,7 +291,7 @@ static int s5p_mfc_alloc_instance_buffer_v6(struct s5p_mfc_ctx *ctx)
break;
}
ret = s5p_mfc_alloc_priv_buf(dev, BANK1_CTX, &ctx->ctx);
ret = s5p_mfc_alloc_priv_buf(dev, BANK_L_CTX, &ctx->ctx);
if (ret) {
mfc_err("Failed to allocate instance buffer\n");
return ret;
@ -320,7 +320,7 @@ static int s5p_mfc_alloc_dev_context_buffer_v6(struct s5p_mfc_dev *dev)
mfc_debug_enter();
dev->ctx_buf.size = buf_size->dev_ctx;
ret = s5p_mfc_alloc_priv_buf(dev, BANK1_CTX, &dev->ctx_buf);
ret = s5p_mfc_alloc_priv_buf(dev, BANK_L_CTX, &dev->ctx_buf);
if (ret) {
mfc_err("Failed to allocate device context buffer\n");
return ret;