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ARM: 9356/2: Move asm statements accessing TTBCR into C functions
This patch implements cpu_get_ttbcr() and cpu_set_ttbcr() and replaces the corresponding asm statements. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Reviewed-by: Kees Cook <keescook@chromium.org> Tested-by: Florian Fainelli <florian.fainelli@broadcom.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
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@ -178,6 +178,18 @@ extern void cpu_resume(void);
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})
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#endif
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static inline unsigned int cpu_get_ttbcr(void)
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{
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unsigned int ttbcr;
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asm("mrc p15, 0, %0, c2, c0, 2" : "=r" (ttbcr));
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return ttbcr;
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}
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static inline void cpu_set_ttbcr(unsigned int ttbcr)
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{
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asm("mcr p15, 0, %0, c2, c0, 2" : : "r" (ttbcr));
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}
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#else /*!CONFIG_MMU */
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#define cpu_switch_mm(pgd,mm) { }
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@ -1687,9 +1687,8 @@ static void __init early_paging_init(const struct machine_desc *mdesc)
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*/
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cr = get_cr();
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set_cr(cr & ~(CR_I | CR_C));
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asm("mrc p15, 0, %0, c2, c0, 2" : "=r" (ttbcr));
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asm volatile("mcr p15, 0, %0, c2, c0, 2"
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: : "r" (ttbcr & ~(3 << 8 | 3 << 10)));
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ttbcr = cpu_get_ttbcr();
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cpu_set_ttbcr(ttbcr & ~(3 << 8 | 3 << 10));
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flush_cache_all();
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/*
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@ -1701,7 +1700,7 @@ static void __init early_paging_init(const struct machine_desc *mdesc)
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lpae_pgtables_remap(offset, pa_pgd);
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/* Re-enable the caches and cacheable TLB walks */
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asm volatile("mcr p15, 0, %0, c2, c0, 2" : : "r" (ttbcr));
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cpu_set_ttbcr(ttbcr);
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set_cr(cr);
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}
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