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x86, amd: Use _safe() msr access for GartTlbWlk disable code

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commit d47cc0db8f upstream.

The workaround for Bugzilla:

	https://bugzilla.kernel.org/show_bug.cgi?id=33012

introduced a read and a write to the MC4 mask msr.

Unfortunatly this MSR is not emulated by the KVM hypervisor
so that the kernel will get a #GP and crashes when applying
this workaround when running inside KVM.

This issue was reported as:

	https://bugzilla.kernel.org/show_bug.cgi?id=35132

and is fixed with this patch. The change just let the kernel
ignore any #GP it gets while accessing this MSR by using the
_safe msr access methods.

Reported-by: Török Edwin <edwintorok@gmail.com>
Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
Cc: Rafael J. Wysocki <rjw@sisk.pl>
Cc: Maciej Rutecki <maciej.rutecki@gmail.com>
Cc: Avi Kivity <avi@redhat.com>
Cc: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
This commit is contained in:
Roedel, Joerg 2011-05-19 11:13:39 +02:00 committed by Greg Kroah-Hartman
parent 936107f142
commit 6935afd49d
1 changed files with 6 additions and 3 deletions
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9
arch/x86/kernel/cpu/amd.c
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@ -585,10 +585,13 @@ static void __cpuinit init_amd(struct cpuinfo_x86 *c)
* Fixes: https://bugzilla.kernel.org/show_bug.cgi?id=33012
*/
u64 mask;
int err;
rdmsrl(MSR_AMD64_MCx_MASK(4), mask);
mask |= (1 << 10);
wrmsrl(MSR_AMD64_MCx_MASK(4), mask);
err = rdmsrl_safe(MSR_AMD64_MCx_MASK(4), &mask);
if (err == 0) {
mask |= (1 << 10);
checking_wrmsrl(MSR_AMD64_MCx_MASK(4), mask);
}
}
}