mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
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sound fixes for 6.11-rc6
It became a bit larger collection of fixes than wished at this time, but all changes are small and mostly device-specific fixes that should be fairly safe to apply. Majority of fixes are about ASoC for AMD SOF, Cirrus codecs, lpass, etc, in addition to the usual HD-audio quirks / fixes. -----BEGIN PGP SIGNATURE----- iQJCBAABCAAsFiEEIXTw5fNLNI7mMiVaLtJE4w1nLE8FAmbNkGYOHHRpd2FpQHN1 c2UuZGUACgkQLtJE4w1nLE/yZxAAwFz2l10Kia6qPJuqmlfZU4o6Wwt7x4MPO+hS v0t2P9HqesiFA3ObYpOHYTsR1ufz1Jvh8X99Ie5GinjxOvAO95TAvAL1UVq9zWTw J1pUQ8eFJjRAufAzFFo4Ffn2F5VmYdTK8HYPzy+3+ck5pdFSNcF3x1oc3b6gOb7f xA9I6L6xLQdcKYAOfUFRuh1HvV970vdPNwJnxQXwy4R/UwJWqkkVlnwPmnpiz/Xg 7u95QdtlL8H46AqNgufDBZ0i+1reO3vMaJY5Xrz2c7egxyQqbH4fcHEqgRRVKZ7N WF9Bti8YXcruBB0FLIuNIPs2dRnnYmZy1fZy0gOtJzhIUZI08+zr+gm5BxAat/q2 /ktjPWTc7LGRQLrZ1T9x6zmnJ6Cq8vCF4zyN/bSI7VhWr/KtfyZzu5PKpgx81zS9 r3UP+edaOcf4Xvsg95D6QQxFTkg46kg730jUeKAg47R1dnCqZvZKLkZWS/IusV9u TBnV1JKrgkyJu3a/1RP1hN1eGWaAPm1Z8aI2VorG16/FUNlBkyn6KFiLRJk7phRL RtHN8oZUiyxV+swLprYnZ1e8uYhLEklqQ3HZkchj2DKOj/Oe180udlEQpxAzLnd+ 4G2iY2A/4x2Aab1YgH5xuPoC6sw1l7EJ0lZbxhlE6vHnOBL8+wx0cwnmH51QxftS lk0eCSI= =u+nW -----END PGP SIGNATURE----- Merge tag 'sound-6.11-rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound Pull sound fixes from Takashi Iwai: "It became a bit larger collection of fixes than wished at this time, but all changes are small and mostly device-specific fixes that should be fairly safe to apply. Majority of fixes are about ASoC for AMD SOF, Cirrus codecs, lpass, etc, in addition to the usual HD-audio quirks / fixes" * tag 'sound-6.11-rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound: (22 commits) ALSA: hda: hda_component: Fix mutex crash if nothing ever binds ALSA: hda/realtek: support HP Pavilion Aero 13-bg0xxx Mute LED ALSA: hda/realtek: Fix the speaker output on Samsung Galaxy Book3 Ultra ASoC: cs-amp-lib: Ignore empty UEFI calibration entries ASoC: cs-amp-lib-test: Force test calibration blob entries to be valid ALSA: hda/realtek - FIxed ALC285 headphone no sound ALSA: hda/realtek - Fixed ALC256 headphone no sound ASoC: allow module autoloading for table board_ids ASoC: allow module autoloading for table db1200_pids ALSA: hda: cs35l56: Don't use the device index as a calibration index ALSA: seq: Skip event type filtering for UMP events ALSA: hda/realtek: Enable mute/micmute LEDs on HP Laptop 14-ey0xxx ASoC: SOF: amd: Fix for acp init sequence ASoC: amd: acp: fix module autoloading ASoC: mediatek: mt8188: Mark AFE_DAC_CON0 register as volatile ASoC: codecs: wcd937x: Fix missing de-assert of reset GPIO ASoC: SOF: mediatek: Add missing board compatible ASoC: MAINTAINERS: Drop Banajit Goswami from Qualcomm sound drivers ASoC: SOF: amd: Fix for incorrect acp error register offsets ASoC: SOF: amd: move iram-dram fence register programming sequence ...
This commit is contained in:
commit
6ace1c7ea2
@ -18545,7 +18545,6 @@ F: drivers/crypto/intel/qat/
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QCOM AUDIO (ASoC) DRIVERS
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M: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
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M: Banajit Goswami <bgoswami@quicinc.com>
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L: alsa-devel@alsa-project.org (moderated for non-subscribers)
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L: linux-arm-msm@vger.kernel.org
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S: Supported
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@ -537,6 +537,9 @@ static struct snd_seq_client *get_event_dest_client(struct snd_seq_event *event,
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return NULL;
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if (! dest->accept_input)
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goto __not_avail;
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if (snd_seq_ev_is_ump(event))
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return dest; /* ok - no filter checks */
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if ((dest->filter & SNDRV_SEQ_FILTER_USE_EVENT) &&
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! test_bit(event->type, dest->event_filter))
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goto __not_avail;
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@ -1003,7 +1003,7 @@ int cs35l56_hda_common_probe(struct cs35l56_hda *cs35l56, int hid, int id)
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goto err;
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}
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cs35l56->base.cal_index = cs35l56->index;
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cs35l56->base.cal_index = -1;
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cs35l56_init_cs_dsp(&cs35l56->base, &cs35l56->cs_dsp);
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cs35l56->cs_dsp.client_ops = &cs35l56_hda_client_ops;
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@ -141,8 +141,7 @@ int hda_component_manager_bind(struct hda_codec *cdc,
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int ret;
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/* Init shared and component specific data */
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memset(parent, 0, sizeof(*parent));
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mutex_init(&parent->mutex);
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memset(parent->comps, 0, sizeof(parent->comps));
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parent->codec = cdc;
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mutex_lock(&parent->mutex);
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@ -164,6 +163,8 @@ int hda_component_manager_init(struct hda_codec *cdc,
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struct hda_scodec_match *sm;
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int ret, i;
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mutex_init(&parent->mutex);
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for (i = 0; i < count; i++) {
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sm = devm_kmalloc(dev, sizeof(*sm), GFP_KERNEL);
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if (!sm)
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@ -4930,6 +4930,30 @@ static void alc269_fixup_hp_line1_mic1_led(struct hda_codec *codec,
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}
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}
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static void alc_hp_mute_disable(struct hda_codec *codec, unsigned int delay)
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{
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if (delay <= 0)
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delay = 75;
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snd_hda_codec_write(codec, 0x21, 0,
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AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE);
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msleep(delay);
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snd_hda_codec_write(codec, 0x21, 0,
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AC_VERB_SET_PIN_WIDGET_CONTROL, 0x0);
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msleep(delay);
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}
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static void alc_hp_enable_unmute(struct hda_codec *codec, unsigned int delay)
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{
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if (delay <= 0)
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delay = 75;
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snd_hda_codec_write(codec, 0x21, 0,
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AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT);
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msleep(delay);
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snd_hda_codec_write(codec, 0x21, 0,
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AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE);
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msleep(delay);
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}
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static const struct coef_fw alc225_pre_hsmode[] = {
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UPDATE_COEF(0x4a, 1<<8, 0),
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UPDATE_COEFEX(0x57, 0x05, 1<<14, 0),
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@ -5031,6 +5055,7 @@ static void alc_headset_mode_unplugged(struct hda_codec *codec)
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case 0x10ec0236:
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case 0x10ec0256:
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case 0x19e58326:
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alc_hp_mute_disable(codec, 75);
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alc_process_coef_fw(codec, coef0256);
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break;
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case 0x10ec0234:
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@ -5065,6 +5090,7 @@ static void alc_headset_mode_unplugged(struct hda_codec *codec)
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case 0x10ec0295:
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case 0x10ec0289:
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case 0x10ec0299:
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alc_hp_mute_disable(codec, 75);
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alc_process_coef_fw(codec, alc225_pre_hsmode);
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alc_process_coef_fw(codec, coef0225);
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break;
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@ -5290,6 +5316,7 @@ static void alc_headset_mode_default(struct hda_codec *codec)
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case 0x10ec0299:
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alc_process_coef_fw(codec, alc225_pre_hsmode);
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alc_process_coef_fw(codec, coef0225);
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alc_hp_enable_unmute(codec, 75);
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break;
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case 0x10ec0255:
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alc_process_coef_fw(codec, coef0255);
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@ -5302,6 +5329,7 @@ static void alc_headset_mode_default(struct hda_codec *codec)
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alc_write_coef_idx(codec, 0x45, 0xc089);
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msleep(50);
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alc_process_coef_fw(codec, coef0256);
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alc_hp_enable_unmute(codec, 75);
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break;
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case 0x10ec0234:
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case 0x10ec0274:
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@ -5399,6 +5427,7 @@ static void alc_headset_mode_ctia(struct hda_codec *codec)
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case 0x10ec0256:
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case 0x19e58326:
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alc_process_coef_fw(codec, coef0256);
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alc_hp_enable_unmute(codec, 75);
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break;
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case 0x10ec0234:
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case 0x10ec0274:
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@ -5447,6 +5476,7 @@ static void alc_headset_mode_ctia(struct hda_codec *codec)
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alc_process_coef_fw(codec, coef0225_2);
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else
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alc_process_coef_fw(codec, coef0225_1);
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alc_hp_enable_unmute(codec, 75);
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break;
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case 0x10ec0867:
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alc_update_coefex_idx(codec, 0x57, 0x5, 1<<14, 0);
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@ -5514,6 +5544,7 @@ static void alc_headset_mode_omtp(struct hda_codec *codec)
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case 0x10ec0256:
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case 0x19e58326:
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alc_process_coef_fw(codec, coef0256);
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alc_hp_enable_unmute(codec, 75);
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break;
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case 0x10ec0234:
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case 0x10ec0274:
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@ -5551,6 +5582,7 @@ static void alc_headset_mode_omtp(struct hda_codec *codec)
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case 0x10ec0289:
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case 0x10ec0299:
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alc_process_coef_fw(codec, coef0225);
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alc_hp_enable_unmute(codec, 75);
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break;
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}
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codec_dbg(codec, "Headset jack set to Nokia-style headset mode.\n");
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@ -5619,25 +5651,21 @@ static void alc_determine_headset_type(struct hda_codec *codec)
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alc_write_coef_idx(codec, 0x06, 0x6104);
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alc_write_coefex_idx(codec, 0x57, 0x3, 0x09a3);
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snd_hda_codec_write(codec, 0x21, 0,
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AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE);
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msleep(80);
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snd_hda_codec_write(codec, 0x21, 0,
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AC_VERB_SET_PIN_WIDGET_CONTROL, 0x0);
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alc_process_coef_fw(codec, coef0255);
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msleep(300);
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val = alc_read_coef_idx(codec, 0x46);
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is_ctia = (val & 0x0070) == 0x0070;
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if (!is_ctia) {
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alc_write_coef_idx(codec, 0x45, 0xe089);
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msleep(100);
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val = alc_read_coef_idx(codec, 0x46);
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if ((val & 0x0070) == 0x0070)
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is_ctia = false;
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else
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is_ctia = true;
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}
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alc_write_coefex_idx(codec, 0x57, 0x3, 0x0da3);
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alc_update_coefex_idx(codec, 0x57, 0x5, 1<<14, 0);
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snd_hda_codec_write(codec, 0x21, 0,
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AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT);
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msleep(80);
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snd_hda_codec_write(codec, 0x21, 0,
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AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE);
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break;
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case 0x10ec0234:
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case 0x10ec0274:
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@ -5714,12 +5742,6 @@ static void alc_determine_headset_type(struct hda_codec *codec)
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case 0x10ec0295:
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case 0x10ec0289:
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case 0x10ec0299:
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snd_hda_codec_write(codec, 0x21, 0,
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AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE);
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msleep(80);
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snd_hda_codec_write(codec, 0x21, 0,
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AC_VERB_SET_PIN_WIDGET_CONTROL, 0x0);
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alc_process_coef_fw(codec, alc225_pre_hsmode);
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alc_update_coef_idx(codec, 0x67, 0xf000, 0x1000);
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val = alc_read_coef_idx(codec, 0x45);
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@ -5736,15 +5758,19 @@ static void alc_determine_headset_type(struct hda_codec *codec)
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val = alc_read_coef_idx(codec, 0x46);
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is_ctia = (val & 0x00f0) == 0x00f0;
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}
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if (!is_ctia) {
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alc_update_coef_idx(codec, 0x45, 0x3f<<10, 0x38<<10);
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alc_update_coef_idx(codec, 0x49, 3<<8, 1<<8);
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msleep(100);
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val = alc_read_coef_idx(codec, 0x46);
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if ((val & 0x00f0) == 0x00f0)
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is_ctia = false;
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else
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is_ctia = true;
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}
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alc_update_coef_idx(codec, 0x4a, 7<<6, 7<<6);
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alc_update_coef_idx(codec, 0x4a, 3<<4, 3<<4);
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alc_update_coef_idx(codec, 0x67, 0xf000, 0x3000);
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snd_hda_codec_write(codec, 0x21, 0,
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AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT);
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msleep(80);
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snd_hda_codec_write(codec, 0x21, 0,
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AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE);
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break;
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case 0x10ec0867:
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is_ctia = true;
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@ -10315,6 +10341,7 @@ static const struct snd_pci_quirk alc269_fixup_tbl[] = {
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SND_PCI_QUIRK(0x103c, 0x8c15, "HP Spectre x360 2-in-1 Laptop 14-eu0xxx", ALC245_FIXUP_HP_SPECTRE_X360_EU0XXX),
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SND_PCI_QUIRK(0x103c, 0x8c16, "HP Spectre 16", ALC287_FIXUP_CS35L41_I2C_2),
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SND_PCI_QUIRK(0x103c, 0x8c17, "HP Spectre 16", ALC287_FIXUP_CS35L41_I2C_2),
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SND_PCI_QUIRK(0x103c, 0x8c21, "HP Pavilion Plus Laptop 14-ey0XXX", ALC245_FIXUP_HP_X360_MUTE_LEDS),
|
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SND_PCI_QUIRK(0x103c, 0x8c46, "HP EliteBook 830 G11", ALC245_FIXUP_CS35L41_SPI_2_HP_GPIO_LED),
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SND_PCI_QUIRK(0x103c, 0x8c47, "HP EliteBook 840 G11", ALC245_FIXUP_CS35L41_SPI_2_HP_GPIO_LED),
|
||||
SND_PCI_QUIRK(0x103c, 0x8c48, "HP EliteBook 860 G11", ALC245_FIXUP_CS35L41_SPI_2_HP_GPIO_LED),
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@ -10353,6 +10380,7 @@ static const struct snd_pci_quirk alc269_fixup_tbl[] = {
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SND_PCI_QUIRK(0x103c, 0x8ca2, "HP ZBook Power", ALC236_FIXUP_HP_GPIO_LED),
|
||||
SND_PCI_QUIRK(0x103c, 0x8ca4, "HP ZBook Fury", ALC245_FIXUP_CS35L41_SPI_2_HP_GPIO_LED),
|
||||
SND_PCI_QUIRK(0x103c, 0x8ca7, "HP ZBook Fury", ALC245_FIXUP_CS35L41_SPI_2_HP_GPIO_LED),
|
||||
SND_PCI_QUIRK(0x103c, 0x8cbd, "HP Pavilion Aero Laptop 13-bg0xxx", ALC245_FIXUP_HP_X360_MUTE_LEDS),
|
||||
SND_PCI_QUIRK(0x103c, 0x8cdd, "HP Spectre", ALC287_FIXUP_CS35L41_I2C_2),
|
||||
SND_PCI_QUIRK(0x103c, 0x8cde, "HP Spectre", ALC287_FIXUP_CS35L41_I2C_2),
|
||||
SND_PCI_QUIRK(0x103c, 0x8cdf, "HP SnowWhite", ALC287_FIXUP_CS35L41_I2C_2_HP_GPIO_LED),
|
||||
@ -10513,6 +10541,7 @@ static const struct snd_pci_quirk alc269_fixup_tbl[] = {
|
||||
SND_PCI_QUIRK(0x144d, 0xca03, "Samsung Galaxy Book2 Pro 360 (NP930QED)", ALC298_FIXUP_SAMSUNG_AMP),
|
||||
SND_PCI_QUIRK(0x144d, 0xc868, "Samsung Galaxy Book2 Pro (NP930XED)", ALC298_FIXUP_SAMSUNG_AMP),
|
||||
SND_PCI_QUIRK(0x144d, 0xc1ca, "Samsung Galaxy Book3 Pro 360 (NP960QFG-KB1US)", ALC298_FIXUP_SAMSUNG_AMP2),
|
||||
SND_PCI_QUIRK(0x144d, 0xc1cc, "Samsung Galaxy Book3 Ultra (NT960XFH-XD92G))", ALC298_FIXUP_SAMSUNG_AMP2),
|
||||
SND_PCI_QUIRK(0x1458, 0xfa53, "Gigabyte BXBT-2807", ALC283_FIXUP_HEADSET_MIC),
|
||||
SND_PCI_QUIRK(0x1462, 0xb120, "MSI Cubi MS-B120", ALC283_FIXUP_HEADSET_MIC),
|
||||
SND_PCI_QUIRK(0x1462, 0xb171, "Cubi N 8GL (MS-B171)", ALC283_FIXUP_HEADSET_MIC),
|
||||
|
@ -227,6 +227,8 @@ static const struct platform_device_id board_ids[] = {
|
||||
},
|
||||
{ }
|
||||
};
|
||||
MODULE_DEVICE_TABLE(platform, board_ids);
|
||||
|
||||
static struct platform_driver acp_asoc_audio = {
|
||||
.driver = {
|
||||
.pm = &snd_soc_pm_ops,
|
||||
|
@ -158,6 +158,8 @@ static const struct platform_device_id board_ids[] = {
|
||||
},
|
||||
{ }
|
||||
};
|
||||
MODULE_DEVICE_TABLE(platform, board_ids);
|
||||
|
||||
static struct platform_driver acp_asoc_audio = {
|
||||
.driver = {
|
||||
.name = "sof_mach",
|
||||
|
@ -44,6 +44,7 @@ static const struct platform_device_id db1200_pids[] = {
|
||||
},
|
||||
{},
|
||||
};
|
||||
MODULE_DEVICE_TABLE(platform, db1200_pids);
|
||||
|
||||
/*------------------------- AC97 PART ---------------------------*/
|
||||
|
||||
|
@ -38,6 +38,7 @@ static void cs_amp_lib_test_init_dummy_cal_blob(struct kunit *test, int num_amps
|
||||
{
|
||||
struct cs_amp_lib_test_priv *priv = test->priv;
|
||||
unsigned int blob_size;
|
||||
int i;
|
||||
|
||||
blob_size = offsetof(struct cirrus_amp_efi_data, data) +
|
||||
sizeof(struct cirrus_amp_cal_data) * num_amps;
|
||||
@ -49,6 +50,14 @@ static void cs_amp_lib_test_init_dummy_cal_blob(struct kunit *test, int num_amps
|
||||
priv->cal_blob->count = num_amps;
|
||||
|
||||
get_random_bytes(priv->cal_blob->data, sizeof(struct cirrus_amp_cal_data) * num_amps);
|
||||
|
||||
/* Ensure all timestamps are non-zero to mark the entry valid. */
|
||||
for (i = 0; i < num_amps; i++)
|
||||
priv->cal_blob->data[i].calTime[0] |= 1;
|
||||
|
||||
/* Ensure that all UIDs are non-zero and unique. */
|
||||
for (i = 0; i < num_amps; i++)
|
||||
*(u8 *)&priv->cal_blob->data[i].calTarget[0] = i + 1;
|
||||
}
|
||||
|
||||
static u64 cs_amp_lib_test_get_target_uid(struct kunit *test)
|
||||
|
@ -182,6 +182,10 @@ static int _cs_amp_get_efi_calibration_data(struct device *dev, u64 target_uid,
|
||||
for (i = 0; i < efi_data->count; ++i) {
|
||||
u64 cal_target = cs_amp_cal_target_u64(&efi_data->data[i]);
|
||||
|
||||
/* Skip empty entries */
|
||||
if (!efi_data->data[i].calTime[0] && !efi_data->data[i].calTime[1])
|
||||
continue;
|
||||
|
||||
/* Skip entries with unpopulated silicon ID */
|
||||
if (cal_target == 0)
|
||||
continue;
|
||||
@ -193,7 +197,8 @@ static int _cs_amp_get_efi_calibration_data(struct device *dev, u64 target_uid,
|
||||
}
|
||||
}
|
||||
|
||||
if (!cal && (amp_index >= 0) && (amp_index < efi_data->count)) {
|
||||
if (!cal && (amp_index >= 0) && (amp_index < efi_data->count) &&
|
||||
(efi_data->data[amp_index].calTime[0] || efi_data->data[amp_index].calTime[1])) {
|
||||
u64 cal_target = cs_amp_cal_target_u64(&efi_data->data[amp_index]);
|
||||
|
||||
/*
|
||||
|
@ -49,6 +49,12 @@ static inline void lpass_macro_pds_exit_action(void *pds)
|
||||
static inline const char *lpass_macro_get_codec_version_string(int version)
|
||||
{
|
||||
switch (version) {
|
||||
case LPASS_CODEC_VERSION_1_0:
|
||||
return "v1.0";
|
||||
case LPASS_CODEC_VERSION_1_1:
|
||||
return "v1.1";
|
||||
case LPASS_CODEC_VERSION_1_2:
|
||||
return "v1.2";
|
||||
case LPASS_CODEC_VERSION_2_0:
|
||||
return "v2.0";
|
||||
case LPASS_CODEC_VERSION_2_1:
|
||||
|
@ -1485,6 +1485,10 @@ static void va_macro_set_lpass_codec_version(struct va_macro *va)
|
||||
if ((core_id_0 == 0x02) && (core_id_1 == 0x0F) && (core_id_2 == 0x80 || core_id_2 == 0x81))
|
||||
version = LPASS_CODEC_VERSION_2_8;
|
||||
|
||||
if (version == LPASS_CODEC_VERSION_UNKNOWN)
|
||||
dev_warn(va->dev, "Unknown Codec version, ID: %02x / %02x / %02x\n",
|
||||
core_id_0, core_id_1, core_id_2);
|
||||
|
||||
lpass_macro_set_codec_version(version);
|
||||
|
||||
dev_dbg(va->dev, "LPASS Codec Version %s\n", lpass_macro_get_codec_version_string(version));
|
||||
|
@ -242,10 +242,9 @@ static const struct regmap_irq_chip wcd937x_regmap_irq_chip = {
|
||||
|
||||
static void wcd937x_reset(struct wcd937x_priv *wcd937x)
|
||||
{
|
||||
usleep_range(20, 30);
|
||||
|
||||
gpiod_set_value(wcd937x->reset_gpio, 1);
|
||||
|
||||
usleep_range(20, 30);
|
||||
gpiod_set_value(wcd937x->reset_gpio, 0);
|
||||
usleep_range(20, 30);
|
||||
}
|
||||
|
||||
|
@ -2748,6 +2748,7 @@ static bool mt8188_is_volatile_reg(struct device *dev, unsigned int reg)
|
||||
case AFE_ASRC12_NEW_CON9:
|
||||
case AFE_LRCK_CNT:
|
||||
case AFE_DAC_MON0:
|
||||
case AFE_DAC_CON0:
|
||||
case AFE_DL2_CUR:
|
||||
case AFE_DL3_CUR:
|
||||
case AFE_DL6_CUR:
|
||||
|
@ -76,13 +76,15 @@
|
||||
#define DSP_SW_INTR_CNTL_OFFSET 0x0
|
||||
#define DSP_SW_INTR_STAT_OFFSET 0x4
|
||||
#define DSP_SW_INTR_TRIG_OFFSET 0x8
|
||||
#define ACP_ERROR_STATUS 0x18C4
|
||||
#define ACP3X_ERROR_STATUS 0x18C4
|
||||
#define ACP6X_ERROR_STATUS 0x1A4C
|
||||
#define ACP3X_AXI2DAGB_SEM_0 0x1880
|
||||
#define ACP5X_AXI2DAGB_SEM_0 0x1884
|
||||
#define ACP6X_AXI2DAGB_SEM_0 0x1874
|
||||
|
||||
/* ACP common registers to report errors related to I2S & SoundWire interfaces */
|
||||
#define ACP_SW0_I2S_ERROR_REASON 0x18B4
|
||||
#define ACP3X_SW_I2S_ERROR_REASON 0x18C8
|
||||
#define ACP6X_SW0_I2S_ERROR_REASON 0x18B4
|
||||
#define ACP_SW1_I2S_ERROR_REASON 0x1A50
|
||||
|
||||
/* Registers from ACP_SHA block */
|
||||
|
@ -92,6 +92,7 @@ static int config_dma_channel(struct acp_dev_data *adata, unsigned int ch,
|
||||
unsigned int idx, unsigned int dscr_count)
|
||||
{
|
||||
struct snd_sof_dev *sdev = adata->dev;
|
||||
const struct sof_amd_acp_desc *desc = get_chip_info(sdev->pdata);
|
||||
unsigned int val, status;
|
||||
int ret;
|
||||
|
||||
@ -102,7 +103,7 @@ static int config_dma_channel(struct acp_dev_data *adata, unsigned int ch,
|
||||
val & (1 << ch), ACP_REG_POLL_INTERVAL,
|
||||
ACP_REG_POLL_TIMEOUT_US);
|
||||
if (ret < 0) {
|
||||
status = snd_sof_dsp_read(sdev, ACP_DSP_BAR, ACP_ERROR_STATUS);
|
||||
status = snd_sof_dsp_read(sdev, ACP_DSP_BAR, desc->acp_error_stat);
|
||||
val = snd_sof_dsp_read(sdev, ACP_DSP_BAR, ACP_DMA_ERR_STS_0 + ch * sizeof(u32));
|
||||
|
||||
dev_err(sdev->dev, "ACP_DMA_ERR_STS :0x%x ACP_ERROR_STATUS :0x%x\n", val, status);
|
||||
@ -263,6 +264,17 @@ int configure_and_run_sha_dma(struct acp_dev_data *adata, void *image_addr,
|
||||
snd_sof_dsp_write(sdev, ACP_DSP_BAR, ACP_SHA_DMA_STRT_ADDR, start_addr);
|
||||
snd_sof_dsp_write(sdev, ACP_DSP_BAR, ACP_SHA_DMA_DESTINATION_ADDR, dest_addr);
|
||||
snd_sof_dsp_write(sdev, ACP_DSP_BAR, ACP_SHA_MSG_LENGTH, image_length);
|
||||
|
||||
/* psp_send_cmd only required for vangogh platform (rev - 5) */
|
||||
if (desc->rev == 5 && !(adata->quirks && adata->quirks->skip_iram_dram_size_mod)) {
|
||||
/* Modify IRAM and DRAM size */
|
||||
ret = psp_send_cmd(adata, MBOX_ACP_IRAM_DRAM_FENCE_COMMAND | IRAM_DRAM_FENCE_2);
|
||||
if (ret)
|
||||
return ret;
|
||||
ret = psp_send_cmd(adata, MBOX_ACP_IRAM_DRAM_FENCE_COMMAND | MBOX_ISREADY_FLAG);
|
||||
if (ret)
|
||||
return ret;
|
||||
}
|
||||
snd_sof_dsp_write(sdev, ACP_DSP_BAR, ACP_SHA_DMA_CMD, ACP_SHA_RUN);
|
||||
|
||||
ret = snd_sof_dsp_read_poll_timeout(sdev, ACP_DSP_BAR, ACP_SHA_TRANSFER_BYTE_CNT,
|
||||
@ -280,17 +292,6 @@ int configure_and_run_sha_dma(struct acp_dev_data *adata, void *image_addr,
|
||||
return ret;
|
||||
}
|
||||
|
||||
/* psp_send_cmd only required for vangogh platform (rev - 5) */
|
||||
if (desc->rev == 5 && !(adata->quirks && adata->quirks->skip_iram_dram_size_mod)) {
|
||||
/* Modify IRAM and DRAM size */
|
||||
ret = psp_send_cmd(adata, MBOX_ACP_IRAM_DRAM_FENCE_COMMAND | IRAM_DRAM_FENCE_2);
|
||||
if (ret)
|
||||
return ret;
|
||||
ret = psp_send_cmd(adata, MBOX_ACP_IRAM_DRAM_FENCE_COMMAND | MBOX_ISREADY_FLAG);
|
||||
if (ret)
|
||||
return ret;
|
||||
}
|
||||
|
||||
ret = snd_sof_dsp_read_poll_timeout(sdev, ACP_DSP_BAR, ACP_SHA_DSP_FW_QUALIFIER,
|
||||
fw_qualifier, fw_qualifier & DSP_FW_RUN_ENABLE,
|
||||
ACP_REG_POLL_INTERVAL, ACP_DMA_COMPLETE_TIMEOUT_US);
|
||||
@ -402,9 +403,11 @@ static irqreturn_t acp_irq_handler(int irq, void *dev_id)
|
||||
|
||||
if (val & ACP_ERROR_IRQ_MASK) {
|
||||
snd_sof_dsp_write(sdev, ACP_DSP_BAR, desc->ext_intr_stat, ACP_ERROR_IRQ_MASK);
|
||||
snd_sof_dsp_write(sdev, ACP_DSP_BAR, base + ACP_SW0_I2S_ERROR_REASON, 0);
|
||||
snd_sof_dsp_write(sdev, ACP_DSP_BAR, base + ACP_SW1_I2S_ERROR_REASON, 0);
|
||||
snd_sof_dsp_write(sdev, ACP_DSP_BAR, base + ACP_ERROR_STATUS, 0);
|
||||
snd_sof_dsp_write(sdev, ACP_DSP_BAR, desc->acp_sw0_i2s_err_reason, 0);
|
||||
/* ACP_SW1_I2S_ERROR_REASON is newly added register from rmb platform onwards */
|
||||
if (desc->rev >= 6)
|
||||
snd_sof_dsp_write(sdev, ACP_DSP_BAR, ACP_SW1_I2S_ERROR_REASON, 0);
|
||||
snd_sof_dsp_write(sdev, ACP_DSP_BAR, desc->acp_error_stat, 0);
|
||||
irq_flag = 1;
|
||||
}
|
||||
|
||||
@ -430,6 +433,7 @@ static int acp_power_on(struct snd_sof_dev *sdev)
|
||||
const struct sof_amd_acp_desc *desc = get_chip_info(sdev->pdata);
|
||||
unsigned int base = desc->pgfsm_base;
|
||||
unsigned int val;
|
||||
unsigned int acp_pgfsm_status_mask, acp_pgfsm_cntl_mask;
|
||||
int ret;
|
||||
|
||||
val = snd_sof_dsp_read(sdev, ACP_DSP_BAR, base + PGFSM_STATUS_OFFSET);
|
||||
@ -437,9 +441,23 @@ static int acp_power_on(struct snd_sof_dev *sdev)
|
||||
if (val == ACP_POWERED_ON)
|
||||
return 0;
|
||||
|
||||
if (val & ACP_PGFSM_STATUS_MASK)
|
||||
switch (desc->rev) {
|
||||
case 3:
|
||||
case 5:
|
||||
acp_pgfsm_status_mask = ACP3X_PGFSM_STATUS_MASK;
|
||||
acp_pgfsm_cntl_mask = ACP3X_PGFSM_CNTL_POWER_ON_MASK;
|
||||
break;
|
||||
case 6:
|
||||
acp_pgfsm_status_mask = ACP6X_PGFSM_STATUS_MASK;
|
||||
acp_pgfsm_cntl_mask = ACP6X_PGFSM_CNTL_POWER_ON_MASK;
|
||||
break;
|
||||
default:
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
if (val & acp_pgfsm_status_mask)
|
||||
snd_sof_dsp_write(sdev, ACP_DSP_BAR, base + PGFSM_CONTROL_OFFSET,
|
||||
ACP_PGFSM_CNTL_POWER_ON_MASK);
|
||||
acp_pgfsm_cntl_mask);
|
||||
|
||||
ret = snd_sof_dsp_read_poll_timeout(sdev, ACP_DSP_BAR, base + PGFSM_STATUS_OFFSET, val,
|
||||
!val, ACP_REG_POLL_INTERVAL, ACP_REG_POLL_TIMEOUT_US);
|
||||
|
@ -25,8 +25,11 @@
|
||||
#define ACP_REG_POLL_TIMEOUT_US 2000
|
||||
#define ACP_DMA_COMPLETE_TIMEOUT_US 5000
|
||||
|
||||
#define ACP_PGFSM_CNTL_POWER_ON_MASK 0x01
|
||||
#define ACP_PGFSM_STATUS_MASK 0x03
|
||||
#define ACP3X_PGFSM_CNTL_POWER_ON_MASK 0x01
|
||||
#define ACP3X_PGFSM_STATUS_MASK 0x03
|
||||
#define ACP6X_PGFSM_CNTL_POWER_ON_MASK 0x07
|
||||
#define ACP6X_PGFSM_STATUS_MASK 0x0F
|
||||
|
||||
#define ACP_POWERED_ON 0x00
|
||||
#define ACP_ASSERT_RESET 0x01
|
||||
#define ACP_RELEASE_RESET 0x00
|
||||
@ -203,6 +206,8 @@ struct sof_amd_acp_desc {
|
||||
u32 probe_reg_offset;
|
||||
u32 reg_start_addr;
|
||||
u32 reg_end_addr;
|
||||
u32 acp_error_stat;
|
||||
u32 acp_sw0_i2s_err_reason;
|
||||
u32 sdw_max_link_count;
|
||||
u64 sdw_acpi_dev_addr;
|
||||
};
|
||||
|
@ -35,6 +35,8 @@ static const struct sof_amd_acp_desc acp63_chip_info = {
|
||||
.ext_intr_cntl = ACP6X_EXTERNAL_INTR_CNTL,
|
||||
.ext_intr_stat = ACP6X_EXT_INTR_STAT,
|
||||
.ext_intr_stat1 = ACP6X_EXT_INTR_STAT1,
|
||||
.acp_error_stat = ACP6X_ERROR_STATUS,
|
||||
.acp_sw0_i2s_err_reason = ACP6X_SW0_I2S_ERROR_REASON,
|
||||
.dsp_intr_base = ACP6X_DSP_SW_INTR_BASE,
|
||||
.sram_pte_offset = ACP6X_SRAM_PTE_OFFSET,
|
||||
.hw_semaphore_offset = ACP6X_AXI2DAGB_SEM_0,
|
||||
|
@ -33,6 +33,8 @@ static const struct sof_amd_acp_desc rembrandt_chip_info = {
|
||||
.pgfsm_base = ACP6X_PGFSM_BASE,
|
||||
.ext_intr_stat = ACP6X_EXT_INTR_STAT,
|
||||
.dsp_intr_base = ACP6X_DSP_SW_INTR_BASE,
|
||||
.acp_error_stat = ACP6X_ERROR_STATUS,
|
||||
.acp_sw0_i2s_err_reason = ACP6X_SW0_I2S_ERROR_REASON,
|
||||
.sram_pte_offset = ACP6X_SRAM_PTE_OFFSET,
|
||||
.hw_semaphore_offset = ACP6X_AXI2DAGB_SEM_0,
|
||||
.fusion_dsp_offset = ACP6X_DSP_FUSION_RUNSTALL,
|
||||
|
@ -33,6 +33,8 @@ static const struct sof_amd_acp_desc renoir_chip_info = {
|
||||
.pgfsm_base = ACP3X_PGFSM_BASE,
|
||||
.ext_intr_stat = ACP3X_EXT_INTR_STAT,
|
||||
.dsp_intr_base = ACP3X_DSP_SW_INTR_BASE,
|
||||
.acp_error_stat = ACP3X_ERROR_STATUS,
|
||||
.acp_sw0_i2s_err_reason = ACP3X_SW_I2S_ERROR_REASON,
|
||||
.sram_pte_offset = ACP3X_SRAM_PTE_OFFSET,
|
||||
.hw_semaphore_offset = ACP3X_AXI2DAGB_SEM_0,
|
||||
.acp_clkmux_sel = ACP3X_CLKMUX_SEL,
|
||||
|
@ -574,6 +574,9 @@ static struct snd_sof_of_mach sof_mt8195_machs[] = {
|
||||
{
|
||||
.compatible = "google,tomato",
|
||||
.sof_tplg_filename = "sof-mt8195-mt6359-rt1019-rt5682.tplg"
|
||||
}, {
|
||||
.compatible = "google,dojo",
|
||||
.sof_tplg_filename = "sof-mt8195-mt6359-max98390-rt5682.tplg"
|
||||
}, {
|
||||
.compatible = "mediatek,mt8195",
|
||||
.sof_tplg_filename = "sof-mt8195.tplg"
|
||||
|
Loading…
Reference in New Issue
Block a user