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dt-bindings: bus: imx-weim: convert to YAML
Convert the i.MX Wireless External Interface Module binding to YAML. Signed-off-by: Sebastian Reichel <sre@kernel.org> Link: https://lore.kernel.org/r/20240224213240.1854709-3-sre@kernel.org Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
This commit is contained in:
Sebastian Reichel
Krzysztof Kozlowski
parent
ae1e06fb62
commit
719e366a66
@ -1,117 +0,0 @@
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Device tree bindings for i.MX Wireless External Interface Module (WEIM)
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The term "wireless" does not imply that the WEIM is literally an interface
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without wires. It simply means that this module was originally designed for
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wireless and mobile applications that use low-power technology.
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The actual devices are instantiated from the child nodes of a WEIM node.
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Required properties:
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- compatible: Should contain one of the following:
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"fsl,imx1-weim"
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"fsl,imx27-weim"
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"fsl,imx51-weim"
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"fsl,imx50-weim"
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"fsl,imx6q-weim"
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- reg: A resource specifier for the register space
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(see the example below)
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- clocks: the clock, see the example below.
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- #address-cells: Must be set to 2 to allow memory address translation
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- #size-cells: Must be set to 1 to allow CS address passing
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- ranges: Must be set up to reflect the memory layout with four
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integer values for each chip-select line in use:
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<cs-number> 0 <physical address of mapping> <size>
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Optional properties:
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- fsl,weim-cs-gpr: For "fsl,imx50-weim" and "fsl,imx6q-weim" type of
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devices, it should be the phandle to the system General
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Purpose Register controller that contains WEIM CS GPR
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register, e.g. IOMUXC_GPR1 on i.MX6Q. IOMUXC_GPR1[11:0]
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should be set up as one of the following 4 possible
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values depending on the CS space configuration.
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IOMUXC_GPR1[11:0] CS0 CS1 CS2 CS3
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---------------------------------------------
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05 128M 0M 0M 0M
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033 64M 64M 0M 0M
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0113 64M 32M 32M 0M
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01111 32M 32M 32M 32M
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In case that the property is absent, the reset value or
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what bootloader sets up in IOMUXC_GPR1[11:0] will be
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used.
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- fsl,burst-clk-enable For "fsl,imx50-weim" and "fsl,imx6q-weim" type of
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devices, the presence of this property indicates that
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the weim bus should operate in Burst Clock Mode.
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- fsl,continuous-burst-clk Make Burst Clock to output continuous clock.
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Without this option Burst Clock will output clock
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only when necessary. This takes effect only if
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"fsl,burst-clk-enable" is set.
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Timing property for child nodes. It is mandatory, not optional.
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- fsl,weim-cs-timing: The timing array, contains timing values for the
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child node. We get the CS indexes from the address
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ranges in the child node's "reg" property.
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The number of registers depends on the selected chip:
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For i.MX1, i.MX21 ("fsl,imx1-weim") there are two
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registers: CSxU, CSxL.
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For i.MX25, i.MX27, i.MX31 and i.MX35 ("fsl,imx27-weim")
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there are three registers: CSCRxU, CSCRxL, CSCRxA.
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For i.MX50, i.MX53 ("fsl,imx50-weim"),
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i.MX51 ("fsl,imx51-weim") and i.MX6Q ("fsl,imx6q-weim")
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there are six registers: CSxGCR1, CSxGCR2, CSxRCR1,
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CSxRCR2, CSxWCR1, CSxWCR2.
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Example for an imx6q-sabreauto board, the NOR flash connected to the WEIM:
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weim: weim@21b8000 {
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compatible = "fsl,imx6q-weim";
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reg = <0x021b8000 0x4000>;
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clocks = <&clks 196>;
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#address-cells = <2>;
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#size-cells = <1>;
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ranges = <0 0 0x08000000 0x08000000>;
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fsl,weim-cs-gpr = <&gpr>;
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nor@0,0 {
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compatible = "cfi-flash";
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reg = <0 0 0x02000000>;
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#address-cells = <1>;
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#size-cells = <1>;
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bank-width = <2>;
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fsl,weim-cs-timing = <0x00620081 0x00000001 0x1c022000
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0x0000c000 0x1404a38e 0x00000000>;
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};
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};
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Example for an imx6q-based board, a multi-chipselect device connected to WEIM:
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In this case, both chip select 0 and 1 will be configured with the same timing
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array values.
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weim: weim@21b8000 {
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compatible = "fsl,imx6q-weim";
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reg = <0x021b8000 0x4000>;
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clocks = <&clks 196>;
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#address-cells = <2>;
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#size-cells = <1>;
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ranges = <0 0 0x08000000 0x02000000
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1 0 0x0a000000 0x02000000
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2 0 0x0c000000 0x02000000
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3 0 0x0e000000 0x02000000>;
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fsl,weim-cs-gpr = <&gpr>;
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acme@0 {
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compatible = "acme,whatever";
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reg = <0 0 0x100>, <0 0x400000 0x800>,
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<1 0x400000 0x800>;
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fsl,weim-cs-timing = <0x024400b1 0x00001010 0x20081100
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0x00000000 0xa0000240 0x00000000>;
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};
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};
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@ -0,0 +1,31 @@
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/memory-controllers/fsl/fsl,imx-weim-peripherals.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: i.MX WEIM Bus Peripheral Nodes
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maintainers:
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- Shawn Guo <shawnguo@kernel.org>
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- Sascha Hauer <s.hauer@pengutronix.de>
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description:
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This binding is meant for the child nodes of the WEIM node. The node
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represents any device connected to the WEIM bus. It may be a Flash chip,
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RAM chip or Ethernet controller, etc. These properties are meant for
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configuring the WEIM settings/timings and will accompany the bindings
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supported by the respective device.
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properties:
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reg: true
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fsl,weim-cs-timing:
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$ref: /schemas/types.yaml#/definitions/uint32-array
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description:
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Timing values for the child node.
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minItems: 2
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maxItems: 6
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# the WEIM child will have its own native properties
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additionalProperties: true
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@ -0,0 +1,204 @@
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/memory-controllers/fsl/fsl,imx-weim.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: i.MX Wireless External Interface Module (WEIM)
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maintainers:
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- Shawn Guo <shawnguo@kernel.org>
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- Sascha Hauer <s.hauer@pengutronix.de>
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description:
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The term "wireless" does not imply that the WEIM is literally an interface
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without wires. It simply means that this module was originally designed for
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wireless and mobile applications that use low-power technology. The actual
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devices are instantiated from the child nodes of a WEIM node.
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properties:
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$nodename:
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pattern: "^memory-controller@[0-9a-f]+$"
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compatible:
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oneOf:
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- enum:
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- fsl,imx1-weim
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- fsl,imx27-weim
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- fsl,imx50-weim
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- fsl,imx51-weim
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- fsl,imx6q-weim
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- items:
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- enum:
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- fsl,imx31-weim
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- fsl,imx35-weim
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- const: fsl,imx27-weim
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- items:
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- enum:
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- fsl,imx6sx-weim
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- fsl,imx6ul-weim
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- const: fsl,imx6q-weim
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"#address-cells":
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const: 2
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"#size-cells":
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const: 1
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reg:
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maxItems: 1
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clocks:
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maxItems: 1
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interrupts:
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maxItems: 1
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ranges: true
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fsl,weim-cs-gpr:
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$ref: /schemas/types.yaml#/definitions/phandle
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description: |
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Phandle to the system General Purpose Register controller that contains
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WEIM CS GPR register, e.g. IOMUXC_GPR1 on i.MX6Q. IOMUXC_GPR1[11:0]
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should be set up as one of the following 4 possible values depending on
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the CS space configuration.
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IOMUXC_GPR1[11:0] CS0 CS1 CS2 CS3
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---------------------------------------------
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05 128M 0M 0M 0M
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033 64M 64M 0M 0M
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0113 64M 32M 32M 0M
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01111 32M 32M 32M 32M
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In case that the property is absent, the reset value or what bootloader
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sets up in IOMUXC_GPR1[11:0] will be used.
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fsl,burst-clk-enable:
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type: boolean
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description:
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The presence of this property indicates that the weim bus should operate
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in Burst Clock Mode.
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fsl,continuous-burst-clk:
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type: boolean
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description:
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Make Burst Clock to output continuous clock. Without this option Burst
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Clock will output clock only when necessary.
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patternProperties:
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"^.*@[0-7],[0-9a-f]+$":
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type: object
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description: Devices attached to chip selects are represented as subnodes.
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$ref: fsl,imx-weim-peripherals.yaml
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additionalProperties: true
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required:
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- fsl,weim-cs-timing
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required:
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- compatible
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- reg
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- clocks
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- "#address-cells"
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- "#size-cells"
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- ranges
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allOf:
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- if:
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properties:
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compatible:
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not:
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contains:
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enum:
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- fsl,imx50-weim
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- fsl,imx6q-weim
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then:
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properties:
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fsl,weim-cs-gpr: false
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fsl,burst-clk-enable: false
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- if:
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not:
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required:
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- fsl,burst-clk-enable
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then:
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properties:
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fsl,continuous-burst-clk: false
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- if:
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properties:
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compatible:
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contains:
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const: fsl,imx1-weim
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then:
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patternProperties:
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"^.*@[0-7],[0-9a-f]+$":
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properties:
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fsl,weim-cs-timing:
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items:
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items:
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- description: CSxU
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- description: CSxL
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- if:
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properties:
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compatible:
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contains:
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enum:
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- fsl,imx27-weim
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- fsl,imx31-weim
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- fsl,imx35-weim
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then:
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patternProperties:
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"^.*@[0-7],[0-9a-f]+$":
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properties:
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fsl,weim-cs-timing:
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items:
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items:
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- description: CSCRxU
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- description: CSCRxL
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- description: CSCRxA
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- if:
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properties:
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compatible:
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contains:
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enum:
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- fsl,imx50-weim
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- fsl,imx51-weim
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- fsl,imx6q-weim
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- fsl,imx6sx-weim
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- fsl,imx6ul-weim
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then:
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patternProperties:
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"^.*@[0-7],[0-9a-f]+$":
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properties:
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fsl,weim-cs-timing:
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items:
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items:
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- description: CSxGCR1
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- description: CSxGCR2
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- description: CSxRCR1
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- description: CSxRCR2
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- description: CSxWCR1
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- description: CSxWCR2
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additionalProperties: false
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examples:
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- |
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memory-controller@21b8000 {
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compatible = "fsl,imx6q-weim";
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reg = <0x021b8000 0x4000>;
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clocks = <&clks 196>;
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#address-cells = <2>;
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#size-cells = <1>;
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ranges = <0 0 0x08000000 0x08000000>;
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fsl,weim-cs-gpr = <&gpr>;
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flash@0,0 {
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compatible = "cfi-flash";
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reg = <0 0 0x02000000>;
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#address-cells = <1>;
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#size-cells = <1>;
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bank-width = <2>;
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fsl,weim-cs-timing = <0x00620081 0x00000001 0x1c022000
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0x0000c000 0x1404a38e 0x00000000>;
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};
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};
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@ -37,5 +37,6 @@ allOf:
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- $ref: ingenic,nemc-peripherals.yaml#
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- $ref: intel,ixp4xx-expansion-peripheral-props.yaml#
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- $ref: ti,gpmc-child.yaml#
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- $ref: fsl/fsl,imx-weim-peripherals.yaml
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additionalProperties: true
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@ -48,7 +48,7 @@ Example of usage:
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-----------------
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This example places the bridge on top of the i.MX WEIM parallel bus, see:
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Documentation/devicetree/bindings/bus/imx-weim.txt
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Documentation/devicetree/bindings/memory-controllers/fsl/fsl,imx-weim.yaml
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&weim {
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controller@0,0 {
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