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arm64: dts: imx8mq: Add ECSPI support

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Add support for the three ECSPI ports present on i.MX8MQ.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This commit is contained in:
Fabio Estevam 2019-01-28 10:08:13 -02:00 committed by Shawn Guo
parent f196ef19fb
commit 85761f4560
1 changed files with 39 additions and 0 deletions
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39
arch/arm64/boot/dts/freescale/imx8mq.dtsi
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@ -25,6 +25,9 @@
serial1 = &uart2;
serial2 = &uart3;
serial3 = &uart4;
spi0 = &ecspi1;
spi1 = &ecspi2;
spi2 = &ecspi3;
};
ckil: clock-ckil {
@ -383,6 +386,42 @@
#size-cells = <1>;
ranges = <0x30800000 0x30800000 0x400000>;
ecspi1: spi@30820000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,imx8mq-ecspi", "fsl,imx51-ecspi";
reg = <0x30820000 0x10000>;
interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk IMX8MQ_CLK_ECSPI1_ROOT>,
<&clk IMX8MQ_CLK_ECSPI1_ROOT>;
clock-names = "ipg", "per";
status = "disabled";
};
ecspi2: spi@30830000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,imx8mq-ecspi", "fsl,imx51-ecspi";
reg = <0x30830000 0x10000>;
interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk IMX8MQ_CLK_ECSPI2_ROOT>,
<&clk IMX8MQ_CLK_ECSPI2_ROOT>;
clock-names = "ipg", "per";
status = "disabled";
};
ecspi3: spi@30840000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,imx8mq-ecspi", "fsl,imx51-ecspi";
reg = <0x30840000 0x10000>;
interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk IMX8MQ_CLK_ECSPI3_ROOT>,
<&clk IMX8MQ_CLK_ECSPI3_ROOT>;
clock-names = "ipg", "per";
status = "disabled";
};
uart1: serial@30860000 {
compatible = "fsl,imx8mq-uart",
"fsl,imx6q-uart";