From c88dd606a1cd9edeb6bb7e6f6a45e1248c3a6453 Mon Sep 17 00:00:00 2001 From: Keerthy Date: Wed, 15 May 2019 15:38:46 +0530 Subject: [PATCH 01/45] dt-bindings: mfd: lp87565: Add LP87561 configuration lp87561 is a single output 4-phase regulator configuration. Add support for the same. Data Sheet: https://www.ti.com/lit/ds/symlink/lp87561-q1.pdf Signed-off-by: Keerthy Signed-off-by: Lee Jones --- .../devicetree/bindings/mfd/lp87565.txt | 36 +++++++++++++++++++ 1 file changed, 36 insertions(+) diff --git a/Documentation/devicetree/bindings/mfd/lp87565.txt b/Documentation/devicetree/bindings/mfd/lp87565.txt index a48df7c08ab0..41671e0dc26b 100644 --- a/Documentation/devicetree/bindings/mfd/lp87565.txt +++ b/Documentation/devicetree/bindings/mfd/lp87565.txt @@ -41,3 +41,39 @@ lp87565_pmic: pmic@60 { }; }; }; + +TI LP87561 PMIC: + +This is a single output 4-phase regulator configuration + +Required properties: + - compatible: "ti,lp87561-q1" + - reg: I2C slave address. + - gpio-controller: Marks the device node as a GPIO Controller. + - #gpio-cells: Should be two. The first cell is the pin number and + the second cell is used to specify flags. + See ../gpio/gpio.txt for more information. + - xxx-in-supply: Phandle to parent supply node of each regulator + populated under regulators node. xxx should match + the supply_name populated in driver. +Example: + +lp87561_pmic: pmic@62 { + compatible = "ti,lp87561-q1"; + reg = <0x62>; + gpio-controller; + #gpio-cells = <2>; + + buck3210-in-supply = <&vsys_3v3>; + + regulators: regulators { + buck3210_reg: buck3210 { + /* VDD_CORE */ + regulator-name = "buck3210"; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <800000>; + regulator-always-on; + regulator-boot-on; + }; + }; +}; From 013e868bc9465452c7b667830712ab57de236d08 Mon Sep 17 00:00:00 2001 From: Keerthy Date: Wed, 15 May 2019 15:38:47 +0530 Subject: [PATCH 02/45] mfd: lp87565: Add support for 4-phase LP87561 combination Add support for 4-phase LP87561 combination. Data Sheet: https://www.ti.com/lit/ds/symlink/lp87561-q1.pdf Signed-off-by: Keerthy Signed-off-by: Lee Jones --- drivers/mfd/lp87565.c | 4 ++++ include/linux/mfd/lp87565.h | 2 ++ 2 files changed, 6 insertions(+) diff --git a/drivers/mfd/lp87565.c b/drivers/mfd/lp87565.c index 32d2a07d4354..8ad688fe75f9 100644 --- a/drivers/mfd/lp87565.c +++ b/drivers/mfd/lp87565.c @@ -33,6 +33,10 @@ static const struct of_device_id of_lp87565_match_table[] = { .compatible = "ti,lp87565-q1", .data = (void *)LP87565_DEVICE_TYPE_LP87565_Q1, }, + { + .compatible = "ti,lp87561-q1", + .data = (void *)LP87565_DEVICE_TYPE_LP87561_Q1, + }, {} }; MODULE_DEVICE_TABLE(of, of_lp87565_match_table); diff --git a/include/linux/mfd/lp87565.h b/include/linux/mfd/lp87565.h index d0c91ba65525..976447607ea2 100644 --- a/include/linux/mfd/lp87565.h +++ b/include/linux/mfd/lp87565.h @@ -17,6 +17,7 @@ enum lp87565_device_type { LP87565_DEVICE_TYPE_UNKNOWN = 0, + LP87565_DEVICE_TYPE_LP87561_Q1, LP87565_DEVICE_TYPE_LP87565_Q1, }; @@ -249,6 +250,7 @@ enum LP87565_regulator_id { LP87565_BUCK_3, LP87565_BUCK_10, LP87565_BUCK_23, + LP87565_BUCK_3210, }; /** From 7ee63bd74750a2c6fac31805ca0ac67f2522bfa5 Mon Sep 17 00:00:00 2001 From: Keerthy Date: Wed, 12 Jun 2019 20:16:20 +0530 Subject: [PATCH 03/45] regulator: lp87565: Add 4-phase lp87561 regulator support The LP8756x family has a single output 4-phase regulator configuration. Add support for the same. The control lies in the master buck which is buck0 for 4-phase configuration. Enable/disable/voltage set happen via buck0 registers. Data Sheet: https://www.ti.com/lit/ds/symlink/lp87561-q1.pdf Signed-off-by: Keerthy Acked-by: Mark Brown Signed-off-by: Lee Jones --- drivers/regulator/lp87565-regulator.c | 17 ++++++++++++++++- 1 file changed, 16 insertions(+), 1 deletion(-) diff --git a/drivers/regulator/lp87565-regulator.c b/drivers/regulator/lp87565-regulator.c index 81eb4b890c0c..af00d1ffcf33 100644 --- a/drivers/regulator/lp87565-regulator.c +++ b/drivers/regulator/lp87565-regulator.c @@ -153,6 +153,12 @@ static const struct lp87565_regulator regulators[] = { LP87565_REG_BUCK2_CTRL_1, LP87565_BUCK_CTRL_1_EN, 3230, buck0_1_2_3_ranges, LP87565_REG_BUCK2_CTRL_2), + LP87565_REGULATOR("BUCK3210", LP87565_BUCK_3210, "buck3210", + lp87565_buck_ops, 256, LP87565_REG_BUCK0_VOUT, + LP87565_BUCK_VSET, LP87565_REG_BUCK0_CTRL_1, + LP87565_BUCK_CTRL_1_EN | + LP87565_BUCK_CTRL_1_FPWM_MP_0_2, 3230, + buck0_1_2_3_ranges, LP87565_REG_BUCK0_CTRL_2), }; static int lp87565_regulator_probe(struct platform_device *pdev) @@ -169,9 +175,18 @@ static int lp87565_regulator_probe(struct platform_device *pdev) config.driver_data = lp87565; config.regmap = lp87565->regmap; - if (lp87565->dev_type == LP87565_DEVICE_TYPE_LP87565_Q1) { + switch (lp87565->dev_type) { + case LP87565_DEVICE_TYPE_LP87565_Q1: min_idx = LP87565_BUCK_10; max_idx = LP87565_BUCK_23; + break; + case LP87565_DEVICE_TYPE_LP87561_Q1: + min_idx = LP87565_BUCK_3210; + max_idx = LP87565_BUCK_3210; + default: + dev_err(lp87565->dev, "Invalid lp config %d\n", + lp87565->dev_type); + return -EINVAL; } for (i = min_idx; i <= max_idx; i++) { From 2a6a7aacd4e557a4c7007f8858bcc9654b098fea Mon Sep 17 00:00:00 2001 From: Matti Vaittinen Date: Mon, 3 Jun 2019 10:24:32 +0300 Subject: [PATCH 04/45] mfd: regulator: clk: Split rohm-bd718x7.h Split the bd718x7.h to ROHM common and bd718x7 specific parts so that we do not need to add same things in every new ROHM PMIC header. Please note that this change requires changes also in bd718x7 sub-device drivers for regulators and clk. Signed-off-by: Matti Vaittinen Acked-by: Mark Brown Acked-by: Stephen Boyd Signed-off-by: Lee Jones --- drivers/clk/clk-bd718x7.c | 6 +++--- drivers/mfd/rohm-bd718x7.c | 23 ++++++++++++----------- drivers/regulator/bd718x7-regulator.c | 25 +++++++++++++------------ include/linux/mfd/rohm-bd718x7.h | 22 ++++++++-------------- include/linux/mfd/rohm-generic.h | 20 ++++++++++++++++++++ 5 files changed, 56 insertions(+), 40 deletions(-) create mode 100644 include/linux/mfd/rohm-generic.h diff --git a/drivers/clk/clk-bd718x7.c b/drivers/clk/clk-bd718x7.c index 60422c72d142..461228ebf703 100644 --- a/drivers/clk/clk-bd718x7.c +++ b/drivers/clk/clk-bd718x7.c @@ -17,7 +17,7 @@ struct bd718xx_clk { u8 reg; u8 mask; struct platform_device *pdev; - struct bd718xx *mfd; + struct rohm_regmap_dev *mfd; }; static int bd71837_clk_set(struct clk_hw *hw, int status) @@ -68,7 +68,7 @@ static int bd71837_clk_probe(struct platform_device *pdev) int rval = -ENOMEM; const char *parent_clk; struct device *parent = pdev->dev.parent; - struct bd718xx *mfd = dev_get_drvdata(parent); + struct rohm_regmap_dev *mfd = dev_get_drvdata(parent); struct clk_init_data init = { .name = "bd718xx-32k-out", .ops = &bd71837_clk_ops, @@ -119,5 +119,5 @@ static struct platform_driver bd71837_clk = { module_platform_driver(bd71837_clk); MODULE_AUTHOR("Matti Vaittinen "); -MODULE_DESCRIPTION("BD71837 chip clk driver"); +MODULE_DESCRIPTION("BD71837/BD71847 chip clk driver"); MODULE_LICENSE("GPL"); diff --git a/drivers/mfd/rohm-bd718x7.c b/drivers/mfd/rohm-bd718x7.c index a29d529a96f4..7beb444a57cb 100644 --- a/drivers/mfd/rohm-bd718x7.c +++ b/drivers/mfd/rohm-bd718x7.c @@ -98,18 +98,19 @@ static int bd718xx_i2c_probe(struct i2c_client *i2c, return -ENOMEM; bd718xx->chip_irq = i2c->irq; - bd718xx->chip_type = (unsigned int)(uintptr_t) + bd718xx->chip.chip_type = (unsigned int)(uintptr_t) of_device_get_match_data(&i2c->dev); - bd718xx->dev = &i2c->dev; + bd718xx->chip.dev = &i2c->dev; dev_set_drvdata(&i2c->dev, bd718xx); - bd718xx->regmap = devm_regmap_init_i2c(i2c, &bd718xx_regmap_config); - if (IS_ERR(bd718xx->regmap)) { + bd718xx->chip.regmap = devm_regmap_init_i2c(i2c, + &bd718xx_regmap_config); + if (IS_ERR(bd718xx->chip.regmap)) { dev_err(&i2c->dev, "regmap initialization failed\n"); - return PTR_ERR(bd718xx->regmap); + return PTR_ERR(bd718xx->chip.regmap); } - ret = devm_regmap_add_irq_chip(&i2c->dev, bd718xx->regmap, + ret = devm_regmap_add_irq_chip(&i2c->dev, bd718xx->chip.regmap, bd718xx->chip_irq, IRQF_ONESHOT, 0, &bd718xx_irq_chip, &bd718xx->irq_data); if (ret) { @@ -118,7 +119,7 @@ static int bd718xx_i2c_probe(struct i2c_client *i2c, } /* Configure short press to 10 milliseconds */ - ret = regmap_update_bits(bd718xx->regmap, + ret = regmap_update_bits(bd718xx->chip.regmap, BD718XX_REG_PWRONCONFIG0, BD718XX_PWRBTN_PRESS_DURATION_MASK, BD718XX_PWRBTN_SHORT_PRESS_10MS); @@ -129,7 +130,7 @@ static int bd718xx_i2c_probe(struct i2c_client *i2c, } /* Configure long press to 10 seconds */ - ret = regmap_update_bits(bd718xx->regmap, + ret = regmap_update_bits(bd718xx->chip.regmap, BD718XX_REG_PWRONCONFIG1, BD718XX_PWRBTN_PRESS_DURATION_MASK, BD718XX_PWRBTN_LONG_PRESS_10S); @@ -149,7 +150,7 @@ static int bd718xx_i2c_probe(struct i2c_client *i2c, button.irq = ret; - ret = devm_mfd_add_devices(bd718xx->dev, PLATFORM_DEVID_AUTO, + ret = devm_mfd_add_devices(bd718xx->chip.dev, PLATFORM_DEVID_AUTO, bd718xx_mfd_cells, ARRAY_SIZE(bd718xx_mfd_cells), NULL, 0, regmap_irq_get_domain(bd718xx->irq_data)); @@ -162,11 +163,11 @@ static int bd718xx_i2c_probe(struct i2c_client *i2c, static const struct of_device_id bd718xx_of_match[] = { { .compatible = "rohm,bd71837", - .data = (void *)BD718XX_TYPE_BD71837, + .data = (void *)ROHM_CHIP_TYPE_BD71837, }, { .compatible = "rohm,bd71847", - .data = (void *)BD718XX_TYPE_BD71847, + .data = (void *)ROHM_CHIP_TYPE_BD71847, }, { } }; diff --git a/drivers/regulator/bd718x7-regulator.c b/drivers/regulator/bd718x7-regulator.c index fde4264da6ff..ef2fc175a9ae 100644 --- a/drivers/regulator/bd718x7-regulator.c +++ b/drivers/regulator/bd718x7-regulator.c @@ -1152,12 +1152,12 @@ static int bd718xx_probe(struct platform_device *pdev) { struct bd718xx *mfd; struct regulator_config config = { 0 }; - struct bd718xx_pmic_inits pmic_regulators[] = { - [BD718XX_TYPE_BD71837] = { + struct bd718xx_pmic_inits pmic_regulators[ROHM_CHIP_TYPE_AMOUNT] = { + [ROHM_CHIP_TYPE_BD71837] = { .r_datas = bd71837_regulators, .r_amount = ARRAY_SIZE(bd71837_regulators), }, - [BD718XX_TYPE_BD71847] = { + [ROHM_CHIP_TYPE_BD71847] = { .r_datas = bd71847_regulators, .r_amount = ARRAY_SIZE(bd71847_regulators), }, @@ -1173,15 +1173,15 @@ static int bd718xx_probe(struct platform_device *pdev) goto err; } - if (mfd->chip_type >= BD718XX_TYPE_AMOUNT || - !pmic_regulators[mfd->chip_type].r_datas) { + if (mfd->chip.chip_type >= ROHM_CHIP_TYPE_AMOUNT || + !pmic_regulators[mfd->chip.chip_type].r_datas) { dev_err(&pdev->dev, "Unsupported chip type\n"); err = -EINVAL; goto err; } /* Register LOCK release */ - err = regmap_update_bits(mfd->regmap, BD718XX_REG_REGLOCK, + err = regmap_update_bits(mfd->chip.regmap, BD718XX_REG_REGLOCK, (REGLOCK_PWRSEQ | REGLOCK_VREG), 0); if (err) { dev_err(&pdev->dev, "Failed to unlock PMIC (%d)\n", err); @@ -1200,7 +1200,8 @@ static int bd718xx_probe(struct platform_device *pdev) * bit allowing HW defaults for power rails to be used */ if (!use_snvs) { - err = regmap_update_bits(mfd->regmap, BD718XX_REG_TRANS_COND1, + err = regmap_update_bits(mfd->chip.regmap, + BD718XX_REG_TRANS_COND1, BD718XX_ON_REQ_POWEROFF_MASK | BD718XX_SWRESET_POWEROFF_MASK | BD718XX_WDOG_POWEROFF_MASK | @@ -1215,17 +1216,17 @@ static int bd718xx_probe(struct platform_device *pdev) } } - for (i = 0; i < pmic_regulators[mfd->chip_type].r_amount; i++) { + for (i = 0; i < pmic_regulators[mfd->chip.chip_type].r_amount; i++) { const struct regulator_desc *desc; struct regulator_dev *rdev; const struct bd718xx_regulator_data *r; - r = &pmic_regulators[mfd->chip_type].r_datas[i]; + r = &pmic_regulators[mfd->chip.chip_type].r_datas[i]; desc = &r->desc; config.dev = pdev->dev.parent; - config.regmap = mfd->regmap; + config.regmap = mfd->chip.regmap; rdev = devm_regulator_register(&pdev->dev, desc, &config); if (IS_ERR(rdev)) { @@ -1254,7 +1255,7 @@ static int bd718xx_probe(struct platform_device *pdev) */ if (!use_snvs || !rdev->constraints->always_on || !rdev->constraints->boot_on) { - err = regmap_update_bits(mfd->regmap, r->init.reg, + err = regmap_update_bits(mfd->chip.regmap, r->init.reg, r->init.mask, r->init.val); if (err) { dev_err(&pdev->dev, @@ -1264,7 +1265,7 @@ static int bd718xx_probe(struct platform_device *pdev) } } for (j = 0; j < r->additional_init_amnt; j++) { - err = regmap_update_bits(mfd->regmap, + err = regmap_update_bits(mfd->chip.regmap, r->additional_inits[j].reg, r->additional_inits[j].mask, r->additional_inits[j].val); diff --git a/include/linux/mfd/rohm-bd718x7.h b/include/linux/mfd/rohm-bd718x7.h index fd194bfc836f..7f2dbde402a1 100644 --- a/include/linux/mfd/rohm-bd718x7.h +++ b/include/linux/mfd/rohm-bd718x7.h @@ -4,14 +4,9 @@ #ifndef __LINUX_MFD_BD718XX_H__ #define __LINUX_MFD_BD718XX_H__ +#include #include -enum { - BD718XX_TYPE_BD71837 = 0, - BD718XX_TYPE_BD71847, - BD718XX_TYPE_AMOUNT -}; - enum { BD718XX_BUCK1 = 0, BD718XX_BUCK2, @@ -321,18 +316,17 @@ enum { BD718XX_PWRBTN_LONG_PRESS_15S }; -struct bd718xx_clk; - struct bd718xx { - unsigned int chip_type; - struct device *dev; - struct regmap *regmap; - unsigned long int id; + /* + * Please keep this as the first member here as some + * drivers (clk) supporting more than one chip may only know this + * generic struct 'struct rohm_regmap_dev' and assume it is + * the first chunk of parent device's private data. + */ + struct rohm_regmap_dev chip; int chip_irq; struct regmap_irq_chip_data *irq_data; - - struct bd718xx_clk *clk; }; #endif /* __LINUX_MFD_BD718XX_H__ */ diff --git a/include/linux/mfd/rohm-generic.h b/include/linux/mfd/rohm-generic.h new file mode 100644 index 000000000000..bff15ac26f2c --- /dev/null +++ b/include/linux/mfd/rohm-generic.h @@ -0,0 +1,20 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ +/* Copyright (C) 2018 ROHM Semiconductors */ + +#ifndef __LINUX_MFD_ROHM_H__ +#define __LINUX_MFD_ROHM_H__ + +enum { + ROHM_CHIP_TYPE_BD71837 = 0, + ROHM_CHIP_TYPE_BD71847, + ROHM_CHIP_TYPE_BD70528, + ROHM_CHIP_TYPE_AMOUNT +}; + +struct rohm_regmap_dev { + unsigned int chip_type; + struct device *dev; + struct regmap *regmap; +}; + +#endif From 21b7c58fc1943f3aa8c18a994ab9bed4ae5aa72d Mon Sep 17 00:00:00 2001 From: Matti Vaittinen Date: Mon, 3 Jun 2019 10:25:08 +0300 Subject: [PATCH 05/45] mfd: bd70528: Support ROHM bd70528 PMIC core ROHM BD70528MWV is an ultra-low quiescent current general purpose single-chip power management IC for battery-powered portable devices. Add MFD core which enables chip access for following subdevices: - regulators/LED drivers - battery-charger - gpios - 32.768kHz clk - RTC - watchdog Signed-off-by: Matti Vaittinen Signed-off-by: Lee Jones --- drivers/mfd/Kconfig | 17 ++ drivers/mfd/Makefile | 2 + drivers/mfd/rohm-bd70528.c | 316 ++++++++++++++++++++++++ include/linux/mfd/rohm-bd70528.h | 408 +++++++++++++++++++++++++++++++ 4 files changed, 743 insertions(+) create mode 100644 drivers/mfd/rohm-bd70528.c create mode 100644 include/linux/mfd/rohm-bd70528.h diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig index 294d9567cc71..11fc53d78c5f 100644 --- a/drivers/mfd/Kconfig +++ b/drivers/mfd/Kconfig @@ -1890,6 +1890,23 @@ config MFD_ROHM_BD718XX NXP i.MX8. It contains 8 BUCK outputs and 7 LDOs, voltage monitoring and emergency shut down as well as 32,768KHz clock output. +config MFD_ROHM_BD70528 + tristate "ROHM BD70528 Power Management IC" + depends on I2C=y + depends on OF + select REGMAP_I2C + select REGMAP_IRQ + select MFD_CORE + help + Select this option to get support for the ROHM BD70528 Power + Management IC. BD71837 is general purpose single-chip power + management IC for battery-powered portable devices. It contains + 3 ultra-low current consumption buck converters, 3 LDOs and 2 LED + drivers. Also included are 4 GPIOs, a real-time clock (RTC), a 32kHz + crystal oscillator, high-accuracy VREF for use with an external ADC, + 10 bits SAR ADC for battery temperature monitor and 1S battery + charger. + config MFD_STM32_LPTIMER tristate "Support for STM32 Low-Power Timer" depends on (ARCH_STM32 && OF) || COMPILE_TEST diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile index 52b1a90ff515..643d65bcb6ea 100644 --- a/drivers/mfd/Makefile +++ b/drivers/mfd/Makefile @@ -247,5 +247,7 @@ obj-$(CONFIG_MFD_STM32_TIMERS) += stm32-timers.o obj-$(CONFIG_MFD_MXS_LRADC) += mxs-lradc.o obj-$(CONFIG_MFD_SC27XX_PMIC) += sprd-sc27xx-spi.o obj-$(CONFIG_RAVE_SP_CORE) += rave-sp.o +obj-$(CONFIG_MFD_ROHM_BD70528) += rohm-bd70528.o obj-$(CONFIG_MFD_ROHM_BD718XX) += rohm-bd718x7.o obj-$(CONFIG_MFD_STMFX) += stmfx.o + diff --git a/drivers/mfd/rohm-bd70528.c b/drivers/mfd/rohm-bd70528.c new file mode 100644 index 000000000000..55599d5c5c86 --- /dev/null +++ b/drivers/mfd/rohm-bd70528.c @@ -0,0 +1,316 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +// +// Copyright (C) 2019 ROHM Semiconductors +// +// ROHM BD70528 PMIC driver + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define BD70528_NUM_OF_GPIOS 4 + +static const struct resource rtc_irqs[] = { + DEFINE_RES_IRQ_NAMED(BD70528_INT_RTC_ALARM, "bd70528-rtc-alm"), + DEFINE_RES_IRQ_NAMED(BD70528_INT_ELPS_TIM, "bd70528-elapsed-timer"), +}; + +static const struct resource charger_irqs[] = { + DEFINE_RES_IRQ_NAMED(BD70528_INT_BAT_OV_RES, "bd70528-bat-ov-res"), + DEFINE_RES_IRQ_NAMED(BD70528_INT_BAT_OV_DET, "bd70528-bat-ov-det"), + DEFINE_RES_IRQ_NAMED(BD70528_INT_DBAT_DET, "bd70528-bat-dead"), + DEFINE_RES_IRQ_NAMED(BD70528_INT_BATTSD_COLD_RES, "bd70528-bat-warmed"), + DEFINE_RES_IRQ_NAMED(BD70528_INT_BATTSD_COLD_DET, "bd70528-bat-cold"), + DEFINE_RES_IRQ_NAMED(BD70528_INT_BATTSD_HOT_RES, "bd70528-bat-cooled"), + DEFINE_RES_IRQ_NAMED(BD70528_INT_BATTSD_HOT_DET, "bd70528-bat-hot"), + DEFINE_RES_IRQ_NAMED(BD70528_INT_CHG_TSD, "bd70528-chg-tshd"), + DEFINE_RES_IRQ_NAMED(BD70528_INT_BAT_RMV, "bd70528-bat-removed"), + DEFINE_RES_IRQ_NAMED(BD70528_INT_BAT_DET, "bd70528-bat-detected"), + DEFINE_RES_IRQ_NAMED(BD70528_INT_DCIN2_OV_RES, "bd70528-dcin2-ov-res"), + DEFINE_RES_IRQ_NAMED(BD70528_INT_DCIN2_OV_DET, "bd70528-dcin2-ov-det"), + DEFINE_RES_IRQ_NAMED(BD70528_INT_DCIN2_RMV, "bd70528-dcin2-removed"), + DEFINE_RES_IRQ_NAMED(BD70528_INT_DCIN2_DET, "bd70528-dcin2-detected"), + DEFINE_RES_IRQ_NAMED(BD70528_INT_DCIN1_RMV, "bd70528-dcin1-removed"), + DEFINE_RES_IRQ_NAMED(BD70528_INT_DCIN1_DET, "bd70528-dcin1-detected"), +}; + +static struct mfd_cell bd70528_mfd_cells[] = { + { .name = "bd70528-pmic", }, + { .name = "bd70528-gpio", }, + /* + * We use BD71837 driver to drive the clock block. Only differences to + * BD70528 clock gate are the register address and mask. + */ + { .name = "bd718xx-clk", }, + { .name = "bd70528-wdt", }, + { + .name = "bd70528-power", + .resources = charger_irqs, + .num_resources = ARRAY_SIZE(charger_irqs), + }, { + .name = "bd70528-rtc", + .resources = rtc_irqs, + .num_resources = ARRAY_SIZE(rtc_irqs), + }, +}; + +static const struct regmap_range volatile_ranges[] = { + { + .range_min = BD70528_REG_INT_MAIN, + .range_max = BD70528_REG_INT_OP_FAIL, + }, { + .range_min = BD70528_REG_RTC_COUNT_H, + .range_max = BD70528_REG_RTC_ALM_REPEAT, + }, { + /* + * WDT control reg is special. Magic values must be written to + * it in order to change the control. Should not be cached. + */ + .range_min = BD70528_REG_WDT_CTRL, + .range_max = BD70528_REG_WDT_CTRL, + }, { + /* + * BD70528 also contains a few other registers which require + * magic sequences to be written in order to update the value. + * At least SHIPMODE, HWRESET, WARMRESET,and STANDBY + */ + .range_min = BD70528_REG_SHIPMODE, + .range_max = BD70528_REG_STANDBY, + }, +}; + +static const struct regmap_access_table volatile_regs = { + .yes_ranges = &volatile_ranges[0], + .n_yes_ranges = ARRAY_SIZE(volatile_ranges), +}; + +static struct regmap_config bd70528_regmap = { + .reg_bits = 8, + .val_bits = 8, + .volatile_table = &volatile_regs, + .max_register = BD70528_MAX_REGISTER, + .cache_type = REGCACHE_RBTREE, +}; + +/* + * Mapping of main IRQ register bits to sub-IRQ register offsets so that we can + * access corect sub-IRQ registers based on bits that are set in main IRQ + * register. + */ + +/* bit [0] - Shutdown register */ +unsigned int bit0_offsets[] = {0}; /* Shutdown register */ +unsigned int bit1_offsets[] = {1}; /* Power failure register */ +unsigned int bit2_offsets[] = {2}; /* VR FAULT register */ +unsigned int bit3_offsets[] = {3}; /* PMU register interrupts */ +unsigned int bit4_offsets[] = {4, 5}; /* Charger 1 and Charger 2 registers */ +unsigned int bit5_offsets[] = {6}; /* RTC register */ +unsigned int bit6_offsets[] = {7}; /* GPIO register */ +unsigned int bit7_offsets[] = {8}; /* Invalid operation register */ + +static struct regmap_irq_sub_irq_map bd70528_sub_irq_offsets[] = { + REGMAP_IRQ_MAIN_REG_OFFSET(bit0_offsets), + REGMAP_IRQ_MAIN_REG_OFFSET(bit1_offsets), + REGMAP_IRQ_MAIN_REG_OFFSET(bit2_offsets), + REGMAP_IRQ_MAIN_REG_OFFSET(bit3_offsets), + REGMAP_IRQ_MAIN_REG_OFFSET(bit4_offsets), + REGMAP_IRQ_MAIN_REG_OFFSET(bit5_offsets), + REGMAP_IRQ_MAIN_REG_OFFSET(bit6_offsets), + REGMAP_IRQ_MAIN_REG_OFFSET(bit7_offsets), +}; + +static struct regmap_irq bd70528_irqs[] = { + REGMAP_IRQ_REG(BD70528_INT_LONGPUSH, 0, BD70528_INT_LONGPUSH_MASK), + REGMAP_IRQ_REG(BD70528_INT_WDT, 0, BD70528_INT_WDT_MASK), + REGMAP_IRQ_REG(BD70528_INT_HWRESET, 0, BD70528_INT_HWRESET_MASK), + REGMAP_IRQ_REG(BD70528_INT_RSTB_FAULT, 0, BD70528_INT_RSTB_FAULT_MASK), + REGMAP_IRQ_REG(BD70528_INT_VBAT_UVLO, 0, BD70528_INT_VBAT_UVLO_MASK), + REGMAP_IRQ_REG(BD70528_INT_TSD, 0, BD70528_INT_TSD_MASK), + REGMAP_IRQ_REG(BD70528_INT_RSTIN, 0, BD70528_INT_RSTIN_MASK), + REGMAP_IRQ_REG(BD70528_INT_BUCK1_FAULT, 1, + BD70528_INT_BUCK1_FAULT_MASK), + REGMAP_IRQ_REG(BD70528_INT_BUCK2_FAULT, 1, + BD70528_INT_BUCK2_FAULT_MASK), + REGMAP_IRQ_REG(BD70528_INT_BUCK3_FAULT, 1, + BD70528_INT_BUCK3_FAULT_MASK), + REGMAP_IRQ_REG(BD70528_INT_LDO1_FAULT, 1, BD70528_INT_LDO1_FAULT_MASK), + REGMAP_IRQ_REG(BD70528_INT_LDO2_FAULT, 1, BD70528_INT_LDO2_FAULT_MASK), + REGMAP_IRQ_REG(BD70528_INT_LDO3_FAULT, 1, BD70528_INT_LDO3_FAULT_MASK), + REGMAP_IRQ_REG(BD70528_INT_LED1_FAULT, 1, BD70528_INT_LED1_FAULT_MASK), + REGMAP_IRQ_REG(BD70528_INT_LED2_FAULT, 1, BD70528_INT_LED2_FAULT_MASK), + REGMAP_IRQ_REG(BD70528_INT_BUCK1_OCP, 2, BD70528_INT_BUCK1_OCP_MASK), + REGMAP_IRQ_REG(BD70528_INT_BUCK2_OCP, 2, BD70528_INT_BUCK2_OCP_MASK), + REGMAP_IRQ_REG(BD70528_INT_BUCK3_OCP, 2, BD70528_INT_BUCK3_OCP_MASK), + REGMAP_IRQ_REG(BD70528_INT_LED1_OCP, 2, BD70528_INT_LED1_OCP_MASK), + REGMAP_IRQ_REG(BD70528_INT_LED2_OCP, 2, BD70528_INT_LED2_OCP_MASK), + REGMAP_IRQ_REG(BD70528_INT_BUCK1_FULLON, 2, + BD70528_INT_BUCK1_FULLON_MASK), + REGMAP_IRQ_REG(BD70528_INT_BUCK2_FULLON, 2, + BD70528_INT_BUCK2_FULLON_MASK), + REGMAP_IRQ_REG(BD70528_INT_SHORTPUSH, 3, BD70528_INT_SHORTPUSH_MASK), + REGMAP_IRQ_REG(BD70528_INT_AUTO_WAKEUP, 3, + BD70528_INT_AUTO_WAKEUP_MASK), + REGMAP_IRQ_REG(BD70528_INT_STATE_CHANGE, 3, + BD70528_INT_STATE_CHANGE_MASK), + REGMAP_IRQ_REG(BD70528_INT_BAT_OV_RES, 4, BD70528_INT_BAT_OV_RES_MASK), + REGMAP_IRQ_REG(BD70528_INT_BAT_OV_DET, 4, BD70528_INT_BAT_OV_DET_MASK), + REGMAP_IRQ_REG(BD70528_INT_DBAT_DET, 4, BD70528_INT_DBAT_DET_MASK), + REGMAP_IRQ_REG(BD70528_INT_BATTSD_COLD_RES, 4, + BD70528_INT_BATTSD_COLD_RES_MASK), + REGMAP_IRQ_REG(BD70528_INT_BATTSD_COLD_DET, 4, + BD70528_INT_BATTSD_COLD_DET_MASK), + REGMAP_IRQ_REG(BD70528_INT_BATTSD_HOT_RES, 4, + BD70528_INT_BATTSD_HOT_RES_MASK), + REGMAP_IRQ_REG(BD70528_INT_BATTSD_HOT_DET, 4, + BD70528_INT_BATTSD_HOT_DET_MASK), + REGMAP_IRQ_REG(BD70528_INT_CHG_TSD, 4, BD70528_INT_CHG_TSD_MASK), + REGMAP_IRQ_REG(BD70528_INT_BAT_RMV, 5, BD70528_INT_BAT_RMV_MASK), + REGMAP_IRQ_REG(BD70528_INT_BAT_DET, 5, BD70528_INT_BAT_DET_MASK), + REGMAP_IRQ_REG(BD70528_INT_DCIN2_OV_RES, 5, + BD70528_INT_DCIN2_OV_RES_MASK), + REGMAP_IRQ_REG(BD70528_INT_DCIN2_OV_DET, 5, + BD70528_INT_DCIN2_OV_DET_MASK), + REGMAP_IRQ_REG(BD70528_INT_DCIN2_RMV, 5, BD70528_INT_DCIN2_RMV_MASK), + REGMAP_IRQ_REG(BD70528_INT_DCIN2_DET, 5, BD70528_INT_DCIN2_DET_MASK), + REGMAP_IRQ_REG(BD70528_INT_DCIN1_RMV, 5, BD70528_INT_DCIN1_RMV_MASK), + REGMAP_IRQ_REG(BD70528_INT_DCIN1_DET, 5, BD70528_INT_DCIN1_DET_MASK), + REGMAP_IRQ_REG(BD70528_INT_RTC_ALARM, 6, BD70528_INT_RTC_ALARM_MASK), + REGMAP_IRQ_REG(BD70528_INT_ELPS_TIM, 6, BD70528_INT_ELPS_TIM_MASK), + REGMAP_IRQ_REG(BD70528_INT_GPIO0, 7, BD70528_INT_GPIO0_MASK), + REGMAP_IRQ_REG(BD70528_INT_GPIO1, 7, BD70528_INT_GPIO1_MASK), + REGMAP_IRQ_REG(BD70528_INT_GPIO2, 7, BD70528_INT_GPIO2_MASK), + REGMAP_IRQ_REG(BD70528_INT_GPIO3, 7, BD70528_INT_GPIO3_MASK), + REGMAP_IRQ_REG(BD70528_INT_BUCK1_DVS_OPFAIL, 8, + BD70528_INT_BUCK1_DVS_OPFAIL_MASK), + REGMAP_IRQ_REG(BD70528_INT_BUCK2_DVS_OPFAIL, 8, + BD70528_INT_BUCK2_DVS_OPFAIL_MASK), + REGMAP_IRQ_REG(BD70528_INT_BUCK3_DVS_OPFAIL, 8, + BD70528_INT_BUCK3_DVS_OPFAIL_MASK), + REGMAP_IRQ_REG(BD70528_INT_LED1_VOLT_OPFAIL, 8, + BD70528_INT_LED1_VOLT_OPFAIL_MASK), + REGMAP_IRQ_REG(BD70528_INT_LED2_VOLT_OPFAIL, 8, + BD70528_INT_LED2_VOLT_OPFAIL_MASK), +}; + +static struct regmap_irq_chip bd70528_irq_chip = { + .name = "bd70528_irq", + .main_status = BD70528_REG_INT_MAIN, + .irqs = &bd70528_irqs[0], + .num_irqs = ARRAY_SIZE(bd70528_irqs), + .status_base = BD70528_REG_INT_SHDN, + .mask_base = BD70528_REG_INT_SHDN_MASK, + .ack_base = BD70528_REG_INT_SHDN, + .type_base = BD70528_REG_GPIO1_IN, + .init_ack_masked = true, + .num_regs = 9, + .num_main_regs = 1, + .num_type_reg = 4, + .sub_reg_offsets = &bd70528_sub_irq_offsets[0], + .num_main_status_bits = 8, + .irq_reg_stride = 1, +}; + +static int bd70528_i2c_probe(struct i2c_client *i2c, + const struct i2c_device_id *id) +{ + struct bd70528_data *bd70528; + struct regmap_irq_chip_data *irq_data; + int ret, i; + + if (!i2c->irq) { + dev_err(&i2c->dev, "No IRQ configured\n"); + return -EINVAL; + } + + bd70528 = devm_kzalloc(&i2c->dev, sizeof(*bd70528), GFP_KERNEL); + if (!bd70528) + return -ENOMEM; + + mutex_init(&bd70528->rtc_timer_lock); + + dev_set_drvdata(&i2c->dev, &bd70528->chip); + + bd70528->chip.chip_type = ROHM_CHIP_TYPE_BD70528; + bd70528->chip.regmap = devm_regmap_init_i2c(i2c, &bd70528_regmap); + if (IS_ERR(bd70528->chip.regmap)) { + dev_err(&i2c->dev, "Failed to initialize Regmap\n"); + return PTR_ERR(bd70528->chip.regmap); + } + + /* + * Disallow type setting for all IRQs by default as most of them do not + * support setting type. + */ + for (i = 0; i < ARRAY_SIZE(bd70528_irqs); i++) + bd70528_irqs[i].type.types_supported = 0; + + /* Set IRQ typesetting information for GPIO pins 0 - 3 */ + for (i = 0; i < BD70528_NUM_OF_GPIOS; i++) { + struct regmap_irq_type *type; + + type = &bd70528_irqs[BD70528_INT_GPIO0 + i].type; + type->type_reg_offset = 2 * i; + type->type_rising_val = 0x20; + type->type_falling_val = 0x10; + type->type_level_high_val = 0x40; + type->type_level_low_val = 0x50; + type->types_supported = (IRQ_TYPE_EDGE_BOTH | + IRQ_TYPE_LEVEL_HIGH | IRQ_TYPE_LEVEL_LOW); + } + + ret = devm_regmap_add_irq_chip(&i2c->dev, bd70528->chip.regmap, + i2c->irq, IRQF_ONESHOT, 0, + &bd70528_irq_chip, &irq_data); + if (ret) { + dev_err(&i2c->dev, "Failed to add IRQ chip\n"); + return ret; + } + dev_dbg(&i2c->dev, "Registered %d IRQs for chip\n", + bd70528_irq_chip.num_irqs); + + /* + * BD70528 IRQ controller is not touching the main mask register. + * So enable the GPIO block interrupts at main level. We can just leave + * them enabled as the IRQ controller should disable IRQs from + * sub-registers when IRQ is disabled or freed. + */ + ret = regmap_update_bits(bd70528->chip.regmap, + BD70528_REG_INT_MAIN_MASK, + BD70528_INT_GPIO_MASK, 0); + + ret = devm_mfd_add_devices(&i2c->dev, PLATFORM_DEVID_AUTO, + bd70528_mfd_cells, + ARRAY_SIZE(bd70528_mfd_cells), NULL, 0, + regmap_irq_get_domain(irq_data)); + if (ret) + dev_err(&i2c->dev, "Failed to create subdevices\n"); + + return ret; +} + +static const struct of_device_id bd70528_of_match[] = { + { .compatible = "rohm,bd70528", }, + { }, +}; +MODULE_DEVICE_TABLE(of, bd70528_of_match); + +static struct i2c_driver bd70528_drv = { + .driver = { + .name = "rohm-bd70528", + .of_match_table = bd70528_of_match, + }, + .probe = &bd70528_i2c_probe, +}; + +module_i2c_driver(bd70528_drv); + +MODULE_AUTHOR("Matti Vaittinen "); +MODULE_DESCRIPTION("ROHM BD70528 Power Management IC driver"); +MODULE_LICENSE("GPL"); diff --git a/include/linux/mfd/rohm-bd70528.h b/include/linux/mfd/rohm-bd70528.h new file mode 100644 index 000000000000..1013e60c5b25 --- /dev/null +++ b/include/linux/mfd/rohm-bd70528.h @@ -0,0 +1,408 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ +/* Copyright (C) 2018 ROHM Semiconductors */ + +#ifndef __LINUX_MFD_BD70528_H__ +#define __LINUX_MFD_BD70528_H__ + +#include +#include +#include +#include + +enum { + BD70528_BUCK1, + BD70528_BUCK2, + BD70528_BUCK3, + BD70528_LDO1, + BD70528_LDO2, + BD70528_LDO3, + BD70528_LED1, + BD70528_LED2, +}; + +struct bd70528_data { + struct rohm_regmap_dev chip; + struct mutex rtc_timer_lock; +}; + +#define BD70528_BUCK_VOLTS 17 +#define BD70528_BUCK_VOLTS 17 +#define BD70528_BUCK_VOLTS 17 +#define BD70528_LDO_VOLTS 0x20 + +#define BD70528_REG_BUCK1_EN 0x0F +#define BD70528_REG_BUCK1_VOLT 0x15 +#define BD70528_REG_BUCK2_EN 0x10 +#define BD70528_REG_BUCK2_VOLT 0x16 +#define BD70528_REG_BUCK3_EN 0x11 +#define BD70528_REG_BUCK3_VOLT 0x17 +#define BD70528_REG_LDO1_EN 0x1b +#define BD70528_REG_LDO1_VOLT 0x1e +#define BD70528_REG_LDO2_EN 0x1c +#define BD70528_REG_LDO2_VOLT 0x1f +#define BD70528_REG_LDO3_EN 0x1d +#define BD70528_REG_LDO3_VOLT 0x20 +#define BD70528_REG_LED_CTRL 0x2b +#define BD70528_REG_LED_VOLT 0x29 +#define BD70528_REG_LED_EN 0x2a + +/* main irq registers */ +#define BD70528_REG_INT_MAIN 0x7E +#define BD70528_REG_INT_MAIN_MASK 0x74 + +/* 'sub irq' registers */ +#define BD70528_REG_INT_SHDN 0x7F +#define BD70528_REG_INT_PWR_FLT 0x80 +#define BD70528_REG_INT_VR_FLT 0x81 +#define BD70528_REG_INT_MISC 0x82 +#define BD70528_REG_INT_BAT1 0x83 +#define BD70528_REG_INT_BAT2 0x84 +#define BD70528_REG_INT_RTC 0x85 +#define BD70528_REG_INT_GPIO 0x86 +#define BD70528_REG_INT_OP_FAIL 0x87 + +#define BD70528_REG_INT_SHDN_MASK 0x75 +#define BD70528_REG_INT_PWR_FLT_MASK 0x76 +#define BD70528_REG_INT_VR_FLT_MASK 0x77 +#define BD70528_REG_INT_MISC_MASK 0x78 +#define BD70528_REG_INT_BAT1_MASK 0x79 +#define BD70528_REG_INT_BAT2_MASK 0x7a +#define BD70528_REG_INT_RTC_MASK 0x7b +#define BD70528_REG_INT_GPIO_MASK 0x7c +#define BD70528_REG_INT_OP_FAIL_MASK 0x7d + +/* Reset related 'magic' registers */ +#define BD70528_REG_SHIPMODE 0x03 +#define BD70528_REG_HWRESET 0x04 +#define BD70528_REG_WARMRESET 0x05 +#define BD70528_REG_STANDBY 0x06 + +/* GPIO registers */ +#define BD70528_REG_GPIO_STATE 0x8F + +#define BD70528_REG_GPIO1_IN 0x4d +#define BD70528_REG_GPIO2_IN 0x4f +#define BD70528_REG_GPIO3_IN 0x51 +#define BD70528_REG_GPIO4_IN 0x53 +#define BD70528_REG_GPIO1_OUT 0x4e +#define BD70528_REG_GPIO2_OUT 0x50 +#define BD70528_REG_GPIO3_OUT 0x52 +#define BD70528_REG_GPIO4_OUT 0x54 + +/* clk control */ + +#define BD70528_REG_CLK_OUT 0x2c + +/* RTC */ + +#define BD70528_REG_RTC_COUNT_H 0x2d +#define BD70528_REG_RTC_COUNT_L 0x2e +#define BD70528_REG_RTC_SEC 0x2f +#define BD70528_REG_RTC_MINUTE 0x30 +#define BD70528_REG_RTC_HOUR 0x31 +#define BD70528_REG_RTC_WEEK 0x32 +#define BD70528_REG_RTC_DAY 0x33 +#define BD70528_REG_RTC_MONTH 0x34 +#define BD70528_REG_RTC_YEAR 0x35 + +#define BD70528_REG_RTC_ALM_SEC 0x36 +#define BD70528_REG_RTC_ALM_START BD70528_REG_RTC_ALM_SEC +#define BD70528_REG_RTC_ALM_MINUTE 0x37 +#define BD70528_REG_RTC_ALM_HOUR 0x38 +#define BD70528_REG_RTC_ALM_WEEK 0x39 +#define BD70528_REG_RTC_ALM_DAY 0x3a +#define BD70528_REG_RTC_ALM_MONTH 0x3b +#define BD70528_REG_RTC_ALM_YEAR 0x3c +#define BD70528_REG_RTC_ALM_MASK 0x3d +#define BD70528_REG_RTC_ALM_REPEAT 0x3e +#define BD70528_REG_RTC_START BD70528_REG_RTC_SEC + +#define BD70528_REG_RTC_WAKE_SEC 0x43 +#define BD70528_REG_RTC_WAKE_START BD70528_REG_RTC_WAKE_SEC +#define BD70528_REG_RTC_WAKE_MIN 0x44 +#define BD70528_REG_RTC_WAKE_HOUR 0x45 +#define BD70528_REG_RTC_WAKE_CTRL 0x46 + +#define BD70528_REG_ELAPSED_TIMER_EN 0x42 +#define BD70528_REG_WAKE_EN 0x46 + +/* WDT registers */ +#define BD70528_REG_WDT_CTRL 0x4A +#define BD70528_REG_WDT_HOUR 0x49 +#define BD70528_REG_WDT_MINUTE 0x48 +#define BD70528_REG_WDT_SEC 0x47 + +/* Charger / Battery */ +#define BD70528_REG_CHG_CURR_STAT 0x59 +#define BD70528_REG_CHG_BAT_STAT 0x57 +#define BD70528_REG_CHG_BAT_TEMP 0x58 +#define BD70528_REG_CHG_IN_STAT 0x56 +#define BD70528_REG_CHG_DCIN_ILIM 0x5d +#define BD70528_REG_CHG_CHG_CURR_WARM 0x61 +#define BD70528_REG_CHG_CHG_CURR_COLD 0x62 + +/* Masks for main IRQ register bits */ +enum { + BD70528_INT_SHDN, +#define BD70528_INT_SHDN_MASK BIT(BD70528_INT_SHDN) + BD70528_INT_PWR_FLT, +#define BD70528_INT_PWR_FLT_MASK BIT(BD70528_INT_PWR_FLT) + BD70528_INT_VR_FLT, +#define BD70528_INT_VR_FLT_MASK BIT(BD70528_INT_VR_FLT) + BD70528_INT_MISC, +#define BD70528_INT_MISC_MASK BIT(BD70528_INT_MISC) + BD70528_INT_BAT1, +#define BD70528_INT_BAT1_MASK BIT(BD70528_INT_BAT1) + BD70528_INT_RTC, +#define BD70528_INT_RTC_MASK BIT(BD70528_INT_RTC) + BD70528_INT_GPIO, +#define BD70528_INT_GPIO_MASK BIT(BD70528_INT_GPIO) + BD70528_INT_OP_FAIL, +#define BD70528_INT_OP_FAIL_MASK BIT(BD70528_INT_OP_FAIL) +}; + +/* IRQs */ +enum { + /* Shutdown register IRQs */ + BD70528_INT_LONGPUSH, + BD70528_INT_WDT, + BD70528_INT_HWRESET, + BD70528_INT_RSTB_FAULT, + BD70528_INT_VBAT_UVLO, + BD70528_INT_TSD, + BD70528_INT_RSTIN, + /* Power failure register IRQs */ + BD70528_INT_BUCK1_FAULT, + BD70528_INT_BUCK2_FAULT, + BD70528_INT_BUCK3_FAULT, + BD70528_INT_LDO1_FAULT, + BD70528_INT_LDO2_FAULT, + BD70528_INT_LDO3_FAULT, + BD70528_INT_LED1_FAULT, + BD70528_INT_LED2_FAULT, + /* VR FAULT register IRQs */ + BD70528_INT_BUCK1_OCP, + BD70528_INT_BUCK2_OCP, + BD70528_INT_BUCK3_OCP, + BD70528_INT_LED1_OCP, + BD70528_INT_LED2_OCP, + BD70528_INT_BUCK1_FULLON, + BD70528_INT_BUCK2_FULLON, + /* PMU register interrupts */ + BD70528_INT_SHORTPUSH, + BD70528_INT_AUTO_WAKEUP, + BD70528_INT_STATE_CHANGE, + /* Charger 1 register IRQs */ + BD70528_INT_BAT_OV_RES, + BD70528_INT_BAT_OV_DET, + BD70528_INT_DBAT_DET, + BD70528_INT_BATTSD_COLD_RES, + BD70528_INT_BATTSD_COLD_DET, + BD70528_INT_BATTSD_HOT_RES, + BD70528_INT_BATTSD_HOT_DET, + BD70528_INT_CHG_TSD, + /* Charger 2 register IRQs */ + BD70528_INT_BAT_RMV, + BD70528_INT_BAT_DET, + BD70528_INT_DCIN2_OV_RES, + BD70528_INT_DCIN2_OV_DET, + BD70528_INT_DCIN2_RMV, + BD70528_INT_DCIN2_DET, + BD70528_INT_DCIN1_RMV, + BD70528_INT_DCIN1_DET, + /* RTC register IRQs */ + BD70528_INT_RTC_ALARM, + BD70528_INT_ELPS_TIM, + /* GPIO register IRQs */ + BD70528_INT_GPIO0, + BD70528_INT_GPIO1, + BD70528_INT_GPIO2, + BD70528_INT_GPIO3, + /* Invalid operation register IRQs */ + BD70528_INT_BUCK1_DVS_OPFAIL, + BD70528_INT_BUCK2_DVS_OPFAIL, + BD70528_INT_BUCK3_DVS_OPFAIL, + BD70528_INT_LED1_VOLT_OPFAIL, + BD70528_INT_LED2_VOLT_OPFAIL, +}; + +/* Masks */ +#define BD70528_INT_LONGPUSH_MASK 0x1 +#define BD70528_INT_WDT_MASK 0x2 +#define BD70528_INT_HWRESET_MASK 0x4 +#define BD70528_INT_RSTB_FAULT_MASK 0x8 +#define BD70528_INT_VBAT_UVLO_MASK 0x10 +#define BD70528_INT_TSD_MASK 0x20 +#define BD70528_INT_RSTIN_MASK 0x40 + +#define BD70528_INT_BUCK1_FAULT_MASK 0x1 +#define BD70528_INT_BUCK2_FAULT_MASK 0x2 +#define BD70528_INT_BUCK3_FAULT_MASK 0x4 +#define BD70528_INT_LDO1_FAULT_MASK 0x8 +#define BD70528_INT_LDO2_FAULT_MASK 0x10 +#define BD70528_INT_LDO3_FAULT_MASK 0x20 +#define BD70528_INT_LED1_FAULT_MASK 0x40 +#define BD70528_INT_LED2_FAULT_MASK 0x80 + +#define BD70528_INT_BUCK1_OCP_MASK 0x1 +#define BD70528_INT_BUCK2_OCP_MASK 0x2 +#define BD70528_INT_BUCK3_OCP_MASK 0x4 +#define BD70528_INT_LED1_OCP_MASK 0x8 +#define BD70528_INT_LED2_OCP_MASK 0x10 +#define BD70528_INT_BUCK1_FULLON_MASK 0x20 +#define BD70528_INT_BUCK2_FULLON_MASK 0x40 + +#define BD70528_INT_SHORTPUSH_MASK 0x1 +#define BD70528_INT_AUTO_WAKEUP_MASK 0x2 +#define BD70528_INT_STATE_CHANGE_MASK 0x10 + +#define BD70528_INT_BAT_OV_RES_MASK 0x1 +#define BD70528_INT_BAT_OV_DET_MASK 0x2 +#define BD70528_INT_DBAT_DET_MASK 0x4 +#define BD70528_INT_BATTSD_COLD_RES_MASK 0x8 +#define BD70528_INT_BATTSD_COLD_DET_MASK 0x10 +#define BD70528_INT_BATTSD_HOT_RES_MASK 0x20 +#define BD70528_INT_BATTSD_HOT_DET_MASK 0x40 +#define BD70528_INT_CHG_TSD_MASK 0x80 + +#define BD70528_INT_BAT_RMV_MASK 0x1 +#define BD70528_INT_BAT_DET_MASK 0x2 +#define BD70528_INT_DCIN2_OV_RES_MASK 0x4 +#define BD70528_INT_DCIN2_OV_DET_MASK 0x8 +#define BD70528_INT_DCIN2_RMV_MASK 0x10 +#define BD70528_INT_DCIN2_DET_MASK 0x20 +#define BD70528_INT_DCIN1_RMV_MASK 0x40 +#define BD70528_INT_DCIN1_DET_MASK 0x80 + +#define BD70528_INT_RTC_ALARM_MASK 0x1 +#define BD70528_INT_ELPS_TIM_MASK 0x2 + +#define BD70528_INT_GPIO0_MASK 0x1 +#define BD70528_INT_GPIO1_MASK 0x2 +#define BD70528_INT_GPIO2_MASK 0x4 +#define BD70528_INT_GPIO3_MASK 0x8 + +#define BD70528_INT_BUCK1_DVS_OPFAIL_MASK 0x1 +#define BD70528_INT_BUCK2_DVS_OPFAIL_MASK 0x2 +#define BD70528_INT_BUCK3_DVS_OPFAIL_MASK 0x4 +#define BD70528_INT_LED1_VOLT_OPFAIL_MASK 0x10 +#define BD70528_INT_LED2_VOLT_OPFAIL_MASK 0x20 + +#define BD70528_DEBOUNCE_MASK 0x3 + +#define BD70528_DEBOUNCE_DISABLE 0 +#define BD70528_DEBOUNCE_15MS 1 +#define BD70528_DEBOUNCE_30MS 2 +#define BD70528_DEBOUNCE_50MS 3 + +#define BD70528_GPIO_DRIVE_MASK 0x2 +#define BD70528_GPIO_PUSH_PULL 0x0 +#define BD70528_GPIO_OPEN_DRAIN 0x2 + +#define BD70528_GPIO_OUT_EN_MASK 0x80 +#define BD70528_GPIO_OUT_ENABLE 0x80 +#define BD70528_GPIO_OUT_DISABLE 0x0 + +#define BD70528_GPIO_OUT_HI 0x1 +#define BD70528_GPIO_OUT_LO 0x0 +#define BD70528_GPIO_OUT_MASK 0x1 + +#define BD70528_GPIO_IN_STATE_BASE 1 + +#define BD70528_CLK_OUT_EN_MASK 0x1 + +/* RTC masks to mask out reserved bits */ + +#define BD70528_MASK_RTC_SEC 0x7f +#define BD70528_MASK_RTC_MINUTE 0x7f +#define BD70528_MASK_RTC_HOUR_24H 0x80 +#define BD70528_MASK_RTC_HOUR_PM 0x20 +#define BD70528_MASK_RTC_HOUR 0x1f +#define BD70528_MASK_RTC_DAY 0x3f +#define BD70528_MASK_RTC_WEEK 0x07 +#define BD70528_MASK_RTC_MONTH 0x1f +#define BD70528_MASK_RTC_YEAR 0xff +#define BD70528_MASK_RTC_COUNT_L 0x7f + +#define BD70528_MASK_ELAPSED_TIMER_EN 0x1 +/* Mask second, min and hour fields + * HW would support ALM irq for over 24h + * (by setting day, month and year too) + * but as we wish to keep this same as for + * wake-up we limit ALM to 24H and only + * unmask sec, min and hour + */ +#define BD70528_MASK_ALM_EN 0x7 +#define BD70528_MASK_WAKE_EN 0x1 + +/* WDT masks */ +#define BD70528_MASK_WDT_EN 0x1 +#define BD70528_MASK_WDT_HOUR 0x1 +#define BD70528_MASK_WDT_MINUTE 0x7f +#define BD70528_MASK_WDT_SEC 0x7f + +#define BD70528_WDT_STATE_BIT 0x1 +#define BD70528_ELAPSED_STATE_BIT 0x2 +#define BD70528_WAKE_STATE_BIT 0x4 + +/* Charger masks */ +#define BD70528_MASK_CHG_STAT 0x7f +#define BD70528_MASK_CHG_BAT_TIMER 0x20 +#define BD70528_MASK_CHG_BAT_OVERVOLT 0x10 +#define BD70528_MASK_CHG_BAT_DETECT 0x1 +#define BD70528_MASK_CHG_DCIN1_UVLO 0x1 +#define BD70528_MASK_CHG_DCIN_ILIM 0x3f +#define BD70528_MASK_CHG_CHG_CURR 0x1f +#define BD70528_MASK_CHG_TRICKLE_CURR 0x10 + +/* + * Note, external battery register is the lonely rider at + * address 0xc5. See how to stuff that in the regmap + */ +#define BD70528_MAX_REGISTER 0x94 + +/* Buck control masks */ +#define BD70528_MASK_RUN_EN 0x4 +#define BD70528_MASK_STBY_EN 0x2 +#define BD70528_MASK_IDLE_EN 0x1 +#define BD70528_MASK_LED1_EN 0x1 +#define BD70528_MASK_LED2_EN 0x10 + +#define BD70528_MASK_BUCK_VOLT 0xf +#define BD70528_MASK_LDO_VOLT 0x1f +#define BD70528_MASK_LED1_VOLT 0x1 +#define BD70528_MASK_LED2_VOLT 0x10 + +/* Misc irq masks */ +#define BD70528_INT_MASK_SHORT_PUSH 1 +#define BD70528_INT_MASK_AUTO_WAKE 2 +#define BD70528_INT_MASK_POWER_STATE 4 + +#define BD70528_MASK_BUCK_RAMP 0x10 +#define BD70528_SIFT_BUCK_RAMP 4 + +#if IS_ENABLED(CONFIG_BD70528_WATCHDOG) + +int bd70528_wdt_set(struct rohm_regmap_dev *data, int enable, int *old_state); +void bd70528_wdt_lock(struct rohm_regmap_dev *data); +void bd70528_wdt_unlock(struct rohm_regmap_dev *data); + +#else /* CONFIG_BD70528_WATCHDOG */ + +static inline int bd70528_wdt_set(struct rohm_regmap_dev *data, int enable, + int *old_state) +{ + return 0; +} + +static inline void bd70528_wdt_lock(struct rohm_regmap_dev *data) +{ +} + +static inline void bd70528_wdt_unlock(struct rohm_regmap_dev *data) +{ +} + +#endif /* CONFIG_BD70528_WATCHDOG */ + +#endif /* __LINUX_MFD_BD70528_H__ */ From 0dae7f585704e4b2c32a738ed62aeecbfbb82c28 Mon Sep 17 00:00:00 2001 From: Matti Vaittinen Date: Mon, 3 Jun 2019 10:25:39 +0300 Subject: [PATCH 06/45] clk: bd718x7: Support ROHM BD70528 clk block ROHM BD70528 is an ultra low power PMIC with similar 32K clk as bd718x7. Only difference (from clk perspective) is register address. Add support for controlling BD70528 clk using bd718x7 driver. Signed-off-by: Matti Vaittinen Acked-by: Stephen Boyd Signed-off-by: Lee Jones --- drivers/clk/Kconfig | 6 +++--- drivers/clk/clk-bd718x7.c | 20 ++++++++++++++++---- 2 files changed, 19 insertions(+), 7 deletions(-) diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig index fc1e0cf44995..dd411c86b979 100644 --- a/drivers/clk/Kconfig +++ b/drivers/clk/Kconfig @@ -293,10 +293,10 @@ config COMMON_CLK_STM32H7 config COMMON_CLK_BD718XX tristate "Clock driver for ROHM BD718x7 PMIC" - depends on MFD_ROHM_BD718XX + depends on MFD_ROHM_BD718XX || MFD_ROHM_BD70528 help - This driver supports ROHM BD71837 and ROHM BD71847 - PMICs clock gates. + This driver supports ROHM BD71837, ROHM BD71847 and + ROHM BD70528 PMICs clock gates. config COMMON_CLK_FIXED_MMIO bool "Clock driver for Memory Mapped Fixed values" diff --git a/drivers/clk/clk-bd718x7.c b/drivers/clk/clk-bd718x7.c index 461228ebf703..ae6e5baee330 100644 --- a/drivers/clk/clk-bd718x7.c +++ b/drivers/clk/clk-bd718x7.c @@ -8,6 +8,7 @@ #include #include #include +#include #include #include #include @@ -86,9 +87,20 @@ static int bd71837_clk_probe(struct platform_device *pdev) dev_err(&pdev->dev, "No parent clk found\n"); return -EINVAL; } - - c->reg = BD718XX_REG_OUT32K; - c->mask = BD718XX_OUT32K_EN; + switch (mfd->chip_type) { + case ROHM_CHIP_TYPE_BD71837: + case ROHM_CHIP_TYPE_BD71847: + c->reg = BD718XX_REG_OUT32K; + c->mask = BD718XX_OUT32K_EN; + break; + case ROHM_CHIP_TYPE_BD70528: + c->reg = BD70528_REG_CLK_OUT; + c->mask = BD70528_CLK_OUT_EN_MASK; + break; + default: + dev_err(&pdev->dev, "Unknown clk chip\n"); + return -EINVAL; + } c->mfd = mfd; c->pdev = pdev; c->hw.init = &init; @@ -119,5 +131,5 @@ static struct platform_driver bd71837_clk = { module_platform_driver(bd71837_clk); MODULE_AUTHOR("Matti Vaittinen "); -MODULE_DESCRIPTION("BD71837/BD71847 chip clk driver"); +MODULE_DESCRIPTION("BD71837/BD71847/BD70528 chip clk driver"); MODULE_LICENSE("GPL"); From 478bb8f32e26c2497c1c594f547ecbfec9c55b98 Mon Sep 17 00:00:00 2001 From: Matti Vaittinen Date: Mon, 3 Jun 2019 10:26:12 +0300 Subject: [PATCH 07/45] dt-bindings: mfd: Document first ROHM BD70528 bindings Document bindings for regulators (3 bucks, 3 LDOs and 2 LED drivers) and 4 GPIO pins which can be configured for I/O or as interrupt sources withe configurable trigger levels. Signed-off-by: Matti Vaittinen Reviewed-by: Rob Herring Acked-by: Linus Walleij Signed-off-by: Lee Jones --- .../bindings/mfd/rohm,bd70528-pmic.txt | 102 ++++++++++++++++++ 1 file changed, 102 insertions(+) create mode 100644 Documentation/devicetree/bindings/mfd/rohm,bd70528-pmic.txt diff --git a/Documentation/devicetree/bindings/mfd/rohm,bd70528-pmic.txt b/Documentation/devicetree/bindings/mfd/rohm,bd70528-pmic.txt new file mode 100644 index 000000000000..c3c02ce73cde --- /dev/null +++ b/Documentation/devicetree/bindings/mfd/rohm,bd70528-pmic.txt @@ -0,0 +1,102 @@ +* ROHM BD70528 Power Management Integrated Circuit bindings + +BD70528MWV is an ultra-low quiescent current general purpose, single-chip, +power management IC for battery-powered portable devices. The IC +integrates 3 ultra-low current consumption buck converters, 3 LDOs and 2 +LED Drivers. Also included are 4 GPIOs, a real-time clock (RTC), a 32kHz +clock gate, high-accuracy VREF for use with an external ADC, flexible +dual-input power path, 10 bit SAR ADC for battery temperature monitor and +1S battery charger with scalable charge currents. + +Required properties: + - compatible : Should be "rohm,bd70528" + - reg : I2C slave address. + - interrupts : The interrupt line the device is connected to. + - interrupt-controller : To indicate BD70528 acts as an interrupt controller. + - #interrupt-cells : Should be 2. Usage is compliant to the 2 cells + variant of ../interrupt-controller/interrupts.txt + - gpio-controller : To indicate BD70528 acts as a GPIO controller. + - #gpio-cells : Should be 2. The first cell is the pin number and + the second cell is used to specify flags. See + ../gpio/gpio.txt for more information. + - #clock-cells : Should be 0. + - regulators: : List of child nodes that specify the regulators. + Please see ../regulator/rohm,bd70528-regulator.txt + +Optional properties: + - clock-output-names : Should contain name for output clock. + +Example: +/* External oscillator */ +osc: oscillator { + compatible = "fixed-clock"; + #clock-cells = <1>; + clock-frequency = <32768>; + clock-output-names = "osc"; +}; + +pmic: pmic@4b { + compatible = "rohm,bd70528"; + reg = <0x4b>; + interrupt-parent = <&gpio1>; + interrupts = <29 GPIO_ACTIVE_LOW>; + clocks = <&osc 0>; + #clock-cells = <0>; + clock-output-names = "bd70528-32k-out"; + #gpio-cells = <2>; + gpio-controller; + interrupt-controller; + #interrupt-cells = <2>; + + regulators { + buck1: BUCK1 { + regulator-name = "buck1"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <3400000>; + regulator-boot-on; + regulator-ramp-delay = <125>; + }; + buck2: BUCK2 { + regulator-name = "buck2"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <3300000>; + regulator-boot-on; + regulator-ramp-delay = <125>; + }; + buck3: BUCK3 { + regulator-name = "buck3"; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <1800000>; + regulator-boot-on; + regulator-ramp-delay = <250>; + }; + ldo1: LDO1 { + regulator-name = "ldo1"; + regulator-min-microvolt = <1650000>; + regulator-max-microvolt = <3300000>; + regulator-boot-on; + }; + ldo2: LDO2 { + regulator-name = "ldo2"; + regulator-min-microvolt = <1650000>; + regulator-max-microvolt = <3300000>; + regulator-boot-on; + }; + + ldo3: LDO3 { + regulator-name = "ldo3"; + regulator-min-microvolt = <1650000>; + regulator-max-microvolt = <3300000>; + }; + led_ldo1: LED_LDO1 { + regulator-name = "led_ldo1"; + regulator-min-microvolt = <200000>; + regulator-max-microvolt = <300000>; + }; + led_ldo2: LED_LDO2 { + regulator-name = "led_ldo2"; + regulator-min-microvolt = <200000>; + regulator-max-microvolt = <300000>; + }; + }; +}; From 18bc64b3aebfa693f34463d2bcad9c82e21af9f6 Mon Sep 17 00:00:00 2001 From: Matti Vaittinen Date: Mon, 3 Jun 2019 10:26:45 +0300 Subject: [PATCH 08/45] gpio: Initial support for ROHM bd70528 GPIO block ROHM BD70528 PMIC has 4 GPIO pins. Allow them to be controlled by GPIO framework. IRQs are handled by regmap-irq and GPIO driver is not aware of the irq usage. Signed-off-by: Matti Vaittinen Reviewed-by: Linus Walleij Signed-off-by: Lee Jones --- drivers/gpio/Kconfig | 11 ++ drivers/gpio/Makefile | 1 + drivers/gpio/gpio-bd70528.c | 232 ++++++++++++++++++++++++++++++++++++ 3 files changed, 244 insertions(+) create mode 100644 drivers/gpio/gpio-bd70528.c diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig index 8023d03ec362..87dbbd03910d 100644 --- a/drivers/gpio/Kconfig +++ b/drivers/gpio/Kconfig @@ -977,6 +977,17 @@ config GPIO_ARIZONA help Support for GPIOs on Wolfson Arizona class devices. +config GPIO_BD70528 + tristate "ROHM BD70528 GPIO support" + depends on MFD_ROHM_BD70528 + help + Support for GPIOs on ROHM BD70528 PMIC. There are four GPIOs + available on the ROHM PMIC in total. The GPIOs can also + generate interrupts. + + This driver can also be built as a module. If so, the module + will be called gpio-bd70528. + config GPIO_BD9571MWV tristate "ROHM BD9571 GPIO support" depends on MFD_BD9571MWV diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile index 6700eee860b7..10efc4f743fe 100644 --- a/drivers/gpio/Makefile +++ b/drivers/gpio/Makefile @@ -35,6 +35,7 @@ obj-$(CONFIG_GPIO_ATH79) += gpio-ath79.o obj-$(CONFIG_GPIO_ASPEED) += gpio-aspeed.o obj-$(CONFIG_GPIO_RASPBERRYPI_EXP) += gpio-raspberrypi-exp.o obj-$(CONFIG_GPIO_BCM_KONA) += gpio-bcm-kona.o +obj-$(CONFIG_GPIO_BD70528) += gpio-bd70528.o obj-$(CONFIG_GPIO_BD9571MWV) += gpio-bd9571mwv.o obj-$(CONFIG_GPIO_BRCMSTB) += gpio-brcmstb.o obj-$(CONFIG_GPIO_BT8XX) += gpio-bt8xx.o diff --git a/drivers/gpio/gpio-bd70528.c b/drivers/gpio/gpio-bd70528.c new file mode 100644 index 000000000000..fd85605d2dab --- /dev/null +++ b/drivers/gpio/gpio-bd70528.c @@ -0,0 +1,232 @@ +// SPDX-License-Identifier: GPL-2.0 +// Copyright (C) 2018 ROHM Semiconductors +// gpio-bd70528.c ROHM BD70528MWV gpio driver + +#include +#include +#include +#include +#include + +#define GPIO_IN_REG(offset) (BD70528_REG_GPIO1_IN + (offset) * 2) +#define GPIO_OUT_REG(offset) (BD70528_REG_GPIO1_OUT + (offset) * 2) + +struct bd70528_gpio { + struct rohm_regmap_dev chip; + struct gpio_chip gpio; +}; + +static int bd70528_set_debounce(struct bd70528_gpio *bdgpio, + unsigned int offset, unsigned int debounce) +{ + u8 val; + + switch (debounce) { + case 0: + val = BD70528_DEBOUNCE_DISABLE; + break; + case 1 ... 15: + val = BD70528_DEBOUNCE_15MS; + break; + case 16 ... 30: + val = BD70528_DEBOUNCE_30MS; + break; + case 31 ... 50: + val = BD70528_DEBOUNCE_50MS; + break; + default: + dev_err(bdgpio->chip.dev, + "Invalid debouce value %u\n", debounce); + return -EINVAL; + } + return regmap_update_bits(bdgpio->chip.regmap, GPIO_IN_REG(offset), + BD70528_DEBOUNCE_MASK, val); +} + +static int bd70528_get_direction(struct gpio_chip *chip, unsigned int offset) +{ + struct bd70528_gpio *bdgpio = gpiochip_get_data(chip); + int val, ret; + + /* Do we need to do something to IRQs here? */ + ret = regmap_read(bdgpio->chip.regmap, GPIO_OUT_REG(offset), &val); + if (ret) { + dev_err(bdgpio->chip.dev, "Could not read gpio direction\n"); + return ret; + } + + return !(val & BD70528_GPIO_OUT_EN_MASK); +} + +static int bd70528_gpio_set_config(struct gpio_chip *chip, unsigned int offset, + unsigned long config) +{ + struct bd70528_gpio *bdgpio = gpiochip_get_data(chip); + + switch (pinconf_to_config_param(config)) { + case PIN_CONFIG_DRIVE_OPEN_DRAIN: + return regmap_update_bits(bdgpio->chip.regmap, + GPIO_OUT_REG(offset), + BD70528_GPIO_DRIVE_MASK, + BD70528_GPIO_OPEN_DRAIN); + break; + case PIN_CONFIG_DRIVE_PUSH_PULL: + return regmap_update_bits(bdgpio->chip.regmap, + GPIO_OUT_REG(offset), + BD70528_GPIO_DRIVE_MASK, + BD70528_GPIO_PUSH_PULL); + break; + case PIN_CONFIG_INPUT_DEBOUNCE: + return bd70528_set_debounce(bdgpio, offset, + pinconf_to_config_argument(config)); + break; + default: + break; + } + return -ENOTSUPP; +} + +static int bd70528_direction_input(struct gpio_chip *chip, unsigned int offset) +{ + struct bd70528_gpio *bdgpio = gpiochip_get_data(chip); + + /* Do we need to do something to IRQs here? */ + return regmap_update_bits(bdgpio->chip.regmap, GPIO_OUT_REG(offset), + BD70528_GPIO_OUT_EN_MASK, + BD70528_GPIO_OUT_DISABLE); +} + +static void bd70528_gpio_set(struct gpio_chip *chip, unsigned int offset, + int value) +{ + int ret; + struct bd70528_gpio *bdgpio = gpiochip_get_data(chip); + u8 val = (value) ? BD70528_GPIO_OUT_HI : BD70528_GPIO_OUT_LO; + + ret = regmap_update_bits(bdgpio->chip.regmap, GPIO_OUT_REG(offset), + BD70528_GPIO_OUT_MASK, val); + if (ret) + dev_err(bdgpio->chip.dev, "Could not set gpio to %d\n", value); +} + +static int bd70528_direction_output(struct gpio_chip *chip, unsigned int offset, + int value) +{ + struct bd70528_gpio *bdgpio = gpiochip_get_data(chip); + + bd70528_gpio_set(chip, offset, value); + return regmap_update_bits(bdgpio->chip.regmap, GPIO_OUT_REG(offset), + BD70528_GPIO_OUT_EN_MASK, + BD70528_GPIO_OUT_ENABLE); +} + +#define GPIO_IN_STATE_MASK(offset) (BD70528_GPIO_IN_STATE_BASE << (offset)) + +static int bd70528_gpio_get_o(struct bd70528_gpio *bdgpio, unsigned int offset) +{ + int ret; + unsigned int val; + + ret = regmap_read(bdgpio->chip.regmap, GPIO_OUT_REG(offset), &val); + if (!ret) + ret = !!(val & BD70528_GPIO_OUT_MASK); + else + dev_err(bdgpio->chip.dev, "GPIO (out) state read failed\n"); + + return ret; +} + +static int bd70528_gpio_get_i(struct bd70528_gpio *bdgpio, unsigned int offset) +{ + unsigned int val; + int ret; + + ret = regmap_read(bdgpio->chip.regmap, BD70528_REG_GPIO_STATE, &val); + + if (!ret) + ret = !(val & GPIO_IN_STATE_MASK(offset)); + else + dev_err(bdgpio->chip.dev, "GPIO (in) state read failed\n"); + + return ret; +} + +static int bd70528_gpio_get(struct gpio_chip *chip, unsigned int offset) +{ + int ret = -EINVAL; + struct bd70528_gpio *bdgpio = gpiochip_get_data(chip); + + /* + * There is a race condition where someone might be changing the + * GPIO direction after we get it but before we read the value. But + * application design where GPIO direction may be changed just when + * we read GPIO value would be pointless as reader could not know + * whether the returned high/low state is caused by input or output. + * Or then there must be other ways to mitigate the issue. Thus + * locking would make no sense. + */ + ret = bd70528_get_direction(chip, offset); + if (ret == 0) + ret = bd70528_gpio_get_o(bdgpio, offset); + else if (ret == 1) + ret = bd70528_gpio_get_i(bdgpio, offset); + else + dev_err(bdgpio->chip.dev, "failed to read GPIO direction\n"); + + return ret; +} + +static int bd70528_probe(struct platform_device *pdev) +{ + struct bd70528_gpio *bdgpio; + struct rohm_regmap_dev *bd70528; + int ret; + + bd70528 = dev_get_drvdata(pdev->dev.parent); + if (!bd70528) { + dev_err(&pdev->dev, "No MFD driver data\n"); + return -EINVAL; + } + + bdgpio = devm_kzalloc(&pdev->dev, sizeof(*bdgpio), + GFP_KERNEL); + if (!bdgpio) + return -ENOMEM; + bdgpio->chip.dev = &pdev->dev; + bdgpio->gpio.parent = pdev->dev.parent; + bdgpio->gpio.label = "bd70528-gpio"; + bdgpio->gpio.owner = THIS_MODULE; + bdgpio->gpio.get_direction = bd70528_get_direction; + bdgpio->gpio.direction_input = bd70528_direction_input; + bdgpio->gpio.direction_output = bd70528_direction_output; + bdgpio->gpio.set_config = bd70528_gpio_set_config; + bdgpio->gpio.can_sleep = true; + bdgpio->gpio.get = bd70528_gpio_get; + bdgpio->gpio.set = bd70528_gpio_set; + bdgpio->gpio.ngpio = 4; + bdgpio->gpio.base = -1; +#ifdef CONFIG_OF_GPIO + bdgpio->gpio.of_node = pdev->dev.parent->of_node; +#endif + bdgpio->chip.regmap = bd70528->regmap; + + ret = devm_gpiochip_add_data(&pdev->dev, &bdgpio->gpio, + bdgpio); + if (ret) + dev_err(&pdev->dev, "gpio_init: Failed to add bd70528-gpio\n"); + + return ret; +} + +static struct platform_driver bd70528_gpio = { + .driver = { + .name = "bd70528-gpio" + }, + .probe = bd70528_probe, +}; + +module_platform_driver(bd70528_gpio); + +MODULE_AUTHOR("Matti Vaittinen "); +MODULE_DESCRIPTION("BD70528 voltage regulator driver"); +MODULE_LICENSE("GPL"); From 32a4a4ebf76848828d67f519d07af9eadb6e8300 Mon Sep 17 00:00:00 2001 From: Matti Vaittinen Date: Mon, 3 Jun 2019 10:27:14 +0300 Subject: [PATCH 09/45] rtc: bd70528: Initial support for ROHM bd70528 RTC Support RTC block in ROHM bd70528 power management IC. Support getting and setting the time and date as well as arming an alarm which can also be used to wake the PMIC from standby state. HW supports wake interrupt only for the next 24 hours (sec, minute and hour information only) so we limit also the alarm interrupt to this 24 hours for the sake of consistency. Signed-off-by: Matti Vaittinen Acked-by: Alexandre Belloni Signed-off-by: Lee Jones --- drivers/rtc/Kconfig | 8 + drivers/rtc/Makefile | 1 + drivers/rtc/rtc-bd70528.c | 500 ++++++++++++++++++++++++++++++++++++++ 3 files changed, 509 insertions(+) create mode 100644 drivers/rtc/rtc-bd70528.c diff --git a/drivers/rtc/Kconfig b/drivers/rtc/Kconfig index 7b8e156dbf38..060803a137be 100644 --- a/drivers/rtc/Kconfig +++ b/drivers/rtc/Kconfig @@ -497,6 +497,14 @@ config RTC_DRV_M41T80_WDT help If you say Y here you will get support for the watchdog timer in the ST M41T60 and M41T80 RTC chips series. +config RTC_DRV_BD70528 + tristate "ROHM BD70528 PMIC RTC" + help + If you say Y here you will get support for the RTC + on ROHM BD70528 Power Management IC. + + This driver can also be built as a module. If so, the module + will be called rtc-bd70528. config RTC_DRV_BQ32K tristate "TI BQ32000" diff --git a/drivers/rtc/Makefile b/drivers/rtc/Makefile index 9d997faa2c26..6b09c21dc1b6 100644 --- a/drivers/rtc/Makefile +++ b/drivers/rtc/Makefile @@ -38,6 +38,7 @@ obj-$(CONFIG_RTC_DRV_ASPEED) += rtc-aspeed.o obj-$(CONFIG_RTC_DRV_AT91RM9200)+= rtc-at91rm9200.o obj-$(CONFIG_RTC_DRV_AT91SAM9) += rtc-at91sam9.o obj-$(CONFIG_RTC_DRV_AU1XXX) += rtc-au1xxx.o +obj-$(CONFIG_RTC_DRV_BD70528) += rtc-bd70528.o obj-$(CONFIG_RTC_DRV_BQ32K) += rtc-bq32k.o obj-$(CONFIG_RTC_DRV_BQ4802) += rtc-bq4802.o obj-$(CONFIG_RTC_DRV_BRCMSTB) += rtc-brcmstb-waketimer.o diff --git a/drivers/rtc/rtc-bd70528.c b/drivers/rtc/rtc-bd70528.c new file mode 100644 index 000000000000..f9bdd555e1a2 --- /dev/null +++ b/drivers/rtc/rtc-bd70528.c @@ -0,0 +1,500 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +// +// Copyright (C) 2018 ROHM Semiconductors +// +// RTC driver for ROHM BD70528 PMIC + +#include +#include +#include +#include +#include +#include +#include + +/* + * We read regs RTC_SEC => RTC_YEAR + * this struct is ordered according to chip registers. + * Keep it u8 only to avoid padding issues. + */ +struct bd70528_rtc_day { + u8 sec; + u8 min; + u8 hour; +} __packed; + +struct bd70528_rtc_data { + struct bd70528_rtc_day time; + u8 week; + u8 day; + u8 month; + u8 year; +} __packed; + +struct bd70528_rtc_wake { + struct bd70528_rtc_day time; + u8 ctrl; +} __packed; + +struct bd70528_rtc_alm { + struct bd70528_rtc_data data; + u8 alm_mask; + u8 alm_repeat; +} __packed; + +struct bd70528_rtc { + struct rohm_regmap_dev *mfd; + struct device *dev; +}; + +static int bd70528_set_wake(struct rohm_regmap_dev *bd70528, + int enable, int *old_state) +{ + int ret; + unsigned int ctrl_reg; + + ret = regmap_read(bd70528->regmap, BD70528_REG_WAKE_EN, &ctrl_reg); + if (ret) + return ret; + + if (old_state) { + if (ctrl_reg & BD70528_MASK_WAKE_EN) + *old_state |= BD70528_WAKE_STATE_BIT; + else + *old_state &= ~BD70528_WAKE_STATE_BIT; + + if (!enable == !(*old_state & BD70528_WAKE_STATE_BIT)) + return 0; + } + + if (enable) + ctrl_reg |= BD70528_MASK_WAKE_EN; + else + ctrl_reg &= ~BD70528_MASK_WAKE_EN; + + return regmap_write(bd70528->regmap, BD70528_REG_WAKE_EN, + ctrl_reg); +} + +static int bd70528_set_elapsed_tmr(struct rohm_regmap_dev *bd70528, + int enable, int *old_state) +{ + int ret; + unsigned int ctrl_reg; + + /* + * TBD + * What is the purpose of elapsed timer ? + * Is the timeout registers counting down, or is the disable - re-enable + * going to restart the elapsed-time counting? If counting is restarted + * the timeout should be decreased by the amount of time that has + * elapsed since starting the timer. Maybe we should store the monotonic + * clock value when timer is started so that if RTC is set while timer + * is armed we could do the compensation. This is a hack if RTC/system + * clk are drifting. OTOH, RTC controlled via I2C is in any case + * inaccurate... + */ + ret = regmap_read(bd70528->regmap, BD70528_REG_ELAPSED_TIMER_EN, + &ctrl_reg); + if (ret) + return ret; + + if (old_state) { + if (ctrl_reg & BD70528_MASK_ELAPSED_TIMER_EN) + *old_state |= BD70528_ELAPSED_STATE_BIT; + else + *old_state &= ~BD70528_ELAPSED_STATE_BIT; + + if ((!enable) == (!(*old_state & BD70528_ELAPSED_STATE_BIT))) + return 0; + } + + if (enable) + ctrl_reg |= BD70528_MASK_ELAPSED_TIMER_EN; + else + ctrl_reg &= ~BD70528_MASK_ELAPSED_TIMER_EN; + + return regmap_write(bd70528->regmap, BD70528_REG_ELAPSED_TIMER_EN, + ctrl_reg); +} + +static int bd70528_set_rtc_based_timers(struct bd70528_rtc *r, int new_state, + int *old_state) +{ + int ret; + + ret = bd70528_wdt_set(r->mfd, new_state & BD70528_WDT_STATE_BIT, + old_state); + if (ret) { + dev_err(r->dev, + "Failed to disable WDG for RTC setting (%d)\n", ret); + return ret; + } + ret = bd70528_set_elapsed_tmr(r->mfd, + new_state & BD70528_ELAPSED_STATE_BIT, + old_state); + if (ret) { + dev_err(r->dev, + "Failed to disable 'elapsed timer' for RTC setting\n"); + return ret; + } + ret = bd70528_set_wake(r->mfd, new_state & BD70528_WAKE_STATE_BIT, + old_state); + if (ret) { + dev_err(r->dev, + "Failed to disable 'wake timer' for RTC setting\n"); + return ret; + } + + return ret; +} + +static int bd70528_re_enable_rtc_based_timers(struct bd70528_rtc *r, + int old_state) +{ + return bd70528_set_rtc_based_timers(r, old_state, NULL); +} + +static int bd70528_disable_rtc_based_timers(struct bd70528_rtc *r, + int *old_state) +{ + return bd70528_set_rtc_based_timers(r, 0, old_state); +} + +static inline void tmday2rtc(struct rtc_time *t, struct bd70528_rtc_day *d) +{ + d->sec &= ~BD70528_MASK_RTC_SEC; + d->min &= ~BD70528_MASK_RTC_MINUTE; + d->hour &= ~BD70528_MASK_RTC_HOUR; + d->sec |= bin2bcd(t->tm_sec); + d->min |= bin2bcd(t->tm_min); + d->hour |= bin2bcd(t->tm_hour); +} + +static inline void tm2rtc(struct rtc_time *t, struct bd70528_rtc_data *r) +{ + r->day &= ~BD70528_MASK_RTC_DAY; + r->week &= ~BD70528_MASK_RTC_WEEK; + r->month &= ~BD70528_MASK_RTC_MONTH; + /* + * PM and 24H bits are not used by Wake - thus we clear them + * here and not in tmday2rtc() which is also used by wake. + */ + r->time.hour &= ~(BD70528_MASK_RTC_HOUR_PM | BD70528_MASK_RTC_HOUR_24H); + + tmday2rtc(t, &r->time); + /* + * We do always set time in 24H mode. + */ + r->time.hour |= BD70528_MASK_RTC_HOUR_24H; + r->day |= bin2bcd(t->tm_mday); + r->week |= bin2bcd(t->tm_wday); + r->month |= bin2bcd(t->tm_mon + 1); + r->year = bin2bcd(t->tm_year - 100); +} + +static inline void rtc2tm(struct bd70528_rtc_data *r, struct rtc_time *t) +{ + t->tm_sec = bcd2bin(r->time.sec & BD70528_MASK_RTC_SEC); + t->tm_min = bcd2bin(r->time.min & BD70528_MASK_RTC_MINUTE); + t->tm_hour = bcd2bin(r->time.hour & BD70528_MASK_RTC_HOUR); + /* + * If RTC is in 12H mode, then bit BD70528_MASK_RTC_HOUR_PM + * is not BCD value but tells whether it is AM or PM + */ + if (!(r->time.hour & BD70528_MASK_RTC_HOUR_24H)) { + t->tm_hour %= 12; + if (r->time.hour & BD70528_MASK_RTC_HOUR_PM) + t->tm_hour += 12; + } + t->tm_mday = bcd2bin(r->day & BD70528_MASK_RTC_DAY); + t->tm_mon = bcd2bin(r->month & BD70528_MASK_RTC_MONTH) - 1; + t->tm_year = 100 + bcd2bin(r->year & BD70528_MASK_RTC_YEAR); + t->tm_wday = bcd2bin(r->week & BD70528_MASK_RTC_WEEK); +} + +static int bd70528_set_alarm(struct device *dev, struct rtc_wkalrm *a) +{ + struct bd70528_rtc_wake wake; + struct bd70528_rtc_alm alm; + int ret; + struct bd70528_rtc *r = dev_get_drvdata(dev); + struct rohm_regmap_dev *bd70528 = r->mfd; + + ret = regmap_bulk_read(bd70528->regmap, BD70528_REG_RTC_WAKE_START, + &wake, sizeof(wake)); + if (ret) { + dev_err(dev, "Failed to read wake regs\n"); + return ret; + } + + ret = regmap_bulk_read(bd70528->regmap, BD70528_REG_RTC_ALM_START, + &alm, sizeof(alm)); + if (ret) { + dev_err(dev, "Failed to read alarm regs\n"); + return ret; + } + + tm2rtc(&a->time, &alm.data); + tmday2rtc(&a->time, &wake.time); + + if (a->enabled) { + alm.alm_mask &= ~BD70528_MASK_ALM_EN; + wake.ctrl |= BD70528_MASK_WAKE_EN; + } else { + alm.alm_mask |= BD70528_MASK_ALM_EN; + wake.ctrl &= ~BD70528_MASK_WAKE_EN; + } + + ret = regmap_bulk_write(bd70528->regmap, + BD70528_REG_RTC_WAKE_START, &wake, + sizeof(wake)); + if (ret) { + dev_err(dev, "Failed to set wake time\n"); + return ret; + } + ret = regmap_bulk_write(bd70528->regmap, BD70528_REG_RTC_ALM_START, + &alm, sizeof(alm)); + if (ret) + dev_err(dev, "Failed to set alarm time\n"); + + return ret; +} + +static int bd70528_read_alarm(struct device *dev, struct rtc_wkalrm *a) +{ + struct bd70528_rtc_alm alm; + int ret; + struct bd70528_rtc *r = dev_get_drvdata(dev); + struct rohm_regmap_dev *bd70528 = r->mfd; + + ret = regmap_bulk_read(bd70528->regmap, BD70528_REG_RTC_ALM_START, + &alm, sizeof(alm)); + if (ret) { + dev_err(dev, "Failed to read alarm regs\n"); + return ret; + } + + rtc2tm(&alm.data, &a->time); + a->time.tm_mday = -1; + a->time.tm_mon = -1; + a->time.tm_year = -1; + a->enabled = !(alm.alm_mask & BD70528_MASK_ALM_EN); + a->pending = 0; + + return 0; +} + +static int bd70528_set_time_locked(struct device *dev, struct rtc_time *t) +{ + int ret, tmpret, old_states; + struct bd70528_rtc_data rtc_data; + struct bd70528_rtc *r = dev_get_drvdata(dev); + struct rohm_regmap_dev *bd70528 = r->mfd; + + ret = bd70528_disable_rtc_based_timers(r, &old_states); + if (ret) + return ret; + + tmpret = regmap_bulk_read(bd70528->regmap, + BD70528_REG_RTC_START, &rtc_data, + sizeof(rtc_data)); + if (tmpret) { + dev_err(dev, "Failed to read RTC time registers\n"); + goto renable_out; + } + tm2rtc(t, &rtc_data); + + tmpret = regmap_bulk_write(bd70528->regmap, + BD70528_REG_RTC_START, &rtc_data, + sizeof(rtc_data)); + if (tmpret) { + dev_err(dev, "Failed to set RTC time\n"); + goto renable_out; + } + +renable_out: + ret = bd70528_re_enable_rtc_based_timers(r, old_states); + if (tmpret) + ret = tmpret; + + return ret; +} + +static int bd70528_set_time(struct device *dev, struct rtc_time *t) +{ + int ret; + struct bd70528_rtc *r = dev_get_drvdata(dev); + + bd70528_wdt_lock(r->mfd); + ret = bd70528_set_time_locked(dev, t); + bd70528_wdt_unlock(r->mfd); + return ret; +} + +static int bd70528_get_time(struct device *dev, struct rtc_time *t) +{ + struct bd70528_rtc *r = dev_get_drvdata(dev); + struct rohm_regmap_dev *bd70528 = r->mfd; + struct bd70528_rtc_data rtc_data; + int ret; + + /* read the RTC date and time registers all at once */ + ret = regmap_bulk_read(bd70528->regmap, + BD70528_REG_RTC_START, &rtc_data, + sizeof(rtc_data)); + if (ret) { + dev_err(dev, "Failed to read RTC time (err %d)\n", ret); + return ret; + } + + rtc2tm(&rtc_data, t); + + return 0; +} + +static int bd70528_alm_enable(struct device *dev, unsigned int enabled) +{ + int ret; + unsigned int enableval = BD70528_MASK_ALM_EN; + struct bd70528_rtc *r = dev_get_drvdata(dev); + + if (enabled) + enableval = 0; + + bd70528_wdt_lock(r->mfd); + ret = bd70528_set_wake(r->mfd, enabled, NULL); + if (ret) { + dev_err(dev, "Failed to change wake state\n"); + goto out_unlock; + } + ret = regmap_update_bits(r->mfd->regmap, BD70528_REG_RTC_ALM_MASK, + BD70528_MASK_ALM_EN, enableval); + if (ret) + dev_err(dev, "Failed to change alarm state\n"); + +out_unlock: + bd70528_wdt_unlock(r->mfd); + return ret; +} + +static const struct rtc_class_ops bd70528_rtc_ops = { + .read_time = bd70528_get_time, + .set_time = bd70528_set_time, + .read_alarm = bd70528_read_alarm, + .set_alarm = bd70528_set_alarm, + .alarm_irq_enable = bd70528_alm_enable, +}; + +static irqreturn_t alm_hndlr(int irq, void *data) +{ + struct rtc_device *rtc = data; + + rtc_update_irq(rtc, 1, RTC_IRQF | RTC_AF | RTC_PF); + return IRQ_HANDLED; +} + +static int bd70528_probe(struct platform_device *pdev) +{ + struct bd70528_rtc *bd_rtc; + struct rohm_regmap_dev *mfd; + int ret; + struct rtc_device *rtc; + int irq; + unsigned int hr; + + mfd = dev_get_drvdata(pdev->dev.parent); + if (!mfd) { + dev_err(&pdev->dev, "No MFD driver data\n"); + return -EINVAL; + } + bd_rtc = devm_kzalloc(&pdev->dev, sizeof(*bd_rtc), GFP_KERNEL); + if (!bd_rtc) + return -ENOMEM; + + bd_rtc->mfd = mfd; + bd_rtc->dev = &pdev->dev; + + irq = platform_get_irq_byname(pdev, "bd70528-rtc-alm"); + + if (irq < 0) { + dev_err(&pdev->dev, "Failed to get irq\n"); + return irq; + } + + platform_set_drvdata(pdev, bd_rtc); + + ret = regmap_read(mfd->regmap, BD70528_REG_RTC_HOUR, &hr); + + if (ret) { + dev_err(&pdev->dev, "Failed to reag RTC clock\n"); + return ret; + } + + if (!(hr & BD70528_MASK_RTC_HOUR_24H)) { + struct rtc_time t; + + ret = bd70528_get_time(&pdev->dev, &t); + + if (!ret) + ret = bd70528_set_time(&pdev->dev, &t); + + if (ret) { + dev_err(&pdev->dev, + "Setting 24H clock for RTC failed\n"); + return ret; + } + } + + device_set_wakeup_capable(&pdev->dev, true); + device_wakeup_enable(&pdev->dev); + + rtc = devm_rtc_allocate_device(&pdev->dev); + if (IS_ERR(rtc)) { + dev_err(&pdev->dev, "RTC device creation failed\n"); + return PTR_ERR(rtc); + } + + rtc->range_min = RTC_TIMESTAMP_BEGIN_2000; + rtc->range_max = RTC_TIMESTAMP_END_2099; + rtc->ops = &bd70528_rtc_ops; + + /* Request alarm IRQ prior to registerig the RTC */ + ret = devm_request_threaded_irq(&pdev->dev, irq, NULL, &alm_hndlr, + IRQF_ONESHOT, "bd70528-rtc", rtc); + if (ret) + return ret; + + /* + * BD70528 irq controller is not touching the main mask register. + * So enable the RTC block interrupts at main level. We can just + * leave them enabled as irq-controller should disable irqs + * from sub-registers when IRQ is disabled or freed. + */ + ret = regmap_update_bits(mfd->regmap, + BD70528_REG_INT_MAIN_MASK, + BD70528_INT_RTC_MASK, 0); + if (ret) { + dev_err(&pdev->dev, "Failed to enable RTC interrupts\n"); + return ret; + } + + ret = rtc_register_device(rtc); + if (ret) + dev_err(&pdev->dev, "Registering RTC failed\n"); + + return ret; +} + +static struct platform_driver bd70528_rtc = { + .driver = { + .name = "bd70528-rtc" + }, + .probe = bd70528_probe, +}; + +module_platform_driver(bd70528_rtc); + +MODULE_AUTHOR("Matti Vaittinen "); +MODULE_DESCRIPTION("BD70528 RTC driver"); +MODULE_LICENSE("GPL"); From f8c7f7ddd8ef0855d06cff5d1cc7713b556006a7 Mon Sep 17 00:00:00 2001 From: Matti Vaittinen Date: Mon, 3 Jun 2019 10:28:20 +0300 Subject: [PATCH 10/45] power: supply: Initial support for ROHM BD70528 PMIC charger block ROHM BD70528 PMIC includes battery charger block. Support charger staus queries and doing few basic settings like input current limit and charging current. Signed-off-by: Matti Vaittinen Acked-by: Sebastian Reichel Signed-off-by: Lee Jones --- drivers/power/supply/Kconfig | 9 + drivers/power/supply/Makefile | 1 + drivers/power/supply/bd70528-charger.c | 743 +++++++++++++++++++++++++ 3 files changed, 753 insertions(+) create mode 100644 drivers/power/supply/bd70528-charger.c diff --git a/drivers/power/supply/Kconfig b/drivers/power/supply/Kconfig index 26dacdab03cc..045ae83169c5 100644 --- a/drivers/power/supply/Kconfig +++ b/drivers/power/supply/Kconfig @@ -688,4 +688,13 @@ config CHARGER_UCS1002 Say Y to enable support for Microchip UCS1002 Programmable USB Port Power Controller with Charger Emulation. +config CHARGER_BD70528 + tristate "ROHM bd70528 charger driver" + depends on MFD_ROHM_BD70528 + default n + help + Say Y here to enable support for getting battery status + information and altering charger configurations from charger + block of the ROHM BD70528 Power Management IC. + endif # POWER_SUPPLY diff --git a/drivers/power/supply/Makefile b/drivers/power/supply/Makefile index f208273f9686..346a8ef5f348 100644 --- a/drivers/power/supply/Makefile +++ b/drivers/power/supply/Makefile @@ -90,3 +90,4 @@ obj-$(CONFIG_CHARGER_CROS_USBPD) += cros_usbpd-charger.o obj-$(CONFIG_CHARGER_SC2731) += sc2731_charger.o obj-$(CONFIG_FUEL_GAUGE_SC27XX) += sc27xx_fuel_gauge.o obj-$(CONFIG_CHARGER_UCS1002) += ucs1002_power.o +obj-$(CONFIG_CHARGER_BD70528) += bd70528-charger.o diff --git a/drivers/power/supply/bd70528-charger.c b/drivers/power/supply/bd70528-charger.c new file mode 100644 index 000000000000..1bb32b7226d7 --- /dev/null +++ b/drivers/power/supply/bd70528-charger.c @@ -0,0 +1,743 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +// +// Copyright (C) 2018 ROHM Semiconductors +// +// power-supply driver for ROHM BD70528 PMIC + +/* + * BD70528 charger HW state machine. + * + * The thermal shutdown state is not drawn. From any other state but + * battery error and suspend it is possible to go to TSD/TMP states + * if temperature is out of bounds. + * + * CHG_RST = H + * or CHG_EN=L + * or (DCIN2_UVLO=L && DCIN1_UVLO=L) + * or (DCIN2_OVLO=H & DCIN1_UVKLO=L) + * + * +--------------+ +--------------+ + * | | | | + * | Any state +-------> | Suspend | + * | | | | + * +--------------+ +------+-------+ + * | + * CHG_EN = H && BAT_DET = H && | + * No errors (temp, bat_ov, UVLO, | + * OVLO...) | + * | + * BAT_OV or +---------v----------+ + * (DBAT && TTRI) | | + * +-----------------+ Trickle Charge | <---------------+ + * | | | | + * | +-------+------------+ | + * | | | + * | | ^ | + * | V_BAT > VTRI_TH | | VBAT < VTRI_TH - 50mV | + * | | | | + * | v | | + * | | | + * | BAT_OV or +----------+----+ | + * | (DBAT && TFST) | | | + * | +----------------+ Fast Charge | | + * | | | | | + * v v +----+----------+ | + * | | + *+----------------+ ILIM_DET=L | ^ ILIM_DET | + *| | & CV_DET=H | | or CV_DET=L | + *| Battery Error | & VBAT > | | or VBAT < VRECHG_TH | + *| | VRECHG_TH | | or IBAT > IFST/x | + *+----------------+ & IBAT < | | | + * IFST/x v | | + * ^ | | + * | +---------+-+ | + * | | | | + * +-------------------+ Top OFF | | + * BAT_OV = H or | | | + * (DBAT && TFST) +-----+-----+ | + * | | + * Stay top-off for 15s | | + * v | + * | + * +--------+ | + * | | | + * | Done +-------------------------+ + * | | + * +--------+ VBAT < VRECHG_TH + */ + +#include +#include +#include +#include +#include +#include + +#define CHG_STAT_SUSPEND 0x0 +#define CHG_STAT_TRICKLE 0x1 +#define CHG_STAT_FAST 0x3 +#define CHG_STAT_TOPOFF 0xe +#define CHG_STAT_DONE 0xf +#define CHG_STAT_OTP_TRICKLE 0x10 +#define CHG_STAT_OTP_FAST 0x11 +#define CHG_STAT_OTP_DONE 0x12 +#define CHG_STAT_TSD_TRICKLE 0x20 +#define CHG_STAT_TSD_FAST 0x21 +#define CHG_STAT_TSD_TOPOFF 0x22 +#define CHG_STAT_BAT_ERR 0x7f + +static const char *bd70528_charger_model = "BD70528"; +static const char *bd70528_charger_manufacturer = "ROHM Semiconductors"; + +#define BD_ERR_IRQ_HND(_name_, _wrn_) \ +static irqreturn_t bd0528_##_name_##_interrupt(int irq, void *arg) \ +{ \ + struct power_supply *psy = (struct power_supply *)arg; \ + \ + power_supply_changed(psy); \ + dev_err(&psy->dev, (_wrn_)); \ + \ + return IRQ_HANDLED; \ +} + +#define BD_INFO_IRQ_HND(_name_, _wrn_) \ +static irqreturn_t bd0528_##_name_##_interrupt(int irq, void *arg) \ +{ \ + struct power_supply *psy = (struct power_supply *)arg; \ + \ + power_supply_changed(psy); \ + dev_dbg(&psy->dev, (_wrn_)); \ + \ + return IRQ_HANDLED; \ +} + +#define BD_IRQ_HND(_name_) bd0528_##_name_##_interrupt + +struct bd70528_psy { + struct regmap *regmap; + struct device *dev; + struct power_supply *psy; +}; + +BD_ERR_IRQ_HND(BAT_OV_DET, "Battery overvoltage detected\n"); +BD_ERR_IRQ_HND(DBAT_DET, "Dead battery detected\n"); +BD_ERR_IRQ_HND(COLD_DET, "Battery cold\n"); +BD_ERR_IRQ_HND(HOT_DET, "Battery hot\n"); +BD_ERR_IRQ_HND(CHG_TSD, "Charger thermal shutdown\n"); +BD_ERR_IRQ_HND(DCIN2_OV_DET, "DCIN2 overvoltage detected\n"); + +BD_INFO_IRQ_HND(BAT_OV_RES, "Battery voltage back to normal\n"); +BD_INFO_IRQ_HND(COLD_RES, "Battery temperature back to normal\n"); +BD_INFO_IRQ_HND(HOT_RES, "Battery temperature back to normal\n"); +BD_INFO_IRQ_HND(BAT_RMV, "Battery removed\n"); +BD_INFO_IRQ_HND(BAT_DET, "Battery detected\n"); +BD_INFO_IRQ_HND(DCIN2_OV_RES, "DCIN2 voltage back to normal\n"); +BD_INFO_IRQ_HND(DCIN2_RMV, "DCIN2 removed\n"); +BD_INFO_IRQ_HND(DCIN2_DET, "DCIN2 detected\n"); +BD_INFO_IRQ_HND(DCIN1_RMV, "DCIN1 removed\n"); +BD_INFO_IRQ_HND(DCIN1_DET, "DCIN1 detected\n"); + +struct irq_name_pair { + const char *n; + irqreturn_t (*h)(int irq, void *arg); +}; + +static int bd70528_get_irqs(struct platform_device *pdev, + struct bd70528_psy *bdpsy) +{ + int irq, i, ret; + unsigned int mask; + static const struct irq_name_pair bd70528_chg_irqs[] = { + { .n = "bd70528-bat-ov-res", .h = BD_IRQ_HND(BAT_OV_RES) }, + { .n = "bd70528-bat-ov-det", .h = BD_IRQ_HND(BAT_OV_DET) }, + { .n = "bd70528-bat-dead", .h = BD_IRQ_HND(DBAT_DET) }, + { .n = "bd70528-bat-warmed", .h = BD_IRQ_HND(COLD_RES) }, + { .n = "bd70528-bat-cold", .h = BD_IRQ_HND(COLD_DET) }, + { .n = "bd70528-bat-cooled", .h = BD_IRQ_HND(HOT_RES) }, + { .n = "bd70528-bat-hot", .h = BD_IRQ_HND(HOT_DET) }, + { .n = "bd70528-chg-tshd", .h = BD_IRQ_HND(CHG_TSD) }, + { .n = "bd70528-bat-removed", .h = BD_IRQ_HND(BAT_RMV) }, + { .n = "bd70528-bat-detected", .h = BD_IRQ_HND(BAT_DET) }, + { .n = "bd70528-dcin2-ov-res", .h = BD_IRQ_HND(DCIN2_OV_RES) }, + { .n = "bd70528-dcin2-ov-det", .h = BD_IRQ_HND(DCIN2_OV_DET) }, + { .n = "bd70528-dcin2-removed", .h = BD_IRQ_HND(DCIN2_RMV) }, + { .n = "bd70528-dcin2-detected", .h = BD_IRQ_HND(DCIN2_DET) }, + { .n = "bd70528-dcin1-removed", .h = BD_IRQ_HND(DCIN1_RMV) }, + { .n = "bd70528-dcin1-detected", .h = BD_IRQ_HND(DCIN1_DET) }, + }; + + for (i = 0; i < ARRAY_SIZE(bd70528_chg_irqs); i++) { + irq = platform_get_irq_byname(pdev, bd70528_chg_irqs[i].n); + if (irq < 0) { + dev_err(&pdev->dev, "Bad IRQ information for %s (%d)\n", + bd70528_chg_irqs[i].n, irq); + return irq; + } + ret = devm_request_threaded_irq(&pdev->dev, irq, NULL, + bd70528_chg_irqs[i].h, + IRQF_ONESHOT, + bd70528_chg_irqs[i].n, + bdpsy->psy); + + if (ret) + return ret; + } + /* + * BD70528 irq controller is not touching the main mask register. + * So enable the charger block interrupts at main level. We can just + * leave them enabled as irq-controller should disable irqs + * from sub-registers when IRQ is disabled or freed. + */ + mask = BD70528_REG_INT_BAT1_MASK | BD70528_REG_INT_BAT2_MASK; + ret = regmap_update_bits(bdpsy->regmap, + BD70528_REG_INT_MAIN_MASK, mask, 0); + if (ret) + dev_err(&pdev->dev, "Failed to enable charger IRQs\n"); + + return ret; +} + +static int bd70528_get_charger_status(struct bd70528_psy *bdpsy, int *val) +{ + int ret; + unsigned int v; + + ret = regmap_read(bdpsy->regmap, BD70528_REG_CHG_CURR_STAT, &v); + if (ret) { + dev_err(bdpsy->dev, "Charger state read failure %d\n", + ret); + return ret; + } + + switch (v & BD70528_MASK_CHG_STAT) { + case CHG_STAT_SUSPEND: + /* Maybe we should check the CHG_TTRI_EN? */ + case CHG_STAT_OTP_TRICKLE: + case CHG_STAT_OTP_FAST: + case CHG_STAT_OTP_DONE: + case CHG_STAT_TSD_TRICKLE: + case CHG_STAT_TSD_FAST: + case CHG_STAT_TSD_TOPOFF: + case CHG_STAT_BAT_ERR: + *val = POWER_SUPPLY_STATUS_NOT_CHARGING; + break; + case CHG_STAT_DONE: + *val = POWER_SUPPLY_STATUS_FULL; + break; + case CHG_STAT_TRICKLE: + case CHG_STAT_FAST: + case CHG_STAT_TOPOFF: + *val = POWER_SUPPLY_STATUS_CHARGING; + break; + default: + *val = POWER_SUPPLY_STATUS_UNKNOWN; + break; + } + + return 0; +} + +static int bd70528_get_charge_type(struct bd70528_psy *bdpsy, int *val) +{ + int ret; + unsigned int v; + + ret = regmap_read(bdpsy->regmap, BD70528_REG_CHG_CURR_STAT, &v); + if (ret) { + dev_err(bdpsy->dev, "Charger state read failure %d\n", + ret); + return ret; + } + + switch (v & BD70528_MASK_CHG_STAT) { + case CHG_STAT_TRICKLE: + *val = POWER_SUPPLY_CHARGE_TYPE_TRICKLE; + break; + case CHG_STAT_FAST: + case CHG_STAT_TOPOFF: + *val = POWER_SUPPLY_CHARGE_TYPE_FAST; + break; + case CHG_STAT_DONE: + case CHG_STAT_SUSPEND: + /* Maybe we should check the CHG_TTRI_EN? */ + case CHG_STAT_OTP_TRICKLE: + case CHG_STAT_OTP_FAST: + case CHG_STAT_OTP_DONE: + case CHG_STAT_TSD_TRICKLE: + case CHG_STAT_TSD_FAST: + case CHG_STAT_TSD_TOPOFF: + case CHG_STAT_BAT_ERR: + *val = POWER_SUPPLY_CHARGE_TYPE_NONE; + break; + default: + *val = POWER_SUPPLY_CHARGE_TYPE_UNKNOWN; + break; + } + + return 0; +} + +static int bd70528_get_battery_health(struct bd70528_psy *bdpsy, int *val) +{ + int ret; + unsigned int v; + + ret = regmap_read(bdpsy->regmap, BD70528_REG_CHG_BAT_STAT, &v); + if (ret) { + dev_err(bdpsy->dev, "Battery state read failure %d\n", + ret); + return ret; + } + /* No battery? */ + if (!(v & BD70528_MASK_CHG_BAT_DETECT)) + *val = POWER_SUPPLY_HEALTH_DEAD; + else if (v & BD70528_MASK_CHG_BAT_OVERVOLT) + *val = POWER_SUPPLY_HEALTH_OVERVOLTAGE; + else if (v & BD70528_MASK_CHG_BAT_TIMER) + *val = POWER_SUPPLY_HEALTH_SAFETY_TIMER_EXPIRE; + else + *val = POWER_SUPPLY_HEALTH_GOOD; + + return 0; +} + +static int bd70528_get_online(struct bd70528_psy *bdpsy, int *val) +{ + int ret; + unsigned int v; + + ret = regmap_read(bdpsy->regmap, BD70528_REG_CHG_IN_STAT, &v); + if (ret) { + dev_err(bdpsy->dev, "DC1 IN state read failure %d\n", + ret); + return ret; + } + + *val = (v & BD70528_MASK_CHG_DCIN1_UVLO) ? 1 : 0; + + return 0; +} + +static int bd70528_get_present(struct bd70528_psy *bdpsy, int *val) +{ + int ret; + unsigned int v; + + ret = regmap_read(bdpsy->regmap, BD70528_REG_CHG_BAT_STAT, &v); + if (ret) { + dev_err(bdpsy->dev, "Battery state read failure %d\n", + ret); + return ret; + } + + *val = (v & BD70528_MASK_CHG_BAT_DETECT) ? 1 : 0; + + return 0; +} + +struct linear_range { + int min; + int step; + int vals; + int low_sel; +}; + +static const struct linear_range current_limit_ranges[] = { + { + .min = 5, + .step = 1, + .vals = 36, + .low_sel = 0, + }, + { + .min = 40, + .step = 5, + .vals = 5, + .low_sel = 0x23, + }, + { + .min = 60, + .step = 20, + .vals = 8, + .low_sel = 0x27, + }, + { + .min = 200, + .step = 50, + .vals = 7, + .low_sel = 0x2e, + } +}; + +/* + * BD70528 would support setting and getting own charge current/ + * voltage for low temperatures. The driver currently only reads + * the charge current at room temperature. We do set both though. + */ +static const struct linear_range warm_charge_curr[] = { + { + .min = 10, + .step = 10, + .vals = 20, + .low_sel = 0, + }, + { + .min = 200, + .step = 25, + .vals = 13, + .low_sel = 0x13, + }, +}; + +/* + * Cold charge current selectors are identical to warm charge current + * selectors. The difference is that only smaller currents are available + * at cold charge range. + */ +#define MAX_COLD_CHG_CURR_SEL 0x15 +#define MAX_WARM_CHG_CURR_SEL 0x1f +#define MIN_CHG_CURR_SEL 0x0 + +static int find_value_for_selector_low(const struct linear_range *r, + int selectors, unsigned int sel, + unsigned int *val) +{ + int i; + + for (i = 0; i < selectors; i++) { + if (r[i].low_sel <= sel && r[i].low_sel + r[i].vals >= sel) { + *val = r[i].min + (sel - r[i].low_sel) * r[i].step; + return 0; + } + } + return -EINVAL; +} + +/* + * For BD70528 voltage/current limits we happily accept any value which + * belongs the range. We could check if value matching the selector is + * desired by computing the range min + (sel - sel_low) * range step - but + * I guess it is enough if we use voltage/current which is closest (below) + * the requested? + */ +static int find_selector_for_value_low(const struct linear_range *r, + int selectors, unsigned int val, + unsigned int *sel, bool *found) +{ + int i; + int ret = -EINVAL; + + *found = false; + for (i = 0; i < selectors; i++) { + if (r[i].min <= val) { + if (r[i].min + r[i].step * r[i].vals >= val) { + *found = true; + *sel = r[i].low_sel + (val - r[i].min) / + r[i].step; + ret = 0; + break; + } + /* + * If the range max is smaller than requested + * we can set the max supported value from range + */ + *sel = r[i].low_sel + r[i].vals; + ret = 0; + } + } + return ret; +} + +static int get_charge_current(struct bd70528_psy *bdpsy, int *ma) +{ + unsigned int sel; + int ret; + + ret = regmap_read(bdpsy->regmap, BD70528_REG_CHG_CHG_CURR_WARM, + &sel); + if (ret) { + dev_err(bdpsy->dev, + "Charge current reading failed (%d)\n", ret); + return ret; + } + + sel &= BD70528_MASK_CHG_CHG_CURR; + + ret = find_value_for_selector_low(&warm_charge_curr[0], + ARRAY_SIZE(warm_charge_curr), sel, + ma); + if (ret) { + dev_err(bdpsy->dev, + "Unknown charge current value 0x%x\n", + sel); + } + + return ret; +} + +static int get_current_limit(struct bd70528_psy *bdpsy, int *ma) +{ + unsigned int sel; + int ret; + + ret = regmap_read(bdpsy->regmap, BD70528_REG_CHG_DCIN_ILIM, + &sel); + + if (ret) { + dev_err(bdpsy->dev, + "Input current limit reading failed (%d)\n", ret); + return ret; + } + + sel &= BD70528_MASK_CHG_DCIN_ILIM; + + ret = find_value_for_selector_low(¤t_limit_ranges[0], + ARRAY_SIZE(current_limit_ranges), sel, + ma); + + if (ret) { + /* Unspecified values mean 500 mA */ + *ma = 500; + } + return 0; +} + +static enum power_supply_property bd70528_charger_props[] = { + POWER_SUPPLY_PROP_STATUS, + POWER_SUPPLY_PROP_CHARGE_TYPE, + POWER_SUPPLY_PROP_HEALTH, + POWER_SUPPLY_PROP_PRESENT, + POWER_SUPPLY_PROP_ONLINE, + POWER_SUPPLY_PROP_INPUT_CURRENT_LIMIT, + POWER_SUPPLY_PROP_CONSTANT_CHARGE_CURRENT, + POWER_SUPPLY_PROP_MODEL_NAME, + POWER_SUPPLY_PROP_MANUFACTURER, +}; + +static int bd70528_charger_get_property(struct power_supply *psy, + enum power_supply_property psp, + union power_supply_propval *val) +{ + struct bd70528_psy *bdpsy = power_supply_get_drvdata(psy); + int ret = 0; + + switch (psp) { + case POWER_SUPPLY_PROP_STATUS: + return bd70528_get_charger_status(bdpsy, &val->intval); + case POWER_SUPPLY_PROP_CHARGE_TYPE: + return bd70528_get_charge_type(bdpsy, &val->intval); + case POWER_SUPPLY_PROP_HEALTH: + return bd70528_get_battery_health(bdpsy, &val->intval); + case POWER_SUPPLY_PROP_PRESENT: + return bd70528_get_present(bdpsy, &val->intval); + case POWER_SUPPLY_PROP_INPUT_CURRENT_LIMIT: + ret = get_current_limit(bdpsy, &val->intval); + val->intval *= 1000; + return ret; + case POWER_SUPPLY_PROP_CONSTANT_CHARGE_CURRENT: + ret = get_charge_current(bdpsy, &val->intval); + val->intval *= 1000; + return ret; + case POWER_SUPPLY_PROP_ONLINE: + return bd70528_get_online(bdpsy, &val->intval); + case POWER_SUPPLY_PROP_MODEL_NAME: + val->strval = bd70528_charger_model; + return 0; + case POWER_SUPPLY_PROP_MANUFACTURER: + val->strval = bd70528_charger_manufacturer; + return 0; + default: + break; + } + + return -EINVAL; +} + +static int bd70528_prop_is_writable(struct power_supply *psy, + enum power_supply_property psp) +{ + switch (psp) { + case POWER_SUPPLY_PROP_INPUT_CURRENT_LIMIT: + case POWER_SUPPLY_PROP_CONSTANT_CHARGE_CURRENT: + return 1; + default: + break; + } + return 0; +} + +static int set_charge_current(struct bd70528_psy *bdpsy, int ma) +{ + unsigned int reg; + int ret = 0, tmpret; + bool found; + + if (ma > 500) { + dev_warn(bdpsy->dev, + "Requested charge current %u exceed maximum (500mA)\n", + ma); + reg = MAX_WARM_CHG_CURR_SEL; + goto set; + } + if (ma < 10) { + dev_err(bdpsy->dev, + "Requested charge current %u smaller than min (10mA)\n", + ma); + reg = MIN_CHG_CURR_SEL; + ret = -EINVAL; + goto set; + } + + ret = find_selector_for_value_low(&warm_charge_curr[0], + ARRAY_SIZE(warm_charge_curr), ma, + ®, &found); + if (ret) { + reg = MIN_CHG_CURR_SEL; + goto set; + } + if (!found) { + /* There was a gap in supported values and we hit it */ + dev_warn(bdpsy->dev, + "Unsupported charge current %u mA\n", ma); + } +set: + + tmpret = regmap_update_bits(bdpsy->regmap, + BD70528_REG_CHG_CHG_CURR_WARM, + BD70528_MASK_CHG_CHG_CURR, reg); + if (tmpret) + dev_err(bdpsy->dev, + "Charge current write failure (%d)\n", tmpret); + + if (reg > MAX_COLD_CHG_CURR_SEL) + reg = MAX_COLD_CHG_CURR_SEL; + + if (!tmpret) + tmpret = regmap_update_bits(bdpsy->regmap, + BD70528_REG_CHG_CHG_CURR_COLD, + BD70528_MASK_CHG_CHG_CURR, reg); + + if (!ret) + ret = tmpret; + + return ret; +} + +#define MAX_CURR_LIMIT_SEL 0x34 +#define MIN_CURR_LIMIT_SEL 0x0 + +static int set_current_limit(struct bd70528_psy *bdpsy, int ma) +{ + unsigned int reg; + int ret = 0, tmpret; + bool found; + + if (ma > 500) { + dev_warn(bdpsy->dev, + "Requested current limit %u exceed maximum (500mA)\n", + ma); + reg = MAX_CURR_LIMIT_SEL; + goto set; + } + if (ma < 5) { + dev_err(bdpsy->dev, + "Requested current limit %u smaller than min (5mA)\n", + ma); + reg = MIN_CURR_LIMIT_SEL; + ret = -EINVAL; + goto set; + } + + ret = find_selector_for_value_low(¤t_limit_ranges[0], + ARRAY_SIZE(current_limit_ranges), ma, + ®, &found); + if (ret) { + reg = MIN_CURR_LIMIT_SEL; + goto set; + } + if (!found) { + /* There was a gap in supported values and we hit it ?*/ + dev_warn(bdpsy->dev, "Unsupported current limit %umA\n", + ma); + } + +set: + tmpret = regmap_update_bits(bdpsy->regmap, + BD70528_REG_CHG_DCIN_ILIM, + BD70528_MASK_CHG_DCIN_ILIM, reg); + + if (!ret) + ret = tmpret; + + return ret; +} + +static int bd70528_charger_set_property(struct power_supply *psy, + enum power_supply_property psp, + const union power_supply_propval *val) +{ + struct bd70528_psy *bdpsy = power_supply_get_drvdata(psy); + + switch (psp) { + case POWER_SUPPLY_PROP_INPUT_CURRENT_LIMIT: + return set_current_limit(bdpsy, val->intval / 1000); + case POWER_SUPPLY_PROP_CONSTANT_CHARGE_CURRENT: + return set_charge_current(bdpsy, val->intval / 1000); + default: + break; + } + return -EINVAL; +} + +static const struct power_supply_desc bd70528_charger_desc = { + .name = "bd70528-charger", + .type = POWER_SUPPLY_TYPE_MAINS, + .properties = bd70528_charger_props, + .num_properties = ARRAY_SIZE(bd70528_charger_props), + .get_property = bd70528_charger_get_property, + .set_property = bd70528_charger_set_property, + .property_is_writeable = bd70528_prop_is_writable, +}; + +static int bd70528_power_probe(struct platform_device *pdev) +{ + struct bd70528_psy *bdpsy; + struct power_supply_config cfg = {}; + + bdpsy = devm_kzalloc(&pdev->dev, sizeof(*bdpsy), GFP_KERNEL); + if (!bdpsy) + return -ENOMEM; + + bdpsy->regmap = dev_get_regmap(pdev->dev.parent, NULL); + if (!bdpsy->regmap) { + dev_err(&pdev->dev, "No regmap found for chip\n"); + return -EINVAL; + } + bdpsy->dev = &pdev->dev; + + platform_set_drvdata(pdev, bdpsy); + cfg.drv_data = bdpsy; + cfg.of_node = pdev->dev.parent->of_node; + + bdpsy->psy = devm_power_supply_register(&pdev->dev, + &bd70528_charger_desc, &cfg); + if (IS_ERR(bdpsy->psy)) { + dev_err(&pdev->dev, "failed: power supply register\n"); + return PTR_ERR(bdpsy->psy); + } + + return bd70528_get_irqs(pdev, bdpsy); +} + +static struct platform_driver bd70528_power = { + .driver = { + .name = "bd70528-power" + }, + .probe = bd70528_power_probe, +}; + +module_platform_driver(bd70528_power); + +MODULE_AUTHOR("Matti Vaittinen "); +MODULE_DESCRIPTION("BD70528 power-supply driver"); +MODULE_LICENSE("GPL"); From 586c1b4125b3c7bf5b482fcafab5d568b8a3c285 Mon Sep 17 00:00:00 2001 From: Tony Xie Date: Fri, 21 Jun 2019 06:32:54 -0400 Subject: [PATCH 11/45] mfd: rk808: Add RK817 and RK809 support The RK809 and RK817 are a Power Management IC (PMIC) for multimedia and handheld devices. They contains the following components: - Regulators - RTC - Clocking Both RK809 and RK817 chips are using a similar register map, so we can reuse the RTC and Clocking functionality. Most of regulators have a some implementation also. Signed-off-by: Tony Xie Acked-by: Stephen Boyd Signed-off-by: Lee Jones --- drivers/mfd/Kconfig | 6 +- drivers/mfd/rk808.c | 192 +++++++++++++++++++++++++++++++++++++- include/linux/mfd/rk808.h | 172 ++++++++++++++++++++++++++++++++++ 3 files changed, 364 insertions(+), 6 deletions(-) diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig index 294d9567cc71..0b7db542e478 100644 --- a/drivers/mfd/Kconfig +++ b/drivers/mfd/Kconfig @@ -1030,14 +1030,14 @@ config MFD_RC5T583 different functionality of the device. config MFD_RK808 - tristate "Rockchip RK805/RK808/RK818 Power Management Chip" + tristate "Rockchip RK805/RK808/RK809/RK817/RK818 Power Management Chip" depends on I2C && OF select MFD_CORE select REGMAP_I2C select REGMAP_IRQ help - If you say yes here you get support for the RK805, RK808 and RK818 - Power Management chips. + If you say yes here you get support for the RK805, RK808, RK809, + RK817 and RK818 Power Management chips. This driver provides common support for accessing the device through I2C interface. The device supports multiple sub-devices including interrupts, RTC, LDO & DCDC regulators, and onkey. diff --git a/drivers/mfd/rk808.c b/drivers/mfd/rk808.c index 94377782d208..6ee1c461a3bb 100644 --- a/drivers/mfd/rk808.c +++ b/drivers/mfd/rk808.c @@ -27,6 +27,7 @@ #include #include #include +#include struct rk808_reg_data { int addr; @@ -62,6 +63,27 @@ static bool rk808_is_volatile_reg(struct device *dev, unsigned int reg) return false; } +static bool rk817_is_volatile_reg(struct device *dev, unsigned int reg) +{ + /* + * Notes: + * - Technically the ROUND_30s bit makes RTC_CTRL_REG volatile, but + * we don't use that feature. It's better to cache. + */ + + switch (reg) { + case RK817_SECONDS_REG ... RK817_WEEKS_REG: + case RK817_RTC_STATUS_REG: + case RK817_INT_STS_REG0: + case RK817_INT_STS_REG1: + case RK817_INT_STS_REG2: + case RK817_SYS_STS: + return true; + } + + return true; +} + static const struct regmap_config rk818_regmap_config = { .reg_bits = 8, .val_bits = 8, @@ -86,6 +108,14 @@ static const struct regmap_config rk808_regmap_config = { .volatile_reg = rk808_is_volatile_reg, }; +static const struct regmap_config rk817_regmap_config = { + .reg_bits = 8, + .val_bits = 8, + .max_register = RK817_GPIO_INT_CFG, + .cache_type = REGCACHE_NONE, + .volatile_reg = rk817_is_volatile_reg, +}; + static struct resource rtc_resources[] = { { .start = RK808_IRQ_RTC_ALARM, @@ -94,6 +124,10 @@ static struct resource rtc_resources[] = { } }; +static struct resource rk817_rtc_resources[] = { + DEFINE_RES_IRQ(RK817_IRQ_RTC_ALARM), +}; + static struct resource rk805_key_resources[] = { { .start = RK805_IRQ_PWRON_FALL, @@ -107,6 +141,11 @@ static struct resource rk805_key_resources[] = { } }; +static struct resource rk817_pwrkey_resources[] = { + DEFINE_RES_IRQ(RK817_IRQ_PWRON_RISE), + DEFINE_RES_IRQ(RK817_IRQ_PWRON_FALL), +}; + static const struct mfd_cell rk805s[] = { { .name = "rk808-clkout", }, { .name = "rk808-regulator", }, @@ -132,6 +171,21 @@ static const struct mfd_cell rk808s[] = { }, }; +static const struct mfd_cell rk817s[] = { + { .name = "rk808-clkout",}, + { .name = "rk808-regulator",}, + { + .name = "rk8xx-pwrkey", + .num_resources = ARRAY_SIZE(rk817_pwrkey_resources), + .resources = &rk817_pwrkey_resources[0], + }, + { + .name = "rk808-rtc", + .num_resources = ARRAY_SIZE(rk817_rtc_resources), + .resources = &rk817_rtc_resources[0], + }, +}; + static const struct mfd_cell rk818s[] = { { .name = "rk808-clkout", }, { .name = "rk808-regulator", }, @@ -167,6 +221,13 @@ static const struct rk808_reg_data rk808_pre_init_reg[] = { VB_LO_SEL_3500MV }, }; +static const struct rk808_reg_data rk817_pre_init_reg[] = { + {RK817_RTC_CTRL_REG, RTC_STOP, RTC_STOP}, + {RK817_GPIO_INT_CFG, RK817_INT_POL_MSK, RK817_INT_POL_H}, + {RK817_SYS_CFG(1), RK817_HOTDIE_TEMP_MSK | RK817_TSD_TEMP_MSK, + RK817_HOTDIE_105 | RK817_TSD_140}, +}; + static const struct rk808_reg_data rk818_pre_init_reg[] = { /* improve efficiency */ { RK818_BUCK2_CONFIG_REG, BUCK2_RATE_MASK, BUCK_ILMIN_250MA }, @@ -332,6 +393,33 @@ static const struct regmap_irq rk818_irqs[] = { }, }; +static const struct regmap_irq rk817_irqs[RK817_IRQ_END] = { + REGMAP_IRQ_REG_LINE(0, 8), + REGMAP_IRQ_REG_LINE(1, 8), + REGMAP_IRQ_REG_LINE(2, 8), + REGMAP_IRQ_REG_LINE(3, 8), + REGMAP_IRQ_REG_LINE(4, 8), + REGMAP_IRQ_REG_LINE(5, 8), + REGMAP_IRQ_REG_LINE(6, 8), + REGMAP_IRQ_REG_LINE(7, 8), + REGMAP_IRQ_REG_LINE(8, 8), + REGMAP_IRQ_REG_LINE(9, 8), + REGMAP_IRQ_REG_LINE(10, 8), + REGMAP_IRQ_REG_LINE(11, 8), + REGMAP_IRQ_REG_LINE(12, 8), + REGMAP_IRQ_REG_LINE(13, 8), + REGMAP_IRQ_REG_LINE(14, 8), + REGMAP_IRQ_REG_LINE(15, 8), + REGMAP_IRQ_REG_LINE(16, 8), + REGMAP_IRQ_REG_LINE(17, 8), + REGMAP_IRQ_REG_LINE(18, 8), + REGMAP_IRQ_REG_LINE(19, 8), + REGMAP_IRQ_REG_LINE(20, 8), + REGMAP_IRQ_REG_LINE(21, 8), + REGMAP_IRQ_REG_LINE(22, 8), + REGMAP_IRQ_REG_LINE(23, 8) +}; + static struct regmap_irq_chip rk805_irq_chip = { .name = "rk805", .irqs = rk805_irqs, @@ -355,6 +443,18 @@ static const struct regmap_irq_chip rk808_irq_chip = { .init_ack_masked = true, }; +static struct regmap_irq_chip rk817_irq_chip = { + .name = "rk817", + .irqs = rk817_irqs, + .num_irqs = ARRAY_SIZE(rk817_irqs), + .num_regs = 3, + .irq_reg_stride = 2, + .status_base = RK817_INT_STS_REG0, + .mask_base = RK817_INT_STS_MSK_REG0, + .ack_base = RK817_INT_STS_REG0, + .init_ack_masked = true, +}; + static const struct regmap_irq_chip rk818_irq_chip = { .name = "rk818", .irqs = rk818_irqs, @@ -423,9 +523,33 @@ static void rk818_device_shutdown(void) dev_err(&rk808_i2c_client->dev, "power off error!\n"); } +static void rk8xx_syscore_shutdown(void) +{ + struct rk808 *rk808 = i2c_get_clientdata(rk808_i2c_client); + int ret; + + if (system_state == SYSTEM_POWER_OFF && + (rk808->variant == RK809_ID || rk808->variant == RK817_ID)) { + ret = regmap_update_bits(rk808->regmap, + RK817_SYS_CFG(3), + RK817_SLPPIN_FUNC_MSK, + SLPPIN_DN_FUN); + if (ret) { + dev_warn(&rk808_i2c_client->dev, + "Cannot switch to power down function\n"); + } + } +} + +static struct syscore_ops rk808_syscore_ops = { + .shutdown = rk8xx_syscore_shutdown, +}; + static const struct of_device_id rk808_of_match[] = { { .compatible = "rockchip,rk805" }, { .compatible = "rockchip,rk808" }, + { .compatible = "rockchip,rk809" }, + { .compatible = "rockchip,rk817" }, { .compatible = "rockchip,rk818" }, { }, }; @@ -438,10 +562,11 @@ static int rk808_probe(struct i2c_client *client, struct rk808 *rk808; const struct rk808_reg_data *pre_init_reg; const struct mfd_cell *cells; - void (*pm_pwroff_fn)(void); + void (*pm_pwroff_fn)(void) = NULL; int nr_pre_init_regs; int nr_cells; int pm_off = 0, msb, lsb; + unsigned char pmic_id_msb, pmic_id_lsb; int ret; int i; @@ -449,15 +574,24 @@ static int rk808_probe(struct i2c_client *client, if (!rk808) return -ENOMEM; + if (of_device_is_compatible(np, "rockchip,rk817") || + of_device_is_compatible(np, "rockchip,rk809")) { + pmic_id_msb = RK817_ID_MSB; + pmic_id_lsb = RK817_ID_LSB; + } else { + pmic_id_msb = RK808_ID_MSB; + pmic_id_lsb = RK808_ID_LSB; + } + /* Read chip variant */ - msb = i2c_smbus_read_byte_data(client, RK808_ID_MSB); + msb = i2c_smbus_read_byte_data(client, pmic_id_msb); if (msb < 0) { dev_err(&client->dev, "failed to read the chip id at 0x%x\n", RK808_ID_MSB); return msb; } - lsb = i2c_smbus_read_byte_data(client, RK808_ID_LSB); + lsb = i2c_smbus_read_byte_data(client, pmic_id_lsb); if (lsb < 0) { dev_err(&client->dev, "failed to read the chip id at 0x%x\n", RK808_ID_LSB); @@ -495,6 +629,16 @@ static int rk808_probe(struct i2c_client *client, nr_cells = ARRAY_SIZE(rk818s); pm_pwroff_fn = rk818_device_shutdown; break; + case RK809_ID: + case RK817_ID: + rk808->regmap_cfg = &rk817_regmap_config; + rk808->regmap_irq_chip = &rk817_irq_chip; + pre_init_reg = rk817_pre_init_reg; + nr_pre_init_regs = ARRAY_SIZE(rk817_pre_init_reg); + cells = rk817s; + nr_cells = ARRAY_SIZE(rk817s); + register_syscore_ops(&rk808_syscore_ops); + break; default: dev_err(&client->dev, "Unsupported RK8XX ID %lu\n", rk808->variant); @@ -568,10 +712,52 @@ static int rk808_remove(struct i2c_client *client) return 0; } +static int rk8xx_suspend(struct device *dev) +{ + struct rk808 *rk808 = i2c_get_clientdata(rk808_i2c_client); + int ret = 0; + + switch (rk808->variant) { + case RK809_ID: + case RK817_ID: + ret = regmap_update_bits(rk808->regmap, + RK817_SYS_CFG(3), + RK817_SLPPIN_FUNC_MSK, + SLPPIN_SLP_FUN); + break; + default: + break; + } + + return ret; +} + +static int rk8xx_resume(struct device *dev) +{ + struct rk808 *rk808 = i2c_get_clientdata(rk808_i2c_client); + int ret = 0; + + switch (rk808->variant) { + case RK809_ID: + case RK817_ID: + ret = regmap_update_bits(rk808->regmap, + RK817_SYS_CFG(3), + RK817_SLPPIN_FUNC_MSK, + SLPPIN_NULL_FUN); + break; + default: + break; + } + + return ret; +} +SIMPLE_DEV_PM_OPS(rk8xx_pm_ops, rk8xx_suspend, rk8xx_resume); + static struct i2c_driver rk808_i2c_driver = { .driver = { .name = "rk808", .of_match_table = rk808_of_match, + .pm = &rk8xx_pm_ops, }, .probe = rk808_probe, .remove = rk808_remove, diff --git a/include/linux/mfd/rk808.h b/include/linux/mfd/rk808.h index d3156594674c..0fd9eedf3c20 100644 --- a/include/linux/mfd/rk808.h +++ b/include/linux/mfd/rk808.h @@ -382,6 +382,7 @@ enum rk805_reg { #define SWITCH1_EN BIT(5) #define DEV_OFF_RST BIT(3) #define DEV_OFF BIT(0) +#define RTC_STOP BIT(0) #define VB_LO_ACT BIT(4) #define VB_LO_SEL_3500MV (7 << 0) @@ -396,6 +397,175 @@ enum rk805_reg { #define SLEEP_FUN (0x1 << 2) #define RK8XX_ID_MSK 0xfff0 #define FPWM_MODE BIT(7) +enum rk817_reg_id { + RK817_ID_DCDC1 = 0, + RK817_ID_DCDC2, + RK817_ID_DCDC3, + RK817_ID_DCDC4, + RK817_ID_LDO1, + RK817_ID_LDO2, + RK817_ID_LDO3, + RK817_ID_LDO4, + RK817_ID_LDO5, + RK817_ID_LDO6, + RK817_ID_LDO7, + RK817_ID_LDO8, + RK817_ID_LDO9, + RK817_ID_BOOST, + RK817_ID_BOOST_OTG_SW, + RK817_NUM_REGULATORS +}; + +enum rk809_reg_id { + RK809_ID_DCDC5 = RK817_ID_BOOST, + RK809_ID_SW1, + RK809_ID_SW2, + RK809_NUM_REGULATORS +}; + +#define RK817_SECONDS_REG 0x00 +#define RK817_MINUTES_REG 0x01 +#define RK817_HOURS_REG 0x02 +#define RK817_DAYS_REG 0x03 +#define RK817_MONTHS_REG 0x04 +#define RK817_YEARS_REG 0x05 +#define RK817_WEEKS_REG 0x06 +#define RK817_ALARM_SECONDS_REG 0x07 +#define RK817_ALARM_MINUTES_REG 0x08 +#define RK817_ALARM_HOURS_REG 0x09 +#define RK817_ALARM_DAYS_REG 0x0a +#define RK817_ALARM_MONTHS_REG 0x0b +#define RK817_ALARM_YEARS_REG 0x0c +#define RK817_RTC_CTRL_REG 0xd +#define RK817_RTC_STATUS_REG 0xe +#define RK817_RTC_INT_REG 0xf +#define RK817_RTC_COMP_LSB_REG 0x10 +#define RK817_RTC_COMP_MSB_REG 0x11 + +#define RK817_POWER_EN_REG(i) (0xb1 + (i)) +#define RK817_POWER_SLP_EN_REG(i) (0xb5 + (i)) + +#define RK817_POWER_CONFIG (0xb9) + +#define RK817_BUCK_CONFIG_REG(i) (0xba + (i) * 3) + +#define RK817_BUCK1_ON_VSEL_REG 0xBB +#define RK817_BUCK1_SLP_VSEL_REG 0xBC + +#define RK817_BUCK2_CONFIG_REG 0xBD +#define RK817_BUCK2_ON_VSEL_REG 0xBE +#define RK817_BUCK2_SLP_VSEL_REG 0xBF + +#define RK817_BUCK3_CONFIG_REG 0xC0 +#define RK817_BUCK3_ON_VSEL_REG 0xC1 +#define RK817_BUCK3_SLP_VSEL_REG 0xC2 + +#define RK817_BUCK4_CONFIG_REG 0xC3 +#define RK817_BUCK4_ON_VSEL_REG 0xC4 +#define RK817_BUCK4_SLP_VSEL_REG 0xC5 + +#define RK817_LDO_ON_VSEL_REG(idx) (0xcc + (idx) * 2) +#define RK817_BOOST_OTG_CFG (0xde) + +#define RK817_ID_MSB 0xed +#define RK817_ID_LSB 0xee + +#define RK817_SYS_STS 0xf0 +#define RK817_SYS_CFG(i) (0xf1 + (i)) + +#define RK817_ON_SOURCE_REG 0xf5 +#define RK817_OFF_SOURCE_REG 0xf6 + +/* INTERRUPT REGISTER */ +#define RK817_INT_STS_REG0 0xf8 +#define RK817_INT_STS_MSK_REG0 0xf9 +#define RK817_INT_STS_REG1 0xfa +#define RK817_INT_STS_MSK_REG1 0xfb +#define RK817_INT_STS_REG2 0xfc +#define RK817_INT_STS_MSK_REG2 0xfd +#define RK817_GPIO_INT_CFG 0xfe + +/* IRQ Definitions */ +#define RK817_IRQ_PWRON_FALL 0 +#define RK817_IRQ_PWRON_RISE 1 +#define RK817_IRQ_PWRON 2 +#define RK817_IRQ_PWMON_LP 3 +#define RK817_IRQ_HOTDIE 4 +#define RK817_IRQ_RTC_ALARM 5 +#define RK817_IRQ_RTC_PERIOD 6 +#define RK817_IRQ_VB_LO 7 +#define RK817_IRQ_PLUG_IN 8 +#define RK817_IRQ_PLUG_OUT 9 +#define RK817_IRQ_CHRG_TERM 10 +#define RK817_IRQ_CHRG_TIME 11 +#define RK817_IRQ_CHRG_TS 12 +#define RK817_IRQ_USB_OV 13 +#define RK817_IRQ_CHRG_IN_CLMP 14 +#define RK817_IRQ_BAT_DIS_ILIM 15 +#define RK817_IRQ_GATE_GPIO 16 +#define RK817_IRQ_TS_GPIO 17 +#define RK817_IRQ_CODEC_PD 18 +#define RK817_IRQ_CODEC_PO 19 +#define RK817_IRQ_CLASSD_MUTE_DONE 20 +#define RK817_IRQ_CLASSD_OCP 21 +#define RK817_IRQ_BAT_OVP 22 +#define RK817_IRQ_CHRG_BAT_HI 23 +#define RK817_IRQ_END (RK817_IRQ_CHRG_BAT_HI + 1) + +/* + * rtc_ctrl 0xd + * same as 808, except bit4 + */ +#define RK817_RTC_CTRL_RSV4 BIT(4) + +/* power config 0xb9 */ +#define RK817_BUCK3_FB_RES_MSK BIT(6) +#define RK817_BUCK3_FB_RES_INTER BIT(6) +#define RK817_BUCK3_FB_RES_EXT 0 + +/* buck config 0xba */ +#define RK817_RAMP_RATE_OFFSET 6 +#define RK817_RAMP_RATE_MASK (0x3 << RK817_RAMP_RATE_OFFSET) +#define RK817_RAMP_RATE_3MV_PER_US (0x0 << RK817_RAMP_RATE_OFFSET) +#define RK817_RAMP_RATE_6_3MV_PER_US (0x1 << RK817_RAMP_RATE_OFFSET) +#define RK817_RAMP_RATE_12_5MV_PER_US (0x2 << RK817_RAMP_RATE_OFFSET) +#define RK817_RAMP_RATE_25MV_PER_US (0x3 << RK817_RAMP_RATE_OFFSET) + +/* sys_cfg1 0xf2 */ +#define RK817_HOTDIE_TEMP_MSK (0x3 << 4) +#define RK817_HOTDIE_85 (0x0 << 4) +#define RK817_HOTDIE_95 (0x1 << 4) +#define RK817_HOTDIE_105 (0x2 << 4) +#define RK817_HOTDIE_115 (0x3 << 4) + +#define RK817_TSD_TEMP_MSK BIT(6) +#define RK817_TSD_140 0 +#define RK817_TSD_160 BIT(6) + +#define RK817_CLK32KOUT2_EN BIT(7) + +/* sys_cfg3 0xf4 */ +#define RK817_SLPPIN_FUNC_MSK (0x3 << 3) +#define SLPPIN_NULL_FUN (0x0 << 3) +#define SLPPIN_SLP_FUN (0x1 << 3) +#define SLPPIN_DN_FUN (0x2 << 3) +#define SLPPIN_RST_FUN (0x3 << 3) + +#define RK817_RST_FUNC_MSK (0x3 << 6) +#define RK817_RST_FUNC_SFT (6) +#define RK817_RST_FUNC_CNT (3) +#define RK817_RST_FUNC_DEV (0) /* reset the dev */ +#define RK817_RST_FUNC_REG (0x1 << 6) /* reset the reg only */ + +#define RK817_SLPPOL_MSK BIT(5) +#define RK817_SLPPOL_H BIT(5) +#define RK817_SLPPOL_L (0) + +/* gpio&int 0xfe */ +#define RK817_INT_POL_MSK BIT(1) +#define RK817_INT_POL_H BIT(1) +#define RK817_INT_POL_L 0 +#define RK809_BUCK5_CONFIG(i) (RK817_BOOST_OTG_CFG + (i) * 1) enum { BUCK_ILMIN_50MA, @@ -443,6 +613,8 @@ enum { enum { RK805_ID = 0x8050, RK808_ID = 0x0000, + RK809_ID = 0x8090, + RK817_ID = 0x8170, RK818_ID = 0x8181, }; From e444f6d68c07bc01a3a3d5905409dbe1ca391d26 Mon Sep 17 00:00:00 2001 From: Heiko Stuebner Date: Wed, 26 Jun 2019 14:29:18 +0200 Subject: [PATCH 12/45] regulator: rk808: Add RK809 and RK817 support. MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Add support for the rk809 and rk817 regulator driver. Their specifications are as follows： 1. The RK809 and RK809 consist of 5 DCDCs, 9 LDOs and have the same registers for these components except dcdc5. 2. The dcdc5 is a boost dcdc for RK817 and is a buck for RK809. 3. The RK817 has one switch but The Rk809 has two. The output voltages are configurable and are meant to supply power to the main processor and other components. Signed-off-by: Tony Xie Acked-by: Mark Brown [rebased on top of 5.2-rc1] Signed-off-by: Heiko Stuebner Signed-off-by: Lee Jones --- drivers/regulator/Kconfig | 4 +- drivers/regulator/rk808-regulator.c | 648 ++++++++++++++++++++++++++-- include/linux/mfd/rk808.h | 3 + 3 files changed, 626 insertions(+), 29 deletions(-) diff --git a/drivers/regulator/Kconfig b/drivers/regulator/Kconfig index 6c37f0df9323..214a958ff3e5 100644 --- a/drivers/regulator/Kconfig +++ b/drivers/regulator/Kconfig @@ -762,11 +762,11 @@ config REGULATOR_RC5T583 outputs which can be controlled by i2c communication. config REGULATOR_RK808 - tristate "Rockchip RK805/RK808/RK818 Power regulators" + tristate "Rockchip RK805/RK808/RK809/RK817/RK818 Power regulators" depends on MFD_RK808 help Select this option to enable the power regulator of ROCKCHIP - PMIC RK805,RK808 and RK818. + PMIC RK805,RK809&RK817,RK808 and RK818. This driver supports the control of different power rails of device through regulator interface. The device supports multiple DCDC/LDO outputs which can be controlled by i2c communication. diff --git a/drivers/regulator/rk808-regulator.c b/drivers/regulator/rk808-regulator.c index 23713e16c286..e9b0bb996fc4 100644 --- a/drivers/regulator/rk808-regulator.c +++ b/drivers/regulator/rk808-regulator.c @@ -36,6 +36,12 @@ #define RK808_BUCK4_VSEL_MASK 0xf #define RK808_LDO_VSEL_MASK 0x1f +#define RK809_BUCK5_VSEL_MASK 0x7 + +#define RK817_LDO_VSEL_MASK 0x7f +#define RK817_BOOST_VSEL_MASK 0x7 +#define RK817_BUCK_VSEL_MASK 0x7f + #define RK818_BUCK_VSEL_MASK 0x3f #define RK818_BUCK4_VSEL_MASK 0x1f #define RK818_LDO_VSEL_MASK 0x1f @@ -65,30 +71,12 @@ /* max steps for increase voltage of Buck1/2, equal 100mv*/ #define MAX_STEPS_ONE_TIME 8 -#define RK805_DESC(_id, _match, _supply, _min, _max, _step, _vreg, \ - _vmask, _ereg, _emask, _etime) \ - [_id] = { \ - .name = (_match), \ - .supply_name = (_supply), \ - .of_match = of_match_ptr(_match), \ - .regulators_node = of_match_ptr("regulators"), \ - .type = REGULATOR_VOLTAGE, \ - .id = (_id), \ - .n_voltages = (((_max) - (_min)) / (_step) + 1), \ - .owner = THIS_MODULE, \ - .min_uV = (_min) * 1000, \ - .uV_step = (_step) * 1000, \ - .vsel_reg = (_vreg), \ - .vsel_mask = (_vmask), \ - .enable_reg = (_ereg), \ - .enable_mask = (_emask), \ - .enable_time = (_etime), \ - .ops = &rk805_reg_ops, \ - } +#define ENABLE_MASK(id) (BIT(id) | BIT(4 + (id))) +#define DISABLE_VAL(id) (BIT(4 + (id))) -#define RK8XX_DESC(_id, _match, _supply, _min, _max, _step, _vreg, \ - _vmask, _ereg, _emask, _etime) \ - [_id] = { \ +#define RK817_BOOST_DESC(_id, _match, _supply, _min, _max, _step, _vreg,\ + _vmask, _ereg, _emask, _enval, _disval, _etime, m_drop) \ + { \ .name = (_match), \ .supply_name = (_supply), \ .of_match = of_match_ptr(_match), \ @@ -103,12 +91,54 @@ .vsel_mask = (_vmask), \ .enable_reg = (_ereg), \ .enable_mask = (_emask), \ + .enable_val = (_enval), \ + .disable_val = (_disval), \ .enable_time = (_etime), \ - .ops = &rk808_reg_ops, \ + .min_dropout_uV = (m_drop) * 1000, \ + .ops = &rk817_boost_ops, \ } -#define RK8XX_DESC_SWITCH(_id, _match, _supply, _ereg, _emask) \ - [_id] = { \ +#define RK8XX_DESC_COM(_id, _match, _supply, _min, _max, _step, _vreg, \ + _vmask, _ereg, _emask, _enval, _disval, _etime, _ops) \ + { \ + .name = (_match), \ + .supply_name = (_supply), \ + .of_match = of_match_ptr(_match), \ + .regulators_node = of_match_ptr("regulators"), \ + .type = REGULATOR_VOLTAGE, \ + .id = (_id), \ + .n_voltages = (((_max) - (_min)) / (_step) + 1), \ + .owner = THIS_MODULE, \ + .min_uV = (_min) * 1000, \ + .uV_step = (_step) * 1000, \ + .vsel_reg = (_vreg), \ + .vsel_mask = (_vmask), \ + .enable_reg = (_ereg), \ + .enable_mask = (_emask), \ + .enable_val = (_enval), \ + .disable_val = (_disval), \ + .enable_time = (_etime), \ + .ops = _ops, \ + } + +#define RK805_DESC(_id, _match, _supply, _min, _max, _step, _vreg, \ + _vmask, _ereg, _emask, _etime) \ + RK8XX_DESC_COM(_id, _match, _supply, _min, _max, _step, _vreg, \ + _vmask, _ereg, _emask, 0, 0, _etime, &rk805_reg_ops) + +#define RK8XX_DESC(_id, _match, _supply, _min, _max, _step, _vreg, \ + _vmask, _ereg, _emask, _etime) \ + RK8XX_DESC_COM(_id, _match, _supply, _min, _max, _step, _vreg, \ + _vmask, _ereg, _emask, 0, 0, _etime, &rk808_reg_ops) + +#define RK817_DESC(_id, _match, _supply, _min, _max, _step, _vreg, \ + _vmask, _ereg, _emask, _disval, _etime) \ + RK8XX_DESC_COM(_id, _match, _supply, _min, _max, _step, _vreg, \ + _vmask, _ereg, _emask, _emask, _disval, _etime, &rk817_reg_ops) + +#define RKXX_DESC_SWITCH_COM(_id, _match, _supply, _ereg, _emask, \ + _enval, _disval, _ops) \ + { \ .name = (_match), \ .supply_name = (_supply), \ .of_match = of_match_ptr(_match), \ @@ -117,10 +147,20 @@ .id = (_id), \ .enable_reg = (_ereg), \ .enable_mask = (_emask), \ + .enable_val = (_enval), \ + .disable_val = (_disval), \ .owner = THIS_MODULE, \ - .ops = &rk808_switch_ops \ + .ops = _ops \ } +#define RK817_DESC_SWITCH(_id, _match, _supply, _ereg, _emask, \ + _disval) \ + RKXX_DESC_SWITCH_COM(_id, _match, _supply, _ereg, _emask, \ + _emask, _disval, &rk817_switch_ops) + +#define RK8XX_DESC_SWITCH(_id, _match, _supply, _ereg, _emask) \ + RKXX_DESC_SWITCH_COM(_id, _match, _supply, _ereg, _emask, \ + 0, 0, &rk808_switch_ops) struct rk808_regulator_data { struct gpio_desc *dvs_gpio[2]; @@ -138,6 +178,51 @@ static const struct regulator_linear_range rk808_ldo3_voltage_ranges[] = { REGULATOR_LINEAR_RANGE(2500000, 15, 15, 0), }; +#define RK809_BUCK5_SEL_CNT (8) + +static const struct regulator_linear_range rk809_buck5_voltage_ranges[] = { + REGULATOR_LINEAR_RANGE(1500000, 0, 0, 0), + REGULATOR_LINEAR_RANGE(1800000, 1, 3, 200000), + REGULATOR_LINEAR_RANGE(2800000, 4, 5, 200000), + REGULATOR_LINEAR_RANGE(3300000, 6, 7, 300000), +}; + +#define RK817_BUCK1_MIN0 500000 +#define RK817_BUCK1_MAX0 1500000 + +#define RK817_BUCK1_MIN1 1600000 +#define RK817_BUCK1_MAX1 2400000 + +#define RK817_BUCK3_MAX1 3400000 + +#define RK817_BUCK1_STP0 12500 +#define RK817_BUCK1_STP1 100000 + +#define RK817_BUCK1_SEL0 ((RK817_BUCK1_MAX0 - RK817_BUCK1_MIN0) /\ + RK817_BUCK1_STP0) +#define RK817_BUCK1_SEL1 ((RK817_BUCK1_MAX1 - RK817_BUCK1_MIN1) /\ + RK817_BUCK1_STP1) + +#define RK817_BUCK3_SEL1 ((RK817_BUCK3_MAX1 - RK817_BUCK1_MIN1) /\ + RK817_BUCK1_STP1) + +#define RK817_BUCK1_SEL_CNT (RK817_BUCK1_SEL0 + RK817_BUCK1_SEL1 + 1) +#define RK817_BUCK3_SEL_CNT (RK817_BUCK1_SEL0 + RK817_BUCK3_SEL1 + 1) + +static const struct regulator_linear_range rk817_buck1_voltage_ranges[] = { + REGULATOR_LINEAR_RANGE(RK817_BUCK1_MIN0, 0, + RK817_BUCK1_SEL0, RK817_BUCK1_STP0), + REGULATOR_LINEAR_RANGE(RK817_BUCK1_MIN1, RK817_BUCK1_SEL0 + 1, + RK817_BUCK1_SEL_CNT, RK817_BUCK1_STP1), +}; + +static const struct regulator_linear_range rk817_buck3_voltage_ranges[] = { + REGULATOR_LINEAR_RANGE(RK817_BUCK1_MIN0, 0, + RK817_BUCK1_SEL0, RK817_BUCK1_STP0), + REGULATOR_LINEAR_RANGE(RK817_BUCK1_MIN1, RK817_BUCK1_SEL0 + 1, + RK817_BUCK3_SEL_CNT, RK817_BUCK1_STP1), +}; + static int rk808_buck1_2_get_voltage_sel_regmap(struct regulator_dev *rdev) { struct rk808_regulator_data *pdata = rdev_get_drvdata(rdev); @@ -289,6 +374,36 @@ static int rk808_set_ramp_delay(struct regulator_dev *rdev, int ramp_delay) RK808_RAMP_RATE_MASK, ramp_value); } +/* + * RK817 RK809 + */ +static int rk817_set_ramp_delay(struct regulator_dev *rdev, int ramp_delay) +{ + unsigned int ramp_value = RK817_RAMP_RATE_25MV_PER_US; + unsigned int reg = RK817_BUCK_CONFIG_REG(rdev_get_id(rdev)); + + switch (ramp_delay) { + case 0 ... 3000: + ramp_value = RK817_RAMP_RATE_3MV_PER_US; + break; + case 3001 ... 6300: + ramp_value = RK817_RAMP_RATE_6_3MV_PER_US; + break; + case 6301 ... 12500: + ramp_value = RK817_RAMP_RATE_12_5MV_PER_US; + break; + case 12501 ... 25000: + break; + default: + dev_warn(&rdev->dev, + "%s ramp_delay: %d not supported, setting 10000\n", + rdev->desc->name, ramp_delay); + } + + return regmap_update_bits(rdev->regmap, reg, + RK817_RAMP_RATE_MASK, ramp_value); +} + static int rk808_set_suspend_voltage(struct regulator_dev *rdev, int uv) { unsigned int reg; @@ -304,6 +419,21 @@ static int rk808_set_suspend_voltage(struct regulator_dev *rdev, int uv) sel); } +static int rk817_set_suspend_voltage(struct regulator_dev *rdev, int uv) +{ + unsigned int reg; + int sel = regulator_map_voltage_linear(rdev, uv, uv); + /* only ldo1~ldo9 */ + if (sel < 0) + return -EINVAL; + + reg = rdev->desc->vsel_reg + RK808_SLP_REG_OFFSET; + + return regmap_update_bits(rdev->regmap, reg, + rdev->desc->vsel_mask, + sel); +} + static int rk808_set_suspend_voltage_range(struct regulator_dev *rdev, int uv) { unsigned int reg; @@ -363,6 +493,131 @@ static int rk808_set_suspend_disable(struct regulator_dev *rdev) rdev->desc->enable_mask); } +static int rk817_set_suspend_enable_ctrl(struct regulator_dev *rdev, + unsigned int en) +{ + unsigned int reg; + int id = rdev_get_id(rdev); + unsigned int id_slp, msk, val; + + if (id >= RK817_ID_DCDC1 && id <= RK817_ID_DCDC4) + id_slp = id; + else if (id >= RK817_ID_LDO1 && id <= RK817_ID_LDO8) + id_slp = 8 + (id - RK817_ID_LDO1); + else if (id >= RK817_ID_LDO9 && id <= RK809_ID_SW2) + id_slp = 4 + (id - RK817_ID_LDO9); + else + return -EINVAL; + + reg = RK817_POWER_SLP_EN_REG(id_slp / 8); + + msk = BIT(id_slp % 8); + if (en) + val = msk; + else + val = 0; + + return regmap_update_bits(rdev->regmap, reg, msk, val); +} + +static int rk817_set_suspend_enable(struct regulator_dev *rdev) +{ + return rk817_set_suspend_enable_ctrl(rdev, 1); +} + +static int rk817_set_suspend_disable(struct regulator_dev *rdev) +{ + return rk817_set_suspend_enable_ctrl(rdev, 0); +} + +static int rk8xx_set_suspend_mode(struct regulator_dev *rdev, unsigned int mode) +{ + unsigned int reg; + + reg = rdev->desc->vsel_reg + RK808_SLP_REG_OFFSET; + + switch (mode) { + case REGULATOR_MODE_FAST: + return regmap_update_bits(rdev->regmap, reg, + PWM_MODE_MSK, FPWM_MODE); + case REGULATOR_MODE_NORMAL: + return regmap_update_bits(rdev->regmap, reg, + PWM_MODE_MSK, AUTO_PWM_MODE); + default: + dev_err(&rdev->dev, "do not support this mode\n"); + return -EINVAL; + } + + return 0; +} + +static int rk8xx_set_mode(struct regulator_dev *rdev, unsigned int mode) +{ + switch (mode) { + case REGULATOR_MODE_FAST: + return regmap_update_bits(rdev->regmap, rdev->desc->vsel_reg, + PWM_MODE_MSK, FPWM_MODE); + case REGULATOR_MODE_NORMAL: + return regmap_update_bits(rdev->regmap, rdev->desc->vsel_reg, + PWM_MODE_MSK, AUTO_PWM_MODE); + default: + dev_err(&rdev->dev, "do not support this mode\n"); + return -EINVAL; + } + + return 0; +} + +static unsigned int rk8xx_get_mode(struct regulator_dev *rdev) +{ + unsigned int val; + int err; + + err = regmap_read(rdev->regmap, rdev->desc->vsel_reg, &val); + if (err) + return err; + + if (val & FPWM_MODE) + return REGULATOR_MODE_FAST; + else + return REGULATOR_MODE_NORMAL; +} + +static int rk8xx_is_enabled_wmsk_regmap(struct regulator_dev *rdev) +{ + unsigned int val; + int ret; + + ret = regmap_read(rdev->regmap, rdev->desc->enable_reg, &val); + if (ret != 0) + return ret; + + /* add write mask bit */ + val |= (rdev->desc->enable_mask & 0xf0); + val &= rdev->desc->enable_mask; + + if (rdev->desc->enable_is_inverted) { + if (rdev->desc->enable_val) + return val != rdev->desc->enable_val; + return (val == 0); + } + if (rdev->desc->enable_val) + return val == rdev->desc->enable_val; + return val != 0; +} + +static unsigned int rk8xx_regulator_of_map_mode(unsigned int mode) +{ + switch (mode) { + case 1: + return REGULATOR_MODE_FAST; + case 2: + return REGULATOR_MODE_NORMAL; + default: + return -EINVAL; + } +} + static const struct regulator_ops rk805_reg_ops = { .list_voltage = regulator_list_voltage_linear, .map_voltage = regulator_map_voltage_linear, @@ -439,6 +694,71 @@ static const struct regulator_linear_range rk805_buck_1_2_voltage_ranges[] = { REGULATOR_LINEAR_RANGE(2300000, 63, 63, 0), }; +static struct regulator_ops rk809_buck5_ops_range = { + .list_voltage = regulator_list_voltage_linear_range, + .map_voltage = regulator_map_voltage_linear_range, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .set_voltage_time_sel = regulator_set_voltage_time_sel, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = rk8xx_is_enabled_wmsk_regmap, + .set_suspend_voltage = rk808_set_suspend_voltage_range, + .set_suspend_enable = rk817_set_suspend_enable, + .set_suspend_disable = rk817_set_suspend_disable, +}; + +static struct regulator_ops rk817_reg_ops = { + .list_voltage = regulator_list_voltage_linear, + .map_voltage = regulator_map_voltage_linear, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = rk8xx_is_enabled_wmsk_regmap, + .set_suspend_voltage = rk817_set_suspend_voltage, + .set_suspend_enable = rk817_set_suspend_enable, + .set_suspend_disable = rk817_set_suspend_disable, +}; + +static struct regulator_ops rk817_boost_ops = { + .list_voltage = regulator_list_voltage_linear, + .map_voltage = regulator_map_voltage_linear, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = rk8xx_is_enabled_wmsk_regmap, + .set_suspend_enable = rk817_set_suspend_enable, + .set_suspend_disable = rk817_set_suspend_disable, +}; + +static struct regulator_ops rk817_buck_ops_range = { + .list_voltage = regulator_list_voltage_linear_range, + .map_voltage = regulator_map_voltage_linear_range, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .set_voltage_time_sel = regulator_set_voltage_time_sel, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = rk8xx_is_enabled_wmsk_regmap, + .set_mode = rk8xx_set_mode, + .get_mode = rk8xx_get_mode, + .set_suspend_mode = rk8xx_set_suspend_mode, + .set_ramp_delay = rk817_set_ramp_delay, + .set_suspend_voltage = rk808_set_suspend_voltage_range, + .set_suspend_enable = rk817_set_suspend_enable, + .set_suspend_disable = rk817_set_suspend_disable, +}; + +static struct regulator_ops rk817_switch_ops = { + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = rk8xx_is_enabled_wmsk_regmap, + .set_suspend_enable = rk817_set_suspend_enable, + .set_suspend_disable = rk817_set_suspend_disable, +}; + static const struct regulator_desc rk805_reg[] = { { .name = "DCDC_REG1", @@ -595,6 +915,271 @@ static const struct regulator_desc rk808_reg[] = { RK808_DCDC_EN_REG, BIT(6)), }; +static const struct regulator_desc rk809_reg[] = { + { + .name = "DCDC_REG1", + .supply_name = "vcc1", + .of_match = of_match_ptr("DCDC_REG1"), + .regulators_node = of_match_ptr("regulators"), + .id = RK817_ID_DCDC1, + .ops = &rk817_buck_ops_range, + .type = REGULATOR_VOLTAGE, + .n_voltages = RK817_BUCK1_SEL_CNT + 1, + .linear_ranges = rk817_buck1_voltage_ranges, + .n_linear_ranges = ARRAY_SIZE(rk817_buck1_voltage_ranges), + .vsel_reg = RK817_BUCK1_ON_VSEL_REG, + .vsel_mask = RK817_BUCK_VSEL_MASK, + .enable_reg = RK817_POWER_EN_REG(0), + .enable_mask = ENABLE_MASK(RK817_ID_DCDC1), + .enable_val = ENABLE_MASK(RK817_ID_DCDC1), + .disable_val = DISABLE_VAL(RK817_ID_DCDC1), + .of_map_mode = rk8xx_regulator_of_map_mode, + .owner = THIS_MODULE, + }, { + .name = "DCDC_REG2", + .supply_name = "vcc2", + .of_match = of_match_ptr("DCDC_REG2"), + .regulators_node = of_match_ptr("regulators"), + .id = RK817_ID_DCDC2, + .ops = &rk817_buck_ops_range, + .type = REGULATOR_VOLTAGE, + .n_voltages = RK817_BUCK1_SEL_CNT + 1, + .linear_ranges = rk817_buck1_voltage_ranges, + .n_linear_ranges = ARRAY_SIZE(rk817_buck1_voltage_ranges), + .vsel_reg = RK817_BUCK2_ON_VSEL_REG, + .vsel_mask = RK817_BUCK_VSEL_MASK, + .enable_reg = RK817_POWER_EN_REG(0), + .enable_mask = ENABLE_MASK(RK817_ID_DCDC2), + .enable_val = ENABLE_MASK(RK817_ID_DCDC2), + .disable_val = DISABLE_VAL(RK817_ID_DCDC2), + .of_map_mode = rk8xx_regulator_of_map_mode, + .owner = THIS_MODULE, + }, { + .name = "DCDC_REG3", + .supply_name = "vcc3", + .of_match = of_match_ptr("DCDC_REG3"), + .regulators_node = of_match_ptr("regulators"), + .id = RK817_ID_DCDC3, + .ops = &rk817_buck_ops_range, + .type = REGULATOR_VOLTAGE, + .n_voltages = RK817_BUCK1_SEL_CNT + 1, + .linear_ranges = rk817_buck1_voltage_ranges, + .n_linear_ranges = ARRAY_SIZE(rk817_buck1_voltage_ranges), + .vsel_reg = RK817_BUCK3_ON_VSEL_REG, + .vsel_mask = RK817_BUCK_VSEL_MASK, + .enable_reg = RK817_POWER_EN_REG(0), + .enable_mask = ENABLE_MASK(RK817_ID_DCDC3), + .enable_val = ENABLE_MASK(RK817_ID_DCDC3), + .disable_val = DISABLE_VAL(RK817_ID_DCDC3), + .of_map_mode = rk8xx_regulator_of_map_mode, + .owner = THIS_MODULE, + }, { + .name = "DCDC_REG4", + .supply_name = "vcc4", + .of_match = of_match_ptr("DCDC_REG4"), + .regulators_node = of_match_ptr("regulators"), + .id = RK817_ID_DCDC4, + .ops = &rk817_buck_ops_range, + .type = REGULATOR_VOLTAGE, + .n_voltages = RK817_BUCK3_SEL_CNT + 1, + .linear_ranges = rk817_buck3_voltage_ranges, + .n_linear_ranges = ARRAY_SIZE(rk817_buck3_voltage_ranges), + .vsel_reg = RK817_BUCK4_ON_VSEL_REG, + .vsel_mask = RK817_BUCK_VSEL_MASK, + .enable_reg = RK817_POWER_EN_REG(0), + .enable_mask = ENABLE_MASK(RK817_ID_DCDC4), + .enable_val = ENABLE_MASK(RK817_ID_DCDC4), + .disable_val = DISABLE_VAL(RK817_ID_DCDC4), + .of_map_mode = rk8xx_regulator_of_map_mode, + .owner = THIS_MODULE, + }, + { + .name = "DCDC_REG5", + .supply_name = "vcc9", + .of_match = of_match_ptr("DCDC_REG5"), + .regulators_node = of_match_ptr("regulators"), + .id = RK809_ID_DCDC5, + .ops = &rk809_buck5_ops_range, + .type = REGULATOR_VOLTAGE, + .n_voltages = RK809_BUCK5_SEL_CNT, + .linear_ranges = rk809_buck5_voltage_ranges, + .n_linear_ranges = ARRAY_SIZE(rk809_buck5_voltage_ranges), + .vsel_reg = RK809_BUCK5_CONFIG(0), + .vsel_mask = RK809_BUCK5_VSEL_MASK, + .enable_reg = RK817_POWER_EN_REG(3), + .enable_mask = ENABLE_MASK(1), + .enable_val = ENABLE_MASK(1), + .disable_val = DISABLE_VAL(1), + .of_map_mode = rk8xx_regulator_of_map_mode, + .owner = THIS_MODULE, + }, + RK817_DESC(RK817_ID_LDO1, "LDO_REG1", "vcc5", 600, 3400, 25, + RK817_LDO_ON_VSEL_REG(0), RK817_LDO_VSEL_MASK, + RK817_POWER_EN_REG(1), ENABLE_MASK(0), + DISABLE_VAL(0), 400), + RK817_DESC(RK817_ID_LDO2, "LDO_REG2", "vcc5", 600, 3400, 25, + RK817_LDO_ON_VSEL_REG(1), RK817_LDO_VSEL_MASK, + RK817_POWER_EN_REG(1), ENABLE_MASK(1), + DISABLE_VAL(1), 400), + RK817_DESC(RK817_ID_LDO3, "LDO_REG3", "vcc5", 600, 3400, 25, + RK817_LDO_ON_VSEL_REG(2), RK817_LDO_VSEL_MASK, + RK817_POWER_EN_REG(1), ENABLE_MASK(2), + DISABLE_VAL(2), 400), + RK817_DESC(RK817_ID_LDO4, "LDO_REG4", "vcc6", 600, 3400, 25, + RK817_LDO_ON_VSEL_REG(3), RK817_LDO_VSEL_MASK, + RK817_POWER_EN_REG(1), ENABLE_MASK(3), + DISABLE_VAL(3), 400), + RK817_DESC(RK817_ID_LDO5, "LDO_REG5", "vcc6", 600, 3400, 25, + RK817_LDO_ON_VSEL_REG(4), RK817_LDO_VSEL_MASK, + RK817_POWER_EN_REG(2), ENABLE_MASK(0), + DISABLE_VAL(0), 400), + RK817_DESC(RK817_ID_LDO6, "LDO_REG6", "vcc6", 600, 3400, 25, + RK817_LDO_ON_VSEL_REG(5), RK817_LDO_VSEL_MASK, + RK817_POWER_EN_REG(2), ENABLE_MASK(1), + DISABLE_VAL(1), 400), + RK817_DESC(RK817_ID_LDO7, "LDO_REG7", "vcc7", 600, 3400, 25, + RK817_LDO_ON_VSEL_REG(6), RK817_LDO_VSEL_MASK, + RK817_POWER_EN_REG(2), ENABLE_MASK(2), + DISABLE_VAL(2), 400), + RK817_DESC(RK817_ID_LDO8, "LDO_REG8", "vcc7", 600, 3400, 25, + RK817_LDO_ON_VSEL_REG(7), RK817_LDO_VSEL_MASK, + RK817_POWER_EN_REG(2), ENABLE_MASK(3), + DISABLE_VAL(3), 400), + RK817_DESC(RK817_ID_LDO9, "LDO_REG9", "vcc7", 600, 3400, 25, + RK817_LDO_ON_VSEL_REG(8), RK817_LDO_VSEL_MASK, + RK817_POWER_EN_REG(3), ENABLE_MASK(0), + DISABLE_VAL(0), 400), + RK817_DESC_SWITCH(RK809_ID_SW1, "SWITCH_REG1", "vcc9", + RK817_POWER_EN_REG(3), ENABLE_MASK(2), + DISABLE_VAL(2)), + RK817_DESC_SWITCH(RK809_ID_SW2, "SWITCH_REG2", "vcc8", + RK817_POWER_EN_REG(3), ENABLE_MASK(3), + DISABLE_VAL(3)), +}; + +static const struct regulator_desc rk817_reg[] = { + { + .name = "DCDC_REG1", + .supply_name = "vcc1", + .of_match = of_match_ptr("DCDC_REG1"), + .regulators_node = of_match_ptr("regulators"), + .id = RK817_ID_DCDC1, + .ops = &rk817_buck_ops_range, + .type = REGULATOR_VOLTAGE, + .n_voltages = RK817_BUCK1_SEL_CNT + 1, + .linear_ranges = rk817_buck1_voltage_ranges, + .n_linear_ranges = ARRAY_SIZE(rk817_buck1_voltage_ranges), + .vsel_reg = RK817_BUCK1_ON_VSEL_REG, + .vsel_mask = RK817_BUCK_VSEL_MASK, + .enable_reg = RK817_POWER_EN_REG(0), + .enable_mask = ENABLE_MASK(RK817_ID_DCDC1), + .enable_val = ENABLE_MASK(RK817_ID_DCDC1), + .disable_val = DISABLE_VAL(RK817_ID_DCDC1), + .of_map_mode = rk8xx_regulator_of_map_mode, + .owner = THIS_MODULE, + }, { + .name = "DCDC_REG2", + .supply_name = "vcc2", + .of_match = of_match_ptr("DCDC_REG2"), + .regulators_node = of_match_ptr("regulators"), + .id = RK817_ID_DCDC2, + .ops = &rk817_buck_ops_range, + .type = REGULATOR_VOLTAGE, + .n_voltages = RK817_BUCK1_SEL_CNT + 1, + .linear_ranges = rk817_buck1_voltage_ranges, + .n_linear_ranges = ARRAY_SIZE(rk817_buck1_voltage_ranges), + .vsel_reg = RK817_BUCK2_ON_VSEL_REG, + .vsel_mask = RK817_BUCK_VSEL_MASK, + .enable_reg = RK817_POWER_EN_REG(0), + .enable_mask = ENABLE_MASK(RK817_ID_DCDC2), + .enable_val = ENABLE_MASK(RK817_ID_DCDC2), + .disable_val = DISABLE_VAL(RK817_ID_DCDC2), + .of_map_mode = rk8xx_regulator_of_map_mode, + .owner = THIS_MODULE, + }, { + .name = "DCDC_REG3", + .supply_name = "vcc3", + .of_match = of_match_ptr("DCDC_REG3"), + .regulators_node = of_match_ptr("regulators"), + .id = RK817_ID_DCDC3, + .ops = &rk817_buck_ops_range, + .type = REGULATOR_VOLTAGE, + .n_voltages = RK817_BUCK1_SEL_CNT + 1, + .linear_ranges = rk817_buck1_voltage_ranges, + .n_linear_ranges = ARRAY_SIZE(rk817_buck1_voltage_ranges), + .vsel_reg = RK817_BUCK3_ON_VSEL_REG, + .vsel_mask = RK817_BUCK_VSEL_MASK, + .enable_reg = RK817_POWER_EN_REG(0), + .enable_mask = ENABLE_MASK(RK817_ID_DCDC3), + .enable_val = ENABLE_MASK(RK817_ID_DCDC3), + .disable_val = DISABLE_VAL(RK817_ID_DCDC3), + .of_map_mode = rk8xx_regulator_of_map_mode, + .owner = THIS_MODULE, + }, { + .name = "DCDC_REG4", + .supply_name = "vcc4", + .of_match = of_match_ptr("DCDC_REG4"), + .regulators_node = of_match_ptr("regulators"), + .id = RK817_ID_DCDC4, + .ops = &rk817_buck_ops_range, + .type = REGULATOR_VOLTAGE, + .n_voltages = RK817_BUCK3_SEL_CNT + 1, + .linear_ranges = rk817_buck3_voltage_ranges, + .n_linear_ranges = ARRAY_SIZE(rk817_buck3_voltage_ranges), + .vsel_reg = RK817_BUCK4_ON_VSEL_REG, + .vsel_mask = RK817_BUCK_VSEL_MASK, + .enable_reg = RK817_POWER_EN_REG(0), + .enable_mask = ENABLE_MASK(RK817_ID_DCDC4), + .enable_val = ENABLE_MASK(RK817_ID_DCDC4), + .disable_val = DISABLE_VAL(RK817_ID_DCDC4), + .of_map_mode = rk8xx_regulator_of_map_mode, + .owner = THIS_MODULE, + }, + RK817_DESC(RK817_ID_LDO1, "LDO_REG1", "vcc5", 600, 3400, 25, + RK817_LDO_ON_VSEL_REG(0), RK817_LDO_VSEL_MASK, + RK817_POWER_EN_REG(1), ENABLE_MASK(0), + DISABLE_VAL(0), 400), + RK817_DESC(RK817_ID_LDO2, "LDO_REG2", "vcc5", 600, 3400, 25, + RK817_LDO_ON_VSEL_REG(1), RK817_LDO_VSEL_MASK, + RK817_POWER_EN_REG(1), ENABLE_MASK(1), + DISABLE_VAL(1), 400), + RK817_DESC(RK817_ID_LDO3, "LDO_REG3", "vcc5", 600, 3400, 25, + RK817_LDO_ON_VSEL_REG(2), RK817_LDO_VSEL_MASK, + RK817_POWER_EN_REG(1), ENABLE_MASK(2), + DISABLE_VAL(2), 400), + RK817_DESC(RK817_ID_LDO4, "LDO_REG4", "vcc6", 600, 3400, 25, + RK817_LDO_ON_VSEL_REG(3), RK817_LDO_VSEL_MASK, + RK817_POWER_EN_REG(1), ENABLE_MASK(3), + DISABLE_VAL(3), 400), + RK817_DESC(RK817_ID_LDO5, "LDO_REG5", "vcc6", 600, 3400, 25, + RK817_LDO_ON_VSEL_REG(4), RK817_LDO_VSEL_MASK, + RK817_POWER_EN_REG(2), ENABLE_MASK(0), + DISABLE_VAL(0), 400), + RK817_DESC(RK817_ID_LDO6, "LDO_REG6", "vcc6", 600, 3400, 25, + RK817_LDO_ON_VSEL_REG(5), RK817_LDO_VSEL_MASK, + RK817_POWER_EN_REG(2), ENABLE_MASK(1), + DISABLE_VAL(1), 400), + RK817_DESC(RK817_ID_LDO7, "LDO_REG7", "vcc7", 600, 3400, 25, + RK817_LDO_ON_VSEL_REG(6), RK817_LDO_VSEL_MASK, + RK817_POWER_EN_REG(2), ENABLE_MASK(2), + DISABLE_VAL(2), 400), + RK817_DESC(RK817_ID_LDO8, "LDO_REG8", "vcc7", 600, 3400, 25, + RK817_LDO_ON_VSEL_REG(7), RK817_LDO_VSEL_MASK, + RK817_POWER_EN_REG(2), ENABLE_MASK(3), + DISABLE_VAL(3), 400), + RK817_DESC(RK817_ID_LDO9, "LDO_REG9", "vcc7", 600, 3400, 25, + RK817_LDO_ON_VSEL_REG(8), RK817_LDO_VSEL_MASK, + RK817_POWER_EN_REG(3), ENABLE_MASK(0), + DISABLE_VAL(0), 400), + RK817_BOOST_DESC(RK817_ID_BOOST, "BOOST", "vcc8", 4700, 5400, 100, + RK817_BOOST_OTG_CFG, RK817_BOOST_VSEL_MASK, + RK817_POWER_EN_REG(3), ENABLE_MASK(1), ENABLE_MASK(1), + DISABLE_VAL(1), 400, 3500 - 5400), + RK817_DESC_SWITCH(RK817_ID_BOOST_OTG_SW, "OTG_SWITCH", "vcc9", + RK817_POWER_EN_REG(3), ENABLE_MASK(2), + DISABLE_VAL(2)), +}; + static const struct regulator_desc rk818_reg[] = { { .name = "DCDC_REG1", @@ -765,6 +1350,14 @@ static int rk808_regulator_probe(struct platform_device *pdev) regulators = rk808_reg; nregulators = RK808_NUM_REGULATORS; break; + case RK809_ID: + regulators = rk809_reg; + nregulators = RK809_NUM_REGULATORS; + break; + case RK817_ID: + regulators = rk817_reg; + nregulators = RK817_NUM_REGULATORS; + break; case RK818_ID: regulators = rk818_reg; nregulators = RK818_NUM_REGULATORS; @@ -803,6 +1396,7 @@ static struct platform_driver rk808_regulator_driver = { module_platform_driver(rk808_regulator_driver); MODULE_DESCRIPTION("regulator driver for the RK805/RK808/RK818 series PMICs"); +MODULE_AUTHOR("Tony xie "); MODULE_AUTHOR("Chris Zhong "); MODULE_AUTHOR("Zhang Qing "); MODULE_AUTHOR("Wadim Egorov "); diff --git a/include/linux/mfd/rk808.h b/include/linux/mfd/rk808.h index 0fd9eedf3c20..2a9cd01691b2 100644 --- a/include/linux/mfd/rk808.h +++ b/include/linux/mfd/rk808.h @@ -396,7 +396,10 @@ enum rk805_reg { #define SHUTDOWN_FUN (0x2 << 2) #define SLEEP_FUN (0x1 << 2) #define RK8XX_ID_MSK 0xfff0 +#define PWM_MODE_MSK BIT(7) #define FPWM_MODE BIT(7) +#define AUTO_PWM_MODE 0 + enum rk817_reg_id { RK817_ID_DCDC1 = 0, RK817_ID_DCDC2, From 696d7349f70ece84e0b485291a28781f0ce11245 Mon Sep 17 00:00:00 2001 From: Tony Xie Date: Fri, 21 Jun 2019 06:32:56 -0400 Subject: [PATCH 13/45] dt-bindings: mfd: rk808: Add binding information for RK809 and RK817. Add device tree bindings documentation for Rockchip's RK809 & RK817 PMIC. Signed-off-by: Tony Xie Reviewed-by: Rob Herring Signed-off-by: Lee Jones --- .../devicetree/bindings/mfd/rk808.txt | 44 +++++++++++++++++++ 1 file changed, 44 insertions(+) diff --git a/Documentation/devicetree/bindings/mfd/rk808.txt b/Documentation/devicetree/bindings/mfd/rk808.txt index 1683ec3245bc..04df07f6f793 100644 --- a/Documentation/devicetree/bindings/mfd/rk808.txt +++ b/Documentation/devicetree/bindings/mfd/rk808.txt @@ -3,11 +3,15 @@ RK8XX Power Management Integrated Circuit The rk8xx family current members: rk805 rk808 +rk809 +rk817 rk818 Required properties: - compatible: "rockchip,rk805" - compatible: "rockchip,rk808" +- compatible: "rockchip,rk809" +- compatible: "rockchip,rk817" - compatible: "rockchip,rk818" - reg: I2C slave address - interrupts: the interrupt outputs of the controller. @@ -45,6 +49,23 @@ Optional RK808 properties: the gpio controller. If DVS GPIOs aren't present, voltage changes will happen very quickly with no slow ramp time. +Optional shared RK809 and RK817 properties: +- vcc1-supply: The input supply for DCDC_REG1 +- vcc2-supply: The input supply for DCDC_REG2 +- vcc3-supply: The input supply for DCDC_REG3 +- vcc4-supply: The input supply for DCDC_REG4 +- vcc5-supply: The input supply for LDO_REG1, LDO_REG2, LDO_REG3 +- vcc6-supply: The input supply for LDO_REG4, LDO_REG5, LDO_REG6 +- vcc7-supply: The input supply for LDO_REG7, LDO_REG8, LDO_REG9 + +Optional RK809 properties: +- vcc8-supply: The input supply for SWITCH_REG1 +- vcc9-supply: The input supply for DCDC_REG5, SWITCH_REG2 + +Optional RK817 properties: +- vcc8-supply: The input supply for BOOST +- vcc9-supply: The input supply for OTG_SWITCH + Optional RK818 properties: - vcc1-supply: The input supply for DCDC_REG1 - vcc2-supply: The input supply for DCDC_REG2 @@ -86,6 +107,21 @@ number as described in RK808 datasheet. - SWITCH_REGn - valid values for n are 1 to 2 +Following regulators of the RK809 and RK817 PMIC blocks are supported. Note that +the 'n' in regulator name, as in DCDC_REGn or LDOn, represents the DCDC or LDO +number as described in RK809 and RK817 datasheets. + + - DCDC_REGn + - valid values for n are 1 to 5 for RK809. + - valid values for n are 1 to 4 for RK817. + - LDO_REGn + - valid values for n are 1 to 9 for RK809. + - valid values for n are 1 to 9 for RK817. + - SWITCH_REGn + - valid values for n are 1 to 2 for RK809. + - BOOST for RK817 + - OTG_SWITCH for RK817 + Following regulators of the RK818 PMIC block are supported. Note that the 'n' in regulator name, as in DCDC_REGn or LDOn, represents the DCDC or LDO number as described in RK818 datasheet. @@ -98,6 +134,14 @@ number as described in RK818 datasheet. - HDMI_SWITCH - OTG_SWITCH +It is necessary to configure three pins for both the RK809 and RK817, the three +pins are "gpio_ts" "gpio_gt" "gpio_slp". + The gpio_gt and gpio_ts pins support the gpio function. + The gpio_slp pin is for controlling the pmic states, as below: + - reset + - power down + - sleep + Standard regulator bindings are used inside regulator subnodes. Check Documentation/devicetree/bindings/regulator/regulator.txt for more details From dc79054a64b3dc403ff370f9d4a4cbe502f81d77 Mon Sep 17 00:00:00 2001 From: Tony Xie Date: Fri, 21 Jun 2019 06:34:38 -0400 Subject: [PATCH 14/45] rtc: rk808: Add RK809 and RK817 support. RK809 and RK817 are power management IC chips for multimedia products. Most of their functions and registers are same, including the rtc. Signed-off-by: Tony Xie Acked-by: Alexandre Belloni Signed-off-by: Lee Jones --- drivers/rtc/Kconfig | 4 +-- drivers/rtc/rtc-rk808.c | 68 ++++++++++++++++++++++++++++++++--------- 2 files changed, 56 insertions(+), 16 deletions(-) diff --git a/drivers/rtc/Kconfig b/drivers/rtc/Kconfig index 7b8e156dbf38..cdd16c98a99c 100644 --- a/drivers/rtc/Kconfig +++ b/drivers/rtc/Kconfig @@ -373,11 +373,11 @@ config RTC_DRV_MAX77686 will be called rtc-max77686. config RTC_DRV_RK808 - tristate "Rockchip RK805/RK808/RK818 RTC" + tristate "Rockchip RK805/RK808/RK809/RK817/RK818 RTC" depends on MFD_RK808 help If you say yes here you will get support for the - RTC of RK805, RK808 and RK818 PMIC. + RTC of RK805, RK809 and RK817, RK808 and RK818 PMIC. This driver can also be built as a module. If so, the module will be called rk808-rtc. diff --git a/drivers/rtc/rtc-rk808.c b/drivers/rtc/rtc-rk808.c index 5c5d9f125669..6c6d674dad8d 100644 --- a/drivers/rtc/rtc-rk808.c +++ b/drivers/rtc/rtc-rk808.c @@ -50,9 +50,18 @@ #define NUM_TIME_REGS (RK808_WEEKS_REG - RK808_SECONDS_REG + 1) #define NUM_ALARM_REGS (RK808_ALARM_YEARS_REG - RK808_ALARM_SECONDS_REG + 1) +struct rk_rtc_compat_reg { + unsigned int ctrl_reg; + unsigned int status_reg; + unsigned int alarm_seconds_reg; + unsigned int int_reg; + unsigned int seconds_reg; +}; + struct rk808_rtc { struct rk808 *rk808; struct rtc_device *rtc; + struct rk_rtc_compat_reg *creg; int irq; }; @@ -101,7 +110,7 @@ static int rk808_rtc_readtime(struct device *dev, struct rtc_time *tm) int ret; /* Force an update of the shadowed registers right now */ - ret = regmap_update_bits(rk808->regmap, RK808_RTC_CTRL_REG, + ret = regmap_update_bits(rk808->regmap, rk808_rtc->creg->ctrl_reg, BIT_RTC_CTRL_REG_RTC_GET_TIME, BIT_RTC_CTRL_REG_RTC_GET_TIME); if (ret) { @@ -115,7 +124,7 @@ static int rk808_rtc_readtime(struct device *dev, struct rtc_time *tm) * 32khz. If we clear the GET_TIME bit here, the time of i2c transfer * certainly more than 31.25us: 16 * 2.5us at 400kHz bus frequency. */ - ret = regmap_update_bits(rk808->regmap, RK808_RTC_CTRL_REG, + ret = regmap_update_bits(rk808->regmap, rk808_rtc->creg->ctrl_reg, BIT_RTC_CTRL_REG_RTC_GET_TIME, 0); if (ret) { @@ -123,7 +132,7 @@ static int rk808_rtc_readtime(struct device *dev, struct rtc_time *tm) return ret; } - ret = regmap_bulk_read(rk808->regmap, RK808_SECONDS_REG, + ret = regmap_bulk_read(rk808->regmap, rk808_rtc->creg->seconds_reg, rtc_data, NUM_TIME_REGS); if (ret) { dev_err(dev, "Failed to bulk read rtc_data: %d\n", ret); @@ -162,7 +171,7 @@ static int rk808_rtc_set_time(struct device *dev, struct rtc_time *tm) rtc_data[6] = bin2bcd(tm->tm_wday); /* Stop RTC while updating the RTC registers */ - ret = regmap_update_bits(rk808->regmap, RK808_RTC_CTRL_REG, + ret = regmap_update_bits(rk808->regmap, rk808_rtc->creg->ctrl_reg, BIT_RTC_CTRL_REG_STOP_RTC_M, BIT_RTC_CTRL_REG_STOP_RTC_M); if (ret) { @@ -170,14 +179,14 @@ static int rk808_rtc_set_time(struct device *dev, struct rtc_time *tm) return ret; } - ret = regmap_bulk_write(rk808->regmap, RK808_SECONDS_REG, + ret = regmap_bulk_write(rk808->regmap, rk808_rtc->creg->seconds_reg, rtc_data, NUM_TIME_REGS); if (ret) { dev_err(dev, "Failed to bull write rtc_data: %d\n", ret); return ret; } /* Start RTC again */ - ret = regmap_update_bits(rk808->regmap, RK808_RTC_CTRL_REG, + ret = regmap_update_bits(rk808->regmap, rk808_rtc->creg->ctrl_reg, BIT_RTC_CTRL_REG_STOP_RTC_M, 0); if (ret) { dev_err(dev, "Failed to update RTC control: %d\n", ret); @@ -195,8 +204,13 @@ static int rk808_rtc_readalarm(struct device *dev, struct rtc_wkalrm *alrm) uint32_t int_reg; int ret; - ret = regmap_bulk_read(rk808->regmap, RK808_ALARM_SECONDS_REG, + ret = regmap_bulk_read(rk808->regmap, + rk808_rtc->creg->alarm_seconds_reg, alrm_data, NUM_ALARM_REGS); + if (ret) { + dev_err(dev, "Failed to read RTC alarm date REG: %d\n", ret); + return ret; + } alrm->time.tm_sec = bcd2bin(alrm_data[0] & SECONDS_REG_MSK); alrm->time.tm_min = bcd2bin(alrm_data[1] & MINUTES_REG_MAK); @@ -206,7 +220,7 @@ static int rk808_rtc_readalarm(struct device *dev, struct rtc_wkalrm *alrm) alrm->time.tm_year = (bcd2bin(alrm_data[5] & YEARS_REG_MSK)) + 100; rockchip_to_gregorian(&alrm->time); - ret = regmap_read(rk808->regmap, RK808_RTC_INT_REG, &int_reg); + ret = regmap_read(rk808->regmap, rk808_rtc->creg->int_reg, &int_reg); if (ret) { dev_err(dev, "Failed to read RTC INT REG: %d\n", ret); return ret; @@ -225,7 +239,7 @@ static int rk808_rtc_stop_alarm(struct rk808_rtc *rk808_rtc) struct rk808 *rk808 = rk808_rtc->rk808; int ret; - ret = regmap_update_bits(rk808->regmap, RK808_RTC_INT_REG, + ret = regmap_update_bits(rk808->regmap, rk808_rtc->creg->int_reg, BIT_RTC_INTERRUPTS_REG_IT_ALARM_M, 0); return ret; @@ -236,7 +250,7 @@ static int rk808_rtc_start_alarm(struct rk808_rtc *rk808_rtc) struct rk808 *rk808 = rk808_rtc->rk808; int ret; - ret = regmap_update_bits(rk808->regmap, RK808_RTC_INT_REG, + ret = regmap_update_bits(rk808->regmap, rk808_rtc->creg->int_reg, BIT_RTC_INTERRUPTS_REG_IT_ALARM_M, BIT_RTC_INTERRUPTS_REG_IT_ALARM_M); @@ -266,7 +280,8 @@ static int rk808_rtc_setalarm(struct device *dev, struct rtc_wkalrm *alrm) alrm_data[4] = bin2bcd(alrm->time.tm_mon + 1); alrm_data[5] = bin2bcd(alrm->time.tm_year - 100); - ret = regmap_bulk_write(rk808->regmap, RK808_ALARM_SECONDS_REG, + ret = regmap_bulk_write(rk808->regmap, + rk808_rtc->creg->alarm_seconds_reg, alrm_data, NUM_ALARM_REGS); if (ret) { dev_err(dev, "Failed to bulk write: %d\n", ret); @@ -310,7 +325,7 @@ static irqreturn_t rk808_alarm_irq(int irq, void *data) struct i2c_client *client = rk808->i2c; int ret; - ret = regmap_write(rk808->regmap, RK808_RTC_STATUS_REG, + ret = regmap_write(rk808->regmap, rk808_rtc->creg->status_reg, RTC_STATUS_MASK); if (ret) { dev_err(&client->dev, @@ -361,6 +376,22 @@ static int rk808_rtc_resume(struct device *dev) static SIMPLE_DEV_PM_OPS(rk808_rtc_pm_ops, rk808_rtc_suspend, rk808_rtc_resume); +static struct rk_rtc_compat_reg rk808_creg = { + .ctrl_reg = RK808_RTC_CTRL_REG, + .status_reg = RK808_RTC_STATUS_REG, + .alarm_seconds_reg = RK808_ALARM_SECONDS_REG, + .int_reg = RK808_RTC_INT_REG, + .seconds_reg = RK808_SECONDS_REG, +}; + +static struct rk_rtc_compat_reg rk817_creg = { + .ctrl_reg = RK817_RTC_CTRL_REG, + .status_reg = RK817_RTC_STATUS_REG, + .alarm_seconds_reg = RK817_ALARM_SECONDS_REG, + .int_reg = RK817_RTC_INT_REG, + .seconds_reg = RK817_SECONDS_REG, +}; + static int rk808_rtc_probe(struct platform_device *pdev) { struct rk808 *rk808 = dev_get_drvdata(pdev->dev.parent); @@ -371,11 +402,20 @@ static int rk808_rtc_probe(struct platform_device *pdev) if (rk808_rtc == NULL) return -ENOMEM; + switch (rk808->variant) { + case RK809_ID: + case RK817_ID: + rk808_rtc->creg = &rk817_creg; + break; + default: + rk808_rtc->creg = &rk808_creg; + break; + } platform_set_drvdata(pdev, rk808_rtc); rk808_rtc->rk808 = rk808; /* start rtc running by default, and use shadowed timer. */ - ret = regmap_update_bits(rk808->regmap, RK808_RTC_CTRL_REG, + ret = regmap_update_bits(rk808->regmap, rk808_rtc->creg->ctrl_reg, BIT_RTC_CTRL_REG_STOP_RTC_M | BIT_RTC_CTRL_REG_RTC_READSEL_M, BIT_RTC_CTRL_REG_RTC_READSEL_M); @@ -385,7 +425,7 @@ static int rk808_rtc_probe(struct platform_device *pdev) return ret; } - ret = regmap_write(rk808->regmap, RK808_RTC_STATUS_REG, + ret = regmap_write(rk808->regmap, rk808_rtc->creg->status_reg, RTC_STATUS_MASK); if (ret) { dev_err(&pdev->dev, From 8ed14401974830f316a419b073e58ef75a473a63 Mon Sep 17 00:00:00 2001 From: Tony Xie Date: Fri, 21 Jun 2019 06:34:55 -0400 Subject: [PATCH 15/45] clk: RK808: Add RK809 and RK817 support. RK809 and RK817 are power management IC chips for multimedia products. most of their functions and registers are same, including the clkout funciton. Signed-off-by: Tony Xie Acked-by: Stephen Boyd Signed-off-by: Lee Jones --- drivers/clk/Kconfig | 9 +++--- drivers/clk/clk-rk808.c | 64 ++++++++++++++++++++++++++++++++++++++++- 2 files changed, 67 insertions(+), 6 deletions(-) diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig index fc1e0cf44995..2858b7df08f7 100644 --- a/drivers/clk/Kconfig +++ b/drivers/clk/Kconfig @@ -53,13 +53,12 @@ config COMMON_CLK_MAX9485 This driver supports Maxim 9485 Programmable Audio Clock Generator config COMMON_CLK_RK808 - tristate "Clock driver for RK805/RK808/RK818" + tristate "Clock driver for RK805/RK808/RK809/RK817/RK818" depends on MFD_RK808 ---help--- - This driver supports RK805, RK808 and RK818 crystal oscillator clock. These - multi-function devices have two fixed-rate oscillators, - clocked at 32KHz each. Clkout1 is always on, Clkout2 can off - by control register. + This driver supports RK805, RK809 and RK817, RK808 and RK818 crystal oscillator clock. + These multi-function devices have two fixed-rate oscillators, clocked at 32KHz each. + Clkout1 is always on, Clkout2 can off by control register. config COMMON_CLK_HI655X tristate "Clock driver for Hi655x" if EXPERT diff --git a/drivers/clk/clk-rk808.c b/drivers/clk/clk-rk808.c index 8d90bdf5b946..75f2cf0dfc9f 100644 --- a/drivers/clk/clk-rk808.c +++ b/drivers/clk/clk-rk808.c @@ -96,6 +96,68 @@ of_clk_rk808_get(struct of_phandle_args *clkspec, void *data) return idx ? &rk808_clkout->clkout2_hw : &rk808_clkout->clkout1_hw; } +static int rk817_clkout2_enable(struct clk_hw *hw, bool enable) +{ + struct rk808_clkout *rk808_clkout = container_of(hw, + struct rk808_clkout, + clkout2_hw); + struct rk808 *rk808 = rk808_clkout->rk808; + + return regmap_update_bits(rk808->regmap, RK817_SYS_CFG(1), + RK817_CLK32KOUT2_EN, + enable ? RK817_CLK32KOUT2_EN : 0); +} + +static int rk817_clkout2_prepare(struct clk_hw *hw) +{ + return rk817_clkout2_enable(hw, true); +} + +static void rk817_clkout2_unprepare(struct clk_hw *hw) +{ + rk817_clkout2_enable(hw, false); +} + +static int rk817_clkout2_is_prepared(struct clk_hw *hw) +{ + struct rk808_clkout *rk808_clkout = container_of(hw, + struct rk808_clkout, + clkout2_hw); + struct rk808 *rk808 = rk808_clkout->rk808; + unsigned int val; + + int ret = regmap_read(rk808->regmap, RK817_SYS_CFG(1), &val); + + if (ret < 0) + return 0; + + return (val & RK817_CLK32KOUT2_EN) ? 1 : 0; +} + +static const struct clk_ops rk817_clkout2_ops = { + .prepare = rk817_clkout2_prepare, + .unprepare = rk817_clkout2_unprepare, + .is_prepared = rk817_clkout2_is_prepared, + .recalc_rate = rk808_clkout_recalc_rate, +}; + +static const struct clk_ops *rkpmic_get_ops(long variant) +{ + switch (variant) { + case RK809_ID: + case RK817_ID: + return &rk817_clkout2_ops; + /* + * For the default case, it match the following PMIC type. + * RK805_ID + * RK808_ID + * RK818_ID + */ + default: + return &rk808_clkout2_ops; + } +} + static int rk808_clkout_probe(struct platform_device *pdev) { struct rk808 *rk808 = dev_get_drvdata(pdev->dev.parent); @@ -127,7 +189,7 @@ static int rk808_clkout_probe(struct platform_device *pdev) return ret; init.name = "rk808-clkout2"; - init.ops = &rk808_clkout2_ops; + init.ops = rkpmic_get_ops(rk808->variant); rk808_clkout->clkout2_hw.init = &init; /* optional override of the clockname */ From f3f4363b1239584efc1a22c5ca0f2308e5693c38 Mon Sep 17 00:00:00 2001 From: Colin Ian King Date: Thu, 27 Jun 2019 14:16:39 +0100 Subject: [PATCH 16/45] regulator: lp87565: Fix missing break in switch statement Currently the LP87565_DEVICE_TYPE_LP87561_Q1 case does not have a break statement, causing it to fall through to a dev_err message. Fix this by adding in the missing break statement. Addresses-Coverity: ("Missing break in switch") Fixes: 7ee63bd74750 ("regulator: lp87565: Add 4-phase lp87561 regulator support") Signed-off-by: Colin Ian King Reviewed-by: Keerthy Signed-off-by: Lee Jones --- drivers/regulator/lp87565-regulator.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/regulator/lp87565-regulator.c b/drivers/regulator/lp87565-regulator.c index af00d1ffcf33..142b6f17dcfe 100644 --- a/drivers/regulator/lp87565-regulator.c +++ b/drivers/regulator/lp87565-regulator.c @@ -183,6 +183,7 @@ static int lp87565_regulator_probe(struct platform_device *pdev) case LP87565_DEVICE_TYPE_LP87561_Q1: min_idx = LP87565_BUCK_3210; max_idx = LP87565_BUCK_3210; + break; default: dev_err(lp87565->dev, "Invalid lp config %d\n", lp87565->dev_type); From 5aa3709c0a5c026735b0ddd4ec80810a23d65f5b Mon Sep 17 00:00:00 2001 From: Daniel Gomez Date: Sat, 11 May 2019 12:03:58 +0200 Subject: [PATCH 17/45] mfd: madera: Add missing of table registration MODULE_DEVICE_TABLE(of, ) should be called to complete DT OF mathing mechanism and register it. Before this patch: modinfo ./drivers/mfd/madera.ko | grep alias After this patch: modinfo ./drivers/mfd/madera.ko | grep alias alias: of:N*T*Ccirrus,wm1840C* alias: of:N*T*Ccirrus,wm1840 alias: of:N*T*Ccirrus,cs47l91C* alias: of:N*T*Ccirrus,cs47l91 alias: of:N*T*Ccirrus,cs47l90C* alias: of:N*T*Ccirrus,cs47l90 alias: of:N*T*Ccirrus,cs47l85C* alias: of:N*T*Ccirrus,cs47l85 alias: of:N*T*Ccirrus,cs47l35C* alias: of:N*T*Ccirrus,cs47l35 Reported-by: Javier Martinez Canillas Signed-off-by: Daniel Gomez Signed-off-by: Lee Jones --- drivers/mfd/madera-core.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/mfd/madera-core.c b/drivers/mfd/madera-core.c index 2a77988d0462..826b971ccb86 100644 --- a/drivers/mfd/madera-core.c +++ b/drivers/mfd/madera-core.c @@ -286,6 +286,7 @@ const struct of_device_id madera_of_match[] = { { .compatible = "cirrus,wm1840", .data = (void *)WM1840 }, {} }; +MODULE_DEVICE_TABLE(of, madera_of_match); EXPORT_SYMBOL_GPL(madera_of_match); static int madera_get_reset_gpio(struct madera *madera) From 1bb407f17c5316888c3c446e26cb2bb78943f236 Mon Sep 17 00:00:00 2001 From: Gwendal Grignou Date: Fri, 17 May 2019 16:38:55 -0700 Subject: [PATCH 18/45] mfd: cros_ec: Register cros_ec_lid_angle driver when presented Register driver when EC indicates has precise lid angle calculation code running. Fix incorrect extra resource allocation in cros_ec_sensors_register(). Signed-off-by: Gwendal Grignou Signed-off-by: Lee Jones --- drivers/mfd/cros_ec_dev.c | 13 ++++++++++--- 1 file changed, 10 insertions(+), 3 deletions(-) diff --git a/drivers/mfd/cros_ec_dev.c b/drivers/mfd/cros_ec_dev.c index 54a58df571b6..d992365472b8 100644 --- a/drivers/mfd/cros_ec_dev.c +++ b/drivers/mfd/cros_ec_dev.c @@ -297,13 +297,15 @@ static void cros_ec_sensors_register(struct cros_ec_dev *ec) resp = (struct ec_response_motion_sense *)msg->data; sensor_num = resp->dump.sensor_count; - /* Allocate 1 extra sensors in FIFO are needed */ - sensor_cells = kcalloc(sensor_num + 1, sizeof(struct mfd_cell), + /* + * Allocate 2 extra sensors if lid angle sensor and/or FIFO are needed. + */ + sensor_cells = kcalloc(sensor_num + 2, sizeof(struct mfd_cell), GFP_KERNEL); if (sensor_cells == NULL) goto error; - sensor_platforms = kcalloc(sensor_num + 1, + sensor_platforms = kcalloc(sensor_num, sizeof(struct cros_ec_sensor_platform), GFP_KERNEL); if (sensor_platforms == NULL) @@ -363,6 +365,11 @@ static void cros_ec_sensors_register(struct cros_ec_dev *ec) sensor_cells[id].name = "cros-ec-ring"; id++; } + if (cros_ec_check_features(ec, + EC_FEATURE_REFINED_TABLET_MODE_HYSTERESIS)) { + sensor_cells[id].name = "cros-ec-lid-angle"; + id++; + } ret = mfd_add_devices(ec->dev, 0, sensor_cells, id, NULL, 0, NULL); From 2a87f09020c0d35193c803c20dfdae6522b36d5e Mon Sep 17 00:00:00 2001 From: Leonard Crestez Date: Tue, 21 May 2019 20:41:12 +0000 Subject: [PATCH 19/45] mfd: bd718x7: Remove hardcoded config for button press duration The reset button on imx8mm-evk is tied to PWRON_B pin of bd71847 and the long press duration is set to zero from OTP. The linux driver overrides those values and breaks reset from button. Overwriting OTP or bootloader configuration with some hardcoded defaults is not desirable, keep already programmed values instead. Signed-off-by: Leonard Crestez Acked-By: Matti Vaittinen Signed-off-by: Lee Jones --- drivers/mfd/rohm-bd718x7.c | 23 ----------------------- 1 file changed, 23 deletions(-) diff --git a/drivers/mfd/rohm-bd718x7.c b/drivers/mfd/rohm-bd718x7.c index 7beb444a57cb..af91092c7fca 100644 --- a/drivers/mfd/rohm-bd718x7.c +++ b/drivers/mfd/rohm-bd718x7.c @@ -118,29 +118,6 @@ static int bd718xx_i2c_probe(struct i2c_client *i2c, return ret; } - /* Configure short press to 10 milliseconds */ - ret = regmap_update_bits(bd718xx->chip.regmap, - BD718XX_REG_PWRONCONFIG0, - BD718XX_PWRBTN_PRESS_DURATION_MASK, - BD718XX_PWRBTN_SHORT_PRESS_10MS); - if (ret) { - dev_err(&i2c->dev, - "Failed to configure button short press timeout\n"); - return ret; - } - - /* Configure long press to 10 seconds */ - ret = regmap_update_bits(bd718xx->chip.regmap, - BD718XX_REG_PWRONCONFIG1, - BD718XX_PWRBTN_PRESS_DURATION_MASK, - BD718XX_PWRBTN_LONG_PRESS_10S); - - if (ret) { - dev_err(&i2c->dev, - "Failed to configure button long press timeout\n"); - return ret; - } - ret = regmap_irq_get_virq(bd718xx->irq_data, BD718XX_INT_PWRBTN_S); if (ret < 0) { From 907bf9d65f2da9b7ea1b5aa0c1b8d5950f29356d Mon Sep 17 00:00:00 2001 From: Leonard Crestez Date: Tue, 21 May 2019 20:41:13 +0000 Subject: [PATCH 20/45] dt-bindings: mfd: Document short/long press duration for BD718X7 These values can be overwritten at probe time. Signed-off-by: Leonard Crestez Acked-By: Matti Vaittinen Signed-off-by: Lee Jones --- .../devicetree/bindings/mfd/rohm,bd71837-pmic.txt | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/Documentation/devicetree/bindings/mfd/rohm,bd71837-pmic.txt b/Documentation/devicetree/bindings/mfd/rohm,bd71837-pmic.txt index d5f68ac78d15..3649c1191432 100644 --- a/Documentation/devicetree/bindings/mfd/rohm,bd71837-pmic.txt +++ b/Documentation/devicetree/bindings/mfd/rohm,bd71837-pmic.txt @@ -38,6 +38,14 @@ target state is set to READY by default. If SNVS state is used the boot crucial regulators must have the regulator-always-on and regulator-boot-on properties set in regulator node. +- rohm,short-press-ms : Short press duration in milliseconds +- rohm,long-press-ms : Long press duration in milliseconds + +Configure the "short press" and "long press" timers for the power button. +Values are rounded to what hardware supports (500ms multiple for short and +1000ms multiple for long). If these properties are not present the existing +configuration (from bootloader or OTP) is not touched. + Example: /* external oscillator node */ From e25547f899a531ecea1fcca975752872682ec564 Mon Sep 17 00:00:00 2001 From: Leonard Crestez Date: Tue, 21 May 2019 20:41:14 +0000 Subject: [PATCH 21/45] mfd: bd718x7: Make power button press duration configurable Allow overwriting the values in BD718XX_REG_PWRONCONFIG0 and BD718XX_REG_PWRONCONFIG1 via devicetree. Read values in milliseconds and attempt to round them to something supported by the hardware. Keep existing values (from bootloader or OTP) if property is not present. Signed-off-by: Leonard Crestez Reviewed-By: Matti Vaittinen [Lee: Fixed-up merge/API conflict] Signed-off-by: Lee Jones --- drivers/mfd/rohm-bd718x7.c | 42 ++++++++++++++++++++++++++++++++++++++ 1 file changed, 42 insertions(+) diff --git a/drivers/mfd/rohm-bd718x7.c b/drivers/mfd/rohm-bd718x7.c index af91092c7fca..85e7f5133365 100644 --- a/drivers/mfd/rohm-bd718x7.c +++ b/drivers/mfd/rohm-bd718x7.c @@ -81,6 +81,44 @@ static const struct regmap_config bd718xx_regmap_config = { .cache_type = REGCACHE_RBTREE, }; +static int bd718xx_init_press_duration(struct bd718xx *bd718xx) +{ + struct device* dev = bd718xx->chip.dev; + u32 short_press_ms, long_press_ms; + u32 short_press_value, long_press_value; + int ret; + + ret = of_property_read_u32(dev->of_node, "rohm,short-press-ms", + &short_press_ms); + if (!ret) { + short_press_value = min(15u, (short_press_ms + 250) / 500); + ret = regmap_update_bits(bd718xx->chip.regmap, + BD718XX_REG_PWRONCONFIG0, + BD718XX_PWRBTN_PRESS_DURATION_MASK, + short_press_value); + if (ret) { + dev_err(dev, "Failed to init pwron short press\n"); + return ret; + } + } + + ret = of_property_read_u32(dev->of_node, "rohm,long-press-ms", + &long_press_ms); + if (!ret) { + long_press_value = min(15u, (long_press_ms + 500) / 1000); + ret = regmap_update_bits(bd718xx->chip.regmap, + BD718XX_REG_PWRONCONFIG1, + BD718XX_PWRBTN_PRESS_DURATION_MASK, + long_press_value); + if (ret) { + dev_err(dev, "Failed to init pwron long press\n"); + return ret; + } + } + + return 0; +} + static int bd718xx_i2c_probe(struct i2c_client *i2c, const struct i2c_device_id *id) { @@ -118,6 +156,10 @@ static int bd718xx_i2c_probe(struct i2c_client *i2c, return ret; } + ret = bd718xx_init_press_duration(bd718xx); + if (ret) + return ret; + ret = regmap_irq_get_virq(bd718xx->irq_data, BD718XX_INT_PWRBTN_S); if (ret < 0) { From 23e30b3c5f953e6650840c07cb8563909a72fc01 Mon Sep 17 00:00:00 2001 From: Alexandre Belloni Date: Tue, 21 May 2019 22:43:04 +0200 Subject: [PATCH 22/45] mfd: menelaus: Remove superfluous error message The RTC core already has error messages in case of failure, there is no need to have another message in the driver. Signed-off-by: Alexandre Belloni Signed-off-by: Lee Jones --- drivers/mfd/menelaus.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/drivers/mfd/menelaus.c b/drivers/mfd/menelaus.c index d28ebe7ecd21..91c568ef5857 100644 --- a/drivers/mfd/menelaus.c +++ b/drivers/mfd/menelaus.c @@ -1138,8 +1138,6 @@ static inline void menelaus_rtc_init(struct menelaus_chip *m) menelaus_remove_irq_work(MENELAUS_RTCALM_IRQ); device_init_wakeup(&m->client->dev, 0); } - dev_err(&m->client->dev, "can't register RTC: %d\n", - (int) PTR_ERR(m->rtc)); the_menelaus->rtc = NULL; } } From f88314c1e911a74808059aead0350956f2072ae2 Mon Sep 17 00:00:00 2001 From: Andy Shevchenko Date: Fri, 24 May 2019 21:13:44 +0300 Subject: [PATCH 23/45] mfd: intel-lpss: Keep device tables sorted by ID Easier to find and maintain if the device tables sorted by ID. Do it here for intel-lpss MFD driver. Signed-off-by: Andy Shevchenko Signed-off-by: Lee Jones --- drivers/mfd/intel-lpss-pci.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/mfd/intel-lpss-pci.c b/drivers/mfd/intel-lpss-pci.c index 6b111be944d9..217a9be31c58 100644 --- a/drivers/mfd/intel-lpss-pci.c +++ b/drivers/mfd/intel-lpss-pci.c @@ -186,10 +186,10 @@ static const struct pci_device_id intel_lpss_pci_ids[] = { { PCI_VDEVICE(INTEL, 0x31bc), (kernel_ulong_t)&bxt_uart_info }, { PCI_VDEVICE(INTEL, 0x31be), (kernel_ulong_t)&bxt_uart_info }, { PCI_VDEVICE(INTEL, 0x31c0), (kernel_ulong_t)&bxt_uart_info }, - { PCI_VDEVICE(INTEL, 0x31ee), (kernel_ulong_t)&bxt_uart_info }, { PCI_VDEVICE(INTEL, 0x31c2), (kernel_ulong_t)&bxt_info }, { PCI_VDEVICE(INTEL, 0x31c4), (kernel_ulong_t)&bxt_info }, { PCI_VDEVICE(INTEL, 0x31c6), (kernel_ulong_t)&bxt_info }, + { PCI_VDEVICE(INTEL, 0x31ee), (kernel_ulong_t)&bxt_uart_info }, /* ICL-LP */ { PCI_VDEVICE(INTEL, 0x34a8), (kernel_ulong_t)&spt_uart_info }, { PCI_VDEVICE(INTEL, 0x34a9), (kernel_ulong_t)&spt_uart_info }, @@ -236,7 +236,6 @@ static const struct pci_device_id intel_lpss_pci_ids[] = { { PCI_VDEVICE(INTEL, 0x9da9), (kernel_ulong_t)&spt_uart_info }, { PCI_VDEVICE(INTEL, 0x9daa), (kernel_ulong_t)&spt_info }, { PCI_VDEVICE(INTEL, 0x9dab), (kernel_ulong_t)&spt_info }, - { PCI_VDEVICE(INTEL, 0x9dfb), (kernel_ulong_t)&spt_info }, { PCI_VDEVICE(INTEL, 0x9dc5), (kernel_ulong_t)&cnl_i2c_info }, { PCI_VDEVICE(INTEL, 0x9dc6), (kernel_ulong_t)&cnl_i2c_info }, { PCI_VDEVICE(INTEL, 0x9dc7), (kernel_ulong_t)&spt_uart_info }, @@ -244,6 +243,7 @@ static const struct pci_device_id intel_lpss_pci_ids[] = { { PCI_VDEVICE(INTEL, 0x9de9), (kernel_ulong_t)&cnl_i2c_info }, { PCI_VDEVICE(INTEL, 0x9dea), (kernel_ulong_t)&cnl_i2c_info }, { PCI_VDEVICE(INTEL, 0x9deb), (kernel_ulong_t)&cnl_i2c_info }, + { PCI_VDEVICE(INTEL, 0x9dfb), (kernel_ulong_t)&spt_info }, /* SPT-H */ { PCI_VDEVICE(INTEL, 0xa127), (kernel_ulong_t)&spt_uart_info }, { PCI_VDEVICE(INTEL, 0xa128), (kernel_ulong_t)&spt_uart_info }, @@ -268,12 +268,12 @@ static const struct pci_device_id intel_lpss_pci_ids[] = { { PCI_VDEVICE(INTEL, 0xa329), (kernel_ulong_t)&spt_uart_info }, { PCI_VDEVICE(INTEL, 0xa32a), (kernel_ulong_t)&spt_info }, { PCI_VDEVICE(INTEL, 0xa32b), (kernel_ulong_t)&spt_info }, - { PCI_VDEVICE(INTEL, 0xa37b), (kernel_ulong_t)&spt_info }, { PCI_VDEVICE(INTEL, 0xa347), (kernel_ulong_t)&spt_uart_info }, { PCI_VDEVICE(INTEL, 0xa368), (kernel_ulong_t)&cnl_i2c_info }, { PCI_VDEVICE(INTEL, 0xa369), (kernel_ulong_t)&cnl_i2c_info }, { PCI_VDEVICE(INTEL, 0xa36a), (kernel_ulong_t)&cnl_i2c_info }, { PCI_VDEVICE(INTEL, 0xa36b), (kernel_ulong_t)&cnl_i2c_info }, + { PCI_VDEVICE(INTEL, 0xa37b), (kernel_ulong_t)&spt_info }, { } }; MODULE_DEVICE_TABLE(pci, intel_lpss_pci_ids); From c176c6d7e932662668bcaec2d763657096589d85 Mon Sep 17 00:00:00 2001 From: Robert Hancock Date: Tue, 4 Jun 2019 16:35:43 -0600 Subject: [PATCH 24/45] mfd: core: Set fwnode for created devices The logic for setting the of_node on devices created by mfd did not set the fwnode pointer to match, which caused fwnode-based APIs to malfunction on these devices since the fwnode pointer was null. Fix this. Signed-off-by: Robert Hancock Signed-off-by: Lee Jones --- drivers/mfd/mfd-core.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/mfd/mfd-core.c b/drivers/mfd/mfd-core.c index 1ade4c8cc91f..9ce909b821ec 100644 --- a/drivers/mfd/mfd-core.c +++ b/drivers/mfd/mfd-core.c @@ -179,6 +179,7 @@ static int mfd_add_device(struct device *parent, int id, for_each_child_of_node(parent->of_node, np) { if (of_device_is_compatible(np, cell->of_compatible)) { pdev->dev.of_node = np; + pdev->dev.fwnode = &np->fwnode; break; } } From 5da6cbcd2f395981aa9bfc571ace99f1c786c985 Mon Sep 17 00:00:00 2001 From: Arnd Bergmann Date: Mon, 20 May 2019 10:06:25 +0100 Subject: [PATCH 25/45] mfd: arizona: Fix undefined behavior When the driver is used with a subdevice that is disabled in the kernel configuration, clang gets a little confused about the control flow and fails to notice that n_subdevs is only uninitialized when subdevs is NULL, and we check for that, leading to a false-positive warning: drivers/mfd/arizona-core.c:1423:19: error: variable 'n_subdevs' is uninitialized when used here [-Werror,-Wuninitialized] subdevs, n_subdevs, NULL, 0, NULL); ^~~~~~~~~ drivers/mfd/arizona-core.c:999:15: note: initialize the variable 'n_subdevs' to silence this warning int n_subdevs, ret, i; ^ = 0 Ideally, we would rearrange the code to avoid all those early initializations and have an explicit exit in each disabled case, but it's much easier to chicken out and add one more initialization here to shut up the warning. Signed-off-by: Arnd Bergmann Reviewed-by: Nathan Chancellor Signed-off-by: Charles Keepax Signed-off-by: Lee Jones --- drivers/mfd/arizona-core.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/mfd/arizona-core.c b/drivers/mfd/arizona-core.c index 27b61639cdc7..0ca0fc9a67fd 100644 --- a/drivers/mfd/arizona-core.c +++ b/drivers/mfd/arizona-core.c @@ -996,7 +996,7 @@ int arizona_dev_init(struct arizona *arizona) unsigned int reg, val; int (*apply_patch)(struct arizona *) = NULL; const struct mfd_cell *subdevs = NULL; - int n_subdevs, ret, i; + int n_subdevs = 0, ret, i; dev_set_drvdata(arizona->dev, arizona); mutex_init(&arizona->clk_lock); From 6987fd42239ad43937166dace2ed8fb260b14d25 Mon Sep 17 00:00:00 2001 From: Otto Sabart Date: Mon, 20 May 2019 10:06:26 +0100 Subject: [PATCH 26/45] mfd: madera: Fix bad reference to pinctrl.txt file The pinctrl.txt file was converted into reStructuredText and moved into driver-api folder. This patch updates the broken reference. Fixes: 5a9b73832e9e ("pinctrl.txt: move it to the driver-api book") Signed-off-by: Otto Sabart Signed-off-by: Charles Keepax Reviewed-by: Mauro Carvalho Chehab Signed-off-by: Lee Jones --- include/linux/mfd/madera/pdata.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/include/linux/mfd/madera/pdata.h b/include/linux/mfd/madera/pdata.h index 8dc852402dbb..dd00ab824e5b 100644 --- a/include/linux/mfd/madera/pdata.h +++ b/include/linux/mfd/madera/pdata.h @@ -34,7 +34,8 @@ struct madera_codec_pdata; * @micvdd: Substruct of pdata for the MICVDD regulator * @irq_flags: Mode for primary IRQ (defaults to active low) * @gpio_base: Base GPIO number - * @gpio_configs: Array of GPIO configurations (See Documentation/pinctrl.txt) + * @gpio_configs: Array of GPIO configurations (See + * Documentation/driver-api/pinctl.rst) * @n_gpio_configs: Number of entries in gpio_configs * @gpsw: General purpose switch mode setting. Depends on the external * hardware connected to the switch. (See the SW1_MODE field From 323250166d4ebbb927a68a6387887f6f59d5da4d Mon Sep 17 00:00:00 2001 From: Stuart Henderson Date: Mon, 20 May 2019 10:06:27 +0100 Subject: [PATCH 27/45] mfd: madera: Fix potential uninitialised use of variable regmap_read won't set val to anything if an ACKed bus fails. Signed-off-by: Stuart Henderson Signed-off-by: Charles Keepax Signed-off-by: Lee Jones --- drivers/mfd/madera-core.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/mfd/madera-core.c b/drivers/mfd/madera-core.c index 826b971ccb86..dcc5c28925f2 100644 --- a/drivers/mfd/madera-core.c +++ b/drivers/mfd/madera-core.c @@ -139,7 +139,7 @@ EXPORT_SYMBOL_GPL(madera_name_from_type); static int madera_wait_for_boot(struct madera *madera) { ktime_t timeout; - unsigned int val; + unsigned int val = 0; int ret = 0; /* From ee1856db5a886f6700206b9c900f1191ab5405ed Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Mon, 20 May 2019 10:06:28 +0100 Subject: [PATCH 28/45] mfd: madera: Add supply mapping for MICVDD Currently we are relying on the exact match of the regulator name to find MICVDD, we should add an explicit supply mapping to allow this to be found more reliably. Signed-off-by: Charles Keepax Signed-off-by: Lee Jones --- drivers/mfd/madera-core.c | 18 +++++++++++++++--- 1 file changed, 15 insertions(+), 3 deletions(-) diff --git a/drivers/mfd/madera-core.c b/drivers/mfd/madera-core.c index dcc5c28925f2..bc4e25b5b97d 100644 --- a/drivers/mfd/madera-core.c +++ b/drivers/mfd/madera-core.c @@ -59,7 +59,11 @@ static const struct mfd_cell cs47l35_devs[] = { { .name = "madera-irq", }, { .name = "madera-micsupp", }, { .name = "madera-gpio", }, - { .name = "madera-extcon", }, + { + .name = "madera-extcon", + .parent_supplies = cs47l35_supplies, + .num_parent_supplies = 1, /* We only need MICVDD */ + }, { .name = "cs47l35-codec", .parent_supplies = cs47l35_supplies, @@ -83,7 +87,11 @@ static const struct mfd_cell cs47l85_devs[] = { { .name = "madera-irq", }, { .name = "madera-micsupp" }, { .name = "madera-gpio", }, - { .name = "madera-extcon", }, + { + .name = "madera-extcon", + .parent_supplies = cs47l85_supplies, + .num_parent_supplies = 1, /* We only need MICVDD */ + }, { .name = "cs47l85-codec", .parent_supplies = cs47l85_supplies, @@ -105,7 +113,11 @@ static const struct mfd_cell cs47l90_devs[] = { { .name = "madera-irq", }, { .name = "madera-micsupp", }, { .name = "madera-gpio", }, - { .name = "madera-extcon", }, + { + .name = "madera-extcon", + .parent_supplies = cs47l90_supplies, + .num_parent_supplies = 1, /* We only need MICVDD */ + }, { .name = "cs47l90-codec", .parent_supplies = cs47l90_supplies, From 8f759058e9f9616980aaf838a45cc545cbe6e447 Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Thu, 30 May 2019 15:39:51 +0100 Subject: [PATCH 29/45] mfd: madera: Update DT bindings to add additional CODECs This adds the cs47l15, cs42l92, cs47l92 and cs47l93 to the list of compatible strings and updates some properties that need to note the new CODECs. Signed-off-by: Richard Fitzgerald Signed-off-by: Charles Keepax Signed-off-by: Lee Jones --- Documentation/devicetree/bindings/mfd/madera.txt | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/mfd/madera.txt b/Documentation/devicetree/bindings/mfd/madera.txt index db3266088386..cad0f2800502 100644 --- a/Documentation/devicetree/bindings/mfd/madera.txt +++ b/Documentation/devicetree/bindings/mfd/madera.txt @@ -11,10 +11,14 @@ bindings/sound/madera.txt Required properties: - compatible : One of the following chip-specific strings: + "cirrus,cs47l15" "cirrus,cs47l35" "cirrus,cs47l85" "cirrus,cs47l90" "cirrus,cs47l91" + "cirrus,cs42l92" + "cirrus,cs47l92" + "cirrus,cs47l93" "cirrus,wm1840" - reg : I2C slave address when connected using I2C, chip select number when @@ -22,7 +26,7 @@ Required properties: - DCVDD-supply : Power supply for the device as defined in bindings/regulator/regulator.txt - Mandatory on CS47L35, CS47L90, CS47L91 + Mandatory on CS47L15, CS47L35, CS47L90, CS47L91, CS42L92, CS47L92, CS47L93 Optional on CS47L85, WM1840 - AVDD-supply, DBVDD1-supply, DBVDD2-supply, CPVDD1-supply, CPVDD2-supply : @@ -35,7 +39,7 @@ Required properties: (CS47L85, WM1840) - SPKVDD-supply : Power supply for the device - (CS47L35) + (CS47L15, CS47L35) - interrupt-controller : Indicates that this device is an interrupt controller From 1ef921b6d1b68887be22f02dabc6ae73c112dce4 Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Thu, 30 May 2019 15:39:52 +0100 Subject: [PATCH 30/45] mfd: madera: Add Madera core support for CS47L15 This patch adds all the core support and defines for the Cirrus Logic CS47L15 smart audio CODEC. Registers or fields are named MADERA_* if it is part of the common hardware platform and does not conflict with any other Madera codecs. It is named CS47L15_* if it is unique to CS47L15 and conflicts with definitions on other codecs. Signed-off-by: Richard Fitzgerald Signed-off-by: Charles Keepax Signed-off-by: Lee Jones --- drivers/mfd/Kconfig | 7 + drivers/mfd/Makefile | 3 + drivers/mfd/cs47l15-tables.c | 1301 ++++++++++++++++++++++++++ drivers/mfd/madera-core.c | 44 + drivers/mfd/madera-i2c.c | 7 + drivers/mfd/madera-spi.c | 7 + drivers/mfd/madera.h | 6 + include/linux/mfd/madera/core.h | 2 + include/linux/mfd/madera/registers.h | 5 + 9 files changed, 1382 insertions(+) create mode 100644 drivers/mfd/cs47l15-tables.c diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig index 760b9e29c8e5..86ae0a11f631 100644 --- a/drivers/mfd/Kconfig +++ b/drivers/mfd/Kconfig @@ -260,6 +260,13 @@ config MFD_MADERA_SPI Support for the Cirrus Logic Madera platform audio SoC core functionality controlled via SPI. +config MFD_CS47L15 + bool "Cirrus Logic CS47L15" + select PINCTRL_CS47L15 + depends on MFD_MADERA + help + Support for Cirrus Logic CS47L15 Smart Codec + config MFD_CS47L35 bool "Cirrus Logic CS47L35" select PINCTRL_CS47L35 diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile index 643d65bcb6ea..cc044f38af84 100644 --- a/drivers/mfd/Makefile +++ b/drivers/mfd/Makefile @@ -75,6 +75,9 @@ obj-$(CONFIG_MFD_WM8994) += wm8994.o obj-$(CONFIG_MFD_WM97xx) += wm97xx-core.o madera-objs := madera-core.o +ifeq ($(CONFIG_MFD_CS47L15),y) +madera-objs += cs47l15-tables.o +endif ifeq ($(CONFIG_MFD_CS47L35),y) madera-objs += cs47l35-tables.o endif diff --git a/drivers/mfd/cs47l15-tables.c b/drivers/mfd/cs47l15-tables.c new file mode 100644 index 000000000000..1b4f6f79eac2 --- /dev/null +++ b/drivers/mfd/cs47l15-tables.c @@ -0,0 +1,1301 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Regmap tables for CS47L15 codec + * + * Copyright (C) 2016-2019 Cirrus Logic, Inc. and + * Cirrus Logic International Semiconductor Ltd. + */ + +#include +#include +#include + +#include +#include + +#include "madera.h" + +static const struct reg_sequence cs47l15_reva_16_patch[] = { + { 0x8C, 0x5555 }, + { 0x8C, 0xAAAA }, + { 0x314, 0x0080 }, + { 0x4A8, 0x6023 }, + { 0x4A9, 0x6023 }, + { 0x4D4, 0x0008 }, + { 0x4CF, 0x0F00 }, + { 0x4D7, 0x1B2B }, + { 0x8C, 0xCCCC }, + { 0x8C, 0x3333 }, +}; + +int cs47l15_patch(struct madera *madera) +{ + int ret; + + ret = regmap_register_patch(madera->regmap, + cs47l15_reva_16_patch, + ARRAY_SIZE(cs47l15_reva_16_patch)); + if (ret < 0) { + dev_err(madera->dev, + "Error in applying 16-bit patch: %d\n", ret); + return ret; + } + + return 0; +} +EXPORT_SYMBOL_GPL(cs47l15_patch); + +static const struct reg_default cs47l15_reg_default[] = { + { 0x00000020, 0x0000 }, /* R32 (0x20) - Tone Generator 1 */ + { 0x00000021, 0x1000 }, /* R33 (0x21) - Tone Generator 2 */ + { 0x00000022, 0x0000 }, /* R34 (0x22) - Tone Generator 3 */ + { 0x00000023, 0x1000 }, /* R35 (0x23) - Tone Generator 4 */ + { 0x00000024, 0x0000 }, /* R36 (0x24) - Tone Generator 5 */ + { 0x00000030, 0x0000 }, /* R48 (0x30) - PWM Drive 1 */ + { 0x00000031, 0x0100 }, /* R49 (0x31) - PWM Drive 2 */ + { 0x00000032, 0x0100 }, /* R50 (0x32) - PWM Drive 3 */ + { 0x00000061, 0x01ff }, /* R97 (0x61) - Sample Rate Sequence Select 1 */ + { 0x00000062, 0x01ff }, /* R98 (0x62) - Sample Rate Sequence Select 2 */ + { 0x00000063, 0x01ff }, /* R99 (0x63) - Sample Rate Sequence Select 3 */ + { 0x00000064, 0x01ff }, /* R100 (0x64) - Sample Rate Sequence Select 4 */ + { 0x00000066, 0x01ff }, /* R102 (0x66) - Always On Triggers Sequence Select 1 */ + { 0x00000067, 0x01ff }, /* R103 (0x67) - Always On Triggers Sequence Select 2 */ + { 0x00000090, 0x0000 }, /* R144 (0x90) - Haptics Control 1 */ + { 0x00000091, 0x7fff }, /* R145 (0x91) - Haptics Control 2 */ + { 0x00000092, 0x0000 }, /* R146 (0x92) - Haptics Phase 1 Intensity */ + { 0x00000093, 0x0000 }, /* R147 (0x93) - Haptics Phase 1 Duration */ + { 0x00000094, 0x0000 }, /* R148 (0x94) - Haptics Phase 2 Intensity */ + { 0x00000095, 0x0000 }, /* R149 (0x95) - Haptics Phase 2 Duration */ + { 0x00000096, 0x0000 }, /* R150 (0x96) - Haptics Phase 3 Intensity */ + { 0x00000097, 0x0000 }, /* R151 (0x97) - Haptics Phase 3 Duration */ + { 0x000000a0, 0x0000 }, /* R160 (0xA0) - Comfort Noise Generator */ + { 0x00000100, 0x0002 }, /* R256 (0x100) - Clock 32K 1 */ + { 0x00000101, 0x0404 }, /* R257 (0x101) - System Clock 1 */ + { 0x00000102, 0x0011 }, /* R258 (0x102) - Sample Rate 1 */ + { 0x00000103, 0x0011 }, /* R259 (0x103) - Sample Rate 2 */ + { 0x00000104, 0x0011 }, /* R260 (0x104) - Sample Rate 3 */ + { 0x00000120, 0x0304 }, /* R288 (0x120) - DSP Clock 1 */ + { 0x00000122, 0x0000 }, /* R290 (0x122) - DSP Clock 2 */ + { 0x00000149, 0x0000 }, /* R329 (0x149) - Output System Clock */ + { 0x00000152, 0x0000 }, /* R338 (0x152) - Rate Estimator 1 */ + { 0x00000153, 0x0000 }, /* R339 (0x153) - Rate Estimator 2 */ + { 0x00000154, 0x0000 }, /* R340 (0x154) - Rate Estimator 3 */ + { 0x00000155, 0x0000 }, /* R341 (0x155) - Rate Estimator 4 */ + { 0x00000156, 0x0000 }, /* R342 (0x156) - Rate Estimator 5 */ + { 0x00000171, 0x0002 }, /* R369 (0x171) - FLL1 Control 1 */ + { 0x00000172, 0x0008 }, /* R370 (0x172) - FLL1 Control 2 */ + { 0x00000173, 0x0018 }, /* R371 (0x173) - FLL1 Control 3 */ + { 0x00000174, 0x007d }, /* R372 (0x174) - FLL1 Control 4 */ + { 0x00000175, 0x0000 }, /* R373 (0x175) - FLL1 Control 5 */ + { 0x00000176, 0x0000 }, /* R374 (0x176) - FLL1 Control 6 */ + { 0x00000177, 0x0281 }, /* R375 (0x177) - FLL1 Loop Filter Test 1 */ + { 0x00000179, 0x0000 }, /* R377 (0x179) - FLL1 Control 7 */ + { 0x0000017a, 0x2906 }, /* R378 (0x17A) - FLL1 EFS 2 */ + { 0x00000181, 0x0000 }, /* R385 (0x181) - FLL1 Synchroniser 1 */ + { 0x00000182, 0x0000 }, /* R386 (0x182) - FLL1 Synchroniser 2 */ + { 0x00000183, 0x0000 }, /* R387 (0x183) - FLL1 Synchroniser 3 */ + { 0x00000184, 0x0000 }, /* R388 (0x184) - FLL1 Synchroniser 4 */ + { 0x00000185, 0x0000 }, /* R389 (0x185) - FLL1 Synchroniser 5 */ + { 0x00000186, 0x0000 }, /* R390 (0x186) - FLL1 Synchroniser 6 */ + { 0x00000187, 0x0001 }, /* R391 (0x187) - FLL1 Synchroniser 7 */ + { 0x00000189, 0x0000 }, /* R393 (0x189) - FLL1 Spread Spectrum */ + { 0x0000018a, 0x0004 }, /* R394 (0x18A) - FLL1 GPIO Clock */ + { 0x000001d1, 0x0004 }, /* R465 (0x1D1) - FLL AO Control 1 */ + { 0x000001d2, 0x0004 }, /* R466 (0x1D2) - FLL AO Control 2 */ + { 0x000001d3, 0x0000 }, /* R467 (0x1D3) - FLL AO Control 3 */ + { 0x000001d4, 0x0000 }, /* R468 (0x1D4) - FLL AO Control 4 */ + { 0x000001d5, 0x0001 }, /* R469 (0x1D5) - FLL AO Control 5 */ + { 0x000001d6, 0x8004 }, /* R470 (0x1D6) - FLL AO Control 6 */ + { 0x000001d8, 0x0000 }, /* R472 (0x1D8) - FLL AO Control 7 */ + { 0x000001da, 0x0077 }, /* R474 (0x1DA) - FLL AO Control 8 */ + { 0x000001db, 0x0000 }, /* R475 (0x1DB) - FLL AO Control 9 */ + { 0x000001dc, 0x06da }, /* R476 (0x1DC) - FLL AO Control 10 */ + { 0x000001dd, 0x0011 }, /* R477 (0x1DD) - FLL AO Control 11 */ + { 0x00000218, 0x00e6 }, /* R536 (0x218) - Mic Bias Ctrl 1 */ + { 0x0000021c, 0x0222 }, /* R540 (0x21C) - Mic Bias Ctrl 5 */ + { 0x00000299, 0x0000 }, /* R665 (0x299) - Headphone Detect 0 */ + { 0x0000029b, 0x0000 }, /* R667 (0x29B) - Headphone Detect 1 */ + { 0x000002a2, 0x0010 }, /* R674 (0x2A2) - Mic Detect 1 Control 0 */ + { 0x000002a3, 0x1102 }, /* R675 (0x2A3) - Mic Detect 1 Control 1 */ + { 0x000002a4, 0x009f }, /* R676 (0x2A4) - Mic Detect 1 Control 2 */ + { 0x000002a6, 0x3d3d }, /* R678 (0x2A6) - Mic Detect 1 Level 1 */ + { 0x000002a7, 0x3d3d }, /* R679 (0x2A7) - Mic Detect 1 Level 2 */ + { 0x000002a8, 0x333d }, /* R680 (0x2A8) - Mic Detect 1 Level 3 */ + { 0x000002a9, 0x202d }, /* R681 (0x2A9) - Mic Detect 1 Level 4 */ + { 0x000002c6, 0x0010 }, /* R710 (0x2C6) - Micd Clamp Control */ + { 0x000002c8, 0x0000 }, /* R712 (0x2C8) - GP Switch 1 */ + { 0x000002d3, 0x0000 }, /* R723 (0x2D3) - Jack Detect Analogue */ + { 0x00000300, 0x0000 }, /* R768 (0x300) - Input Enables */ + { 0x00000308, 0x0000 }, /* R776 (0x308) - Input Rate */ + { 0x00000309, 0x0022 }, /* R777 (0x309) - Input Volume Ramp */ + { 0x0000030c, 0x0002 }, /* R780 (0x30C) - HPF Control */ + { 0x00000310, 0x0080 }, /* R784 (0x310) - IN1L Control */ + { 0x00000311, 0x0180 }, /* R785 (0x311) - ADC Digital Volume 1L */ + { 0x00000312, 0x0500 }, /* R786 (0x312) - DMIC1L Control */ + { 0x00000313, 0x0000 }, /* R787 (0x313) - IN1L Rate Control */ + { 0x00000314, 0x0080 }, /* R788 (0x314) - IN1R Control */ + { 0x00000315, 0x0180 }, /* R789 (0x315) - ADC Digital Volume 1R */ + { 0x00000316, 0x0000 }, /* R790 (0x316) - DMIC1R Control */ + { 0x00000317, 0x0000 }, /* R791 (0x317) - IN1R Rate Control */ + { 0x00000318, 0x0000 }, /* R792 (0x318) - IN2L Control */ + { 0x00000319, 0x0180 }, /* R793 (0x319) - ADC Digital Volume 2L */ + { 0x0000031a, 0x0500 }, /* R794 (0x31A) - DMIC2L Control */ + { 0x0000031b, 0x0000 }, /* R795 (0x31B) - IN2L Rate Control */ + { 0x0000031c, 0x0800 }, /* R796 (0x31C) - IN2R Control */ + { 0x0000031d, 0x0180 }, /* R797 (0x31D) - ADC Digital Volume 2R */ + { 0x0000031e, 0x0000 }, /* R798 (0x31E) - DMIC2R Control */ + { 0x0000031f, 0x0000 }, /* R799 (0x31F) - IN2R Rate Control */ + { 0x000003a8, 0x2000 }, /* R936 (0x3A8) - CS47L15 ADC Int Bias */ + { 0x000003c4, 0x0000 }, /* R964 (0x3C4) - CS47L15 PGA Bias Sel */ + { 0x00000400, 0x0000 }, /* R1024 (0x400) - Output Enables 1 */ + { 0x00000408, 0x0000 }, /* R1032 (0x408) - Output Rate 1 */ + { 0x00000409, 0x0022 }, /* R1033 (0x409) - Output Volume Ramp */ + { 0x00000410, 0x0080 }, /* R1040 (0x410) - Output Path Config 1L */ + { 0x00000411, 0x0180 }, /* R1041 (0x411) - DAC Digital Volume 1L */ + { 0x00000412, 0x0000 }, /* R1042 (0x412) - Output Path Config 1 */ + { 0x00000413, 0x0001 }, /* R1043 (0x413) - Noise Gate Select 1L */ + { 0x00000414, 0x0080 }, /* R1044 (0x414) - Output Path Config 1R */ + { 0x00000415, 0x0180 }, /* R1045 (0x415) - DAC Digital Volume 1R */ + { 0x00000417, 0x0002 }, /* R1047 (0x417) - Noise Gate Select 1R */ + { 0x0000041a, 0x0600 }, /* R1050 (0x41A) - Output Path Config 2 */ + { 0x00000428, 0x0000 }, /* R1064 (0x428) - Output Path Config 4L */ + { 0x00000429, 0x0180 }, /* R1065 (0x429) - DAC Digital Volume 4L */ + { 0x0000042b, 0x0040 }, /* R1067 (0x42B) - Noise Gate Select 4L */ + { 0x00000430, 0x0000 }, /* R1072 (0x430) - Output Path Config 5L */ + { 0x00000431, 0x0180 }, /* R1073 (0x431) - DAC Digital Volume 5L */ + { 0x00000433, 0x0100 }, /* R1075 (0x433) - Noise Gate Select 5L */ + { 0x00000434, 0x0000 }, /* R1076 (0x434) - Output Path Config 5R */ + { 0x00000435, 0x0180 }, /* R1077 (0x435) - DAC Digital Volume 5R */ + { 0x00000437, 0x0200 }, /* R1079 (0x437) - Noise Gate Select 5R */ + { 0x00000450, 0x0000 }, /* R1104 (0x450) - DAC AEC Control 1 */ + { 0x00000451, 0x0000 }, /* R1105 (0x451) - DAC AEC Control 2 */ + { 0x00000458, 0x0000 }, /* R1112 (0x458) - Noise Gate Control */ + { 0x00000490, 0x0069 }, /* R1168 (0x490) - PDM SPK1 Ctrl 1 */ + { 0x00000491, 0x0000 }, /* R1169 (0x491) - PDM SPK1 Ctrl 2 */ + { 0x000004a0, 0x3080 }, /* R1184 (0x4A0) - HP1 Short Circuit Ctrl */ + { 0x000004a8, 0x6023 }, /* R1192 (0x4A8) - HP Test Ctrl 5 */ + { 0x000004a9, 0x6023 }, /* R1193 (0x4A9) - HP Test Ctrl 6 */ + { 0x00000500, 0x000c }, /* R1280 (0x500) - AIF1 BCLK Ctrl */ + { 0x00000501, 0x0000 }, /* R1281 (0x501) - AIF1 Tx Pin Ctrl */ + { 0x00000502, 0x0000 }, /* R1282 (0x502) - AIF1 Rx Pin Ctrl */ + { 0x00000503, 0x0000 }, /* R1283 (0x503) - AIF1 Rate Ctrl */ + { 0x00000504, 0x0000 }, /* R1284 (0x504) - AIF1 Format */ + { 0x00000506, 0x0040 }, /* R1286 (0x506) - AIF1 Rx BCLK Rate */ + { 0x00000507, 0x1818 }, /* R1287 (0x507) - AIF1 Frame Ctrl 1 */ + { 0x00000508, 0x1818 }, /* R1288 (0x508) - AIF1 Frame Ctrl 2 */ + { 0x00000509, 0x0000 }, /* R1289 (0x509) - AIF1 Frame Ctrl 3 */ + { 0x0000050a, 0x0001 }, /* R1290 (0x50A) - AIF1 Frame Ctrl 4 */ + { 0x0000050b, 0x0002 }, /* R1291 (0x50B) - AIF1 Frame Ctrl 5 */ + { 0x0000050c, 0x0003 }, /* R1292 (0x50C) - AIF1 Frame Ctrl 6 */ + { 0x0000050d, 0x0004 }, /* R1293 (0x50D) - AIF1 Frame Ctrl 7 */ + { 0x0000050e, 0x0005 }, /* R1294 (0x50E) - AIF1 Frame Ctrl 8 */ + { 0x00000511, 0x0000 }, /* R1297 (0x511) - AIF1 Frame Ctrl 11 */ + { 0x00000512, 0x0001 }, /* R1298 (0x512) - AIF1 Frame Ctrl 12 */ + { 0x00000513, 0x0002 }, /* R1299 (0x513) - AIF1 Frame Ctrl 13 */ + { 0x00000514, 0x0003 }, /* R1300 (0x514) - AIF1 Frame Ctrl 14 */ + { 0x00000515, 0x0004 }, /* R1301 (0x515) - AIF1 Frame Ctrl 15 */ + { 0x00000516, 0x0005 }, /* R1302 (0x516) - AIF1 Frame Ctrl 16 */ + { 0x00000519, 0x0000 }, /* R1305 (0x519) - AIF1 Tx Enables */ + { 0x0000051a, 0x0000 }, /* R1306 (0x51A) - AIF1 Rx Enables */ + { 0x00000540, 0x000c }, /* R1344 (0x540) - AIF2 BCLK Ctrl */ + { 0x00000541, 0x0000 }, /* R1345 (0x541) - AIF2 Tx Pin Ctrl */ + { 0x00000542, 0x0000 }, /* R1346 (0x542) - AIF2 Rx Pin Ctrl */ + { 0x00000543, 0x0000 }, /* R1347 (0x543) - AIF2 Rate Ctrl */ + { 0x00000544, 0x0000 }, /* R1348 (0x544) - AIF2 Format */ + { 0x00000546, 0x0040 }, /* R1350 (0x546) - AIF2 Rx BCLK Rate */ + { 0x00000547, 0x1818 }, /* R1351 (0x547) - AIF2 Frame Ctrl 1 */ + { 0x00000548, 0x1818 }, /* R1352 (0x548) - AIF2 Frame Ctrl 2 */ + { 0x00000549, 0x0000 }, /* R1353 (0x549) - AIF2 Frame Ctrl 3 */ + { 0x0000054a, 0x0001 }, /* R1354 (0x54A) - AIF2 Frame Ctrl 4 */ + { 0x0000054b, 0x0002 }, /* R1355 (0x54B) - AIF2 Frame Ctrl 5 */ + { 0x0000054c, 0x0003 }, /* R1356 (0x54C) - AIF2 Frame Ctrl 6 */ + { 0x00000551, 0x0000 }, /* R1361 (0x551) - AIF2 Frame Ctrl 11 */ + { 0x00000552, 0x0001 }, /* R1362 (0x552) - AIF2 Frame Ctrl 12 */ + { 0x00000553, 0x0002 }, /* R1363 (0x553) - AIF2 Frame Ctrl 13 */ + { 0x00000554, 0x0003 }, /* R1364 (0x554) - AIF2 Frame Ctrl 14 */ + { 0x00000559, 0x0000 }, /* R1369 (0x559) - AIF2 Tx Enables */ + { 0x0000055a, 0x0000 }, /* R1370 (0x55A) - AIF2 Rx Enables */ + { 0x00000580, 0x000c }, /* R1408 (0x580) - AIF3 BCLK Ctrl */ + { 0x00000581, 0x0000 }, /* R1409 (0x581) - AIF3 Tx Pin Ctrl */ + { 0x00000582, 0x0000 }, /* R1410 (0x582) - AIF3 Rx Pin Ctrl */ + { 0x00000583, 0x0000 }, /* R1411 (0x583) - AIF3 Rate Ctrl */ + { 0x00000584, 0x0000 }, /* R1412 (0x584) - AIF3 Format */ + { 0x00000586, 0x0040 }, /* R1414 (0x586) - AIF3 Rx BCLK Rate */ + { 0x00000587, 0x1818 }, /* R1415 (0x587) - AIF3 Frame Ctrl 1 */ + { 0x00000588, 0x1818 }, /* R1416 (0x588) - AIF3 Frame Ctrl 2 */ + { 0x00000589, 0x0000 }, /* R1417 (0x589) - AIF3 Frame Ctrl 3 */ + { 0x0000058a, 0x0001 }, /* R1418 (0x58A) - AIF3 Frame Ctrl 4 */ + { 0x00000591, 0x0000 }, /* R1425 (0x591) - AIF3 Frame Ctrl 11 */ + { 0x00000592, 0x0001 }, /* R1426 (0x592) - AIF3 Frame Ctrl 12 */ + { 0x00000599, 0x0000 }, /* R1433 (0x599) - AIF3 Tx Enables */ + { 0x0000059a, 0x0000 }, /* R1434 (0x59A) - AIF3 Rx Enables */ + { 0x000005c2, 0x0000 }, /* R1474 (0x5C2) - SPD1 Tx Control */ + { 0x00000640, 0x0000 }, /* R1600 (0x640) - PWM1MIX Input 1 Source */ + { 0x00000641, 0x0080 }, /* R1601 (0x641) - PWM1MIX Input 1 Volume */ + { 0x00000642, 0x0000 }, /* R1602 (0x642) - PWM1MIX Input 2 Source */ + { 0x00000643, 0x0080 }, /* R1603 (0x643) - PWM1MIX Input 2 Volume */ + { 0x00000644, 0x0000 }, /* R1604 (0x644) - PWM1MIX Input 3 Source */ + { 0x00000645, 0x0080 }, /* R1605 (0x645) - PWM1MIX Input 3 Volume */ + { 0x00000646, 0x0000 }, /* R1606 (0x646) - PWM1MIX Input 4 Source */ + { 0x00000647, 0x0080 }, /* R1607 (0x647) - PWM1MIX Input 4 Volume */ + { 0x00000648, 0x0000 }, /* R1608 (0x648) - PWM2MIX Input 1 Source */ + { 0x00000649, 0x0080 }, /* R1609 (0x649) - PWM2MIX Input 1 Volume */ + { 0x0000064a, 0x0000 }, /* R1610 (0x64A) - PWM2MIX Input 2 Source */ + { 0x0000064b, 0x0080 }, /* R1611 (0x64B) - PWM2MIX Input 2 Volume */ + { 0x0000064c, 0x0000 }, /* R1612 (0x64C) - PWM2MIX Input 3 Source */ + { 0x0000064d, 0x0080 }, /* R1613 (0x64D) - PWM2MIX Input 3 Volume */ + { 0x0000064e, 0x0000 }, /* R1614 (0x64E) - PWM2MIX Input 4 Source */ + { 0x0000064f, 0x0080 }, /* R1615 (0x64F) - PWM2MIX Input 4 Volume */ + { 0x00000680, 0x0000 }, /* R1664 (0x680) - OUT1LMIX Input 1 Source */ + { 0x00000681, 0x0080 }, /* R1665 (0x681) - OUT1LMIX Input 1 Volume */ + { 0x00000682, 0x0000 }, /* R1666 (0x682) - OUT1LMIX Input 2 Source */ + { 0x00000683, 0x0080 }, /* R1667 (0x683) - OUT1LMIX Input 2 Volume */ + { 0x00000684, 0x0000 }, /* R1668 (0x684) - OUT1LMIX Input 3 Source */ + { 0x00000685, 0x0080 }, /* R1669 (0x685) - OUT1LMIX Input 3 Volume */ + { 0x00000686, 0x0000 }, /* R1670 (0x686) - OUT1LMIX Input 4 Source */ + { 0x00000687, 0x0080 }, /* R1671 (0x687) - OUT1LMIX Input 4 Volume */ + { 0x00000688, 0x0000 }, /* R1672 (0x688) - OUT1RMIX Input 1 Source */ + { 0x00000689, 0x0080 }, /* R1673 (0x689) - OUT1RMIX Input 1 Volume */ + { 0x0000068a, 0x0000 }, /* R1674 (0x68A) - OUT1RMIX Input 2 Source */ + { 0x0000068b, 0x0080 }, /* R1675 (0x68B) - OUT1RMIX Input 2 Volume */ + { 0x0000068c, 0x0000 }, /* R1676 (0x68C) - OUT1RMIX Input 3 Source */ + { 0x0000068d, 0x0080 }, /* R1677 (0x68D) - OUT1RMIX Input 3 Volume */ + { 0x0000068e, 0x0000 }, /* R1678 (0x68E) - OUT1RMIX Input 4 Source */ + { 0x0000068f, 0x0080 }, /* R1679 (0x68F) - OUT1RMIX Input 4 Volume */ + { 0x000006b0, 0x0000 }, /* R1712 (0x6B0) - OUT4LMIX Input 1 Source */ + { 0x000006b1, 0x0080 }, /* R1713 (0x6B1) - OUT4LMIX Input 1 Volume */ + { 0x000006b2, 0x0000 }, /* R1714 (0x6B2) - OUT4LMIX Input 2 Source */ + { 0x000006b3, 0x0080 }, /* R1715 (0x6B3) - OUT4LMIX Input 2 Volume */ + { 0x000006b4, 0x0000 }, /* R1716 (0x6B4) - OUT4LMIX Input 3 Source */ + { 0x000006b5, 0x0080 }, /* R1717 (0x6B5) - OUT4LMIX Input 3 Volume */ + { 0x000006b6, 0x0000 }, /* R1718 (0x6B6) - OUT4LMIX Input 4 Source */ + { 0x000006b7, 0x0080 }, /* R1719 (0x6B7) - OUT4LMIX Input 4 Volume */ + { 0x000006c0, 0x0000 }, /* R1728 (0x6C0) - OUT5LMIX Input 1 Source */ + { 0x000006c1, 0x0080 }, /* R1729 (0x6C1) - OUT5LMIX Input 1 Volume */ + { 0x000006c2, 0x0000 }, /* R1730 (0x6C2) - OUT5LMIX Input 2 Source */ + { 0x000006c3, 0x0080 }, /* R1731 (0x6C3) - OUT5LMIX Input 2 Volume */ + { 0x000006c4, 0x0000 }, /* R1732 (0x6C4) - OUT5LMIX Input 3 Source */ + { 0x000006c5, 0x0080 }, /* R1733 (0x6C5) - OUT5LMIX Input 3 Volume */ + { 0x000006c6, 0x0000 }, /* R1734 (0x6C6) - OUT5LMIX Input 4 Source */ + { 0x000006c7, 0x0080 }, /* R1735 (0x6C7) - OUT5LMIX Input 4 Volume */ + { 0x000006c8, 0x0000 }, /* R1736 (0x6C8) - OUT5RMIX Input 1 Source */ + { 0x000006c9, 0x0080 }, /* R1737 (0x6C9) - OUT5RMIX Input 1 Volume */ + { 0x000006ca, 0x0000 }, /* R1738 (0x6CA) - OUT5RMIX Input 2 Source */ + { 0x000006cb, 0x0080 }, /* R1739 (0x6CB) - OUT5RMIX Input 2 Volume */ + { 0x000006cc, 0x0000 }, /* R1740 (0x6CC) - OUT5RMIX Input 3 Source */ + { 0x000006cd, 0x0080 }, /* R1741 (0x6CD) - OUT5RMIX Input 3 Volume */ + { 0x000006ce, 0x0000 }, /* R1742 (0x6CE) - OUT5RMIX Input 4 Source */ + { 0x000006cf, 0x0080 }, /* R1743 (0x6CF) - OUT5RMIX Input 4 Volume */ + { 0x00000700, 0x0000 }, /* R1792 (0x700) - AIF1TX1MIX Input 1 Source */ + { 0x00000701, 0x0080 }, /* R1793 (0x701) - AIF1TX1MIX Input 1 Volume */ + { 0x00000702, 0x0000 }, /* R1794 (0x702) - AIF1TX1MIX Input 2 Source */ + { 0x00000703, 0x0080 }, /* R1795 (0x703) - AIF1TX1MIX Input 2 Volume */ + { 0x00000704, 0x0000 }, /* R1796 (0x704) - AIF1TX1MIX Input 3 Source */ + { 0x00000705, 0x0080 }, /* R1797 (0x705) - AIF1TX1MIX Input 3 Volume */ + { 0x00000706, 0x0000 }, /* R1798 (0x706) - AIF1TX1MIX Input 4 Source */ + { 0x00000707, 0x0080 }, /* R1799 (0x707) - AIF1TX1MIX Input 4 Volume */ + { 0x00000708, 0x0000 }, /* R1800 (0x708) - AIF1TX2MIX Input 1 Source */ + { 0x00000709, 0x0080 }, /* R1801 (0x709) - AIF1TX2MIX Input 1 Volume */ + { 0x0000070a, 0x0000 }, /* R1802 (0x70A) - AIF1TX2MIX Input 2 Source */ + { 0x0000070b, 0x0080 }, /* R1803 (0x70B) - AIF1TX2MIX Input 2 Volume */ + { 0x0000070c, 0x0000 }, /* R1804 (0x70C) - AIF1TX2MIX Input 3 Source */ + { 0x0000070d, 0x0080 }, /* R1805 (0x70D) - AIF1TX2MIX Input 3 Volume */ + { 0x0000070e, 0x0000 }, /* R1806 (0x70E) - AIF1TX2MIX Input 4 Source */ + { 0x0000070f, 0x0080 }, /* R1807 (0x70F) - AIF1TX2MIX Input 4 Volume */ + { 0x00000710, 0x0000 }, /* R1808 (0x710) - AIF1TX3MIX Input 1 Source */ + { 0x00000711, 0x0080 }, /* R1809 (0x711) - AIF1TX3MIX Input 1 Volume */ + { 0x00000712, 0x0000 }, /* R1810 (0x712) - AIF1TX3MIX Input 2 Source */ + { 0x00000713, 0x0080 }, /* R1811 (0x713) - AIF1TX3MIX Input 2 Volume */ + { 0x00000714, 0x0000 }, /* R1812 (0x714) - AIF1TX3MIX Input 3 Source */ + { 0x00000715, 0x0080 }, /* R1813 (0x715) - AIF1TX3MIX Input 3 Volume */ + { 0x00000716, 0x0000 }, /* R1814 (0x716) - AIF1TX3MIX Input 4 Source */ + { 0x00000717, 0x0080 }, /* R1815 (0x717) - AIF1TX3MIX Input 4 Volume */ + { 0x00000718, 0x0000 }, /* R1816 (0x718) - AIF1TX4MIX Input 1 Source */ + { 0x00000719, 0x0080 }, /* R1817 (0x719) - AIF1TX4MIX Input 1 Volume */ + { 0x0000071a, 0x0000 }, /* R1818 (0x71A) - AIF1TX4MIX Input 2 Source */ + { 0x0000071b, 0x0080 }, /* R1819 (0x71B) - AIF1TX4MIX Input 2 Volume */ + { 0x0000071c, 0x0000 }, /* R1820 (0x71C) - AIF1TX4MIX Input 3 Source */ + { 0x0000071d, 0x0080 }, /* R1821 (0x71D) - AIF1TX4MIX Input 3 Volume */ + { 0x0000071e, 0x0000 }, /* R1822 (0x71E) - AIF1TX4MIX Input 4 Source */ + { 0x0000071f, 0x0080 }, /* R1823 (0x71F) - AIF1TX4MIX Input 4 Volume */ + { 0x00000720, 0x0000 }, /* R1824 (0x720) - AIF1TX5MIX Input 1 Source */ + { 0x00000721, 0x0080 }, /* R1825 (0x721) - AIF1TX5MIX Input 1 Volume */ + { 0x00000722, 0x0000 }, /* R1826 (0x722) - AIF1TX5MIX Input 2 Source */ + { 0x00000723, 0x0080 }, /* R1827 (0x723) - AIF1TX5MIX Input 2 Volume */ + { 0x00000724, 0x0000 }, /* R1828 (0x724) - AIF1TX5MIX Input 3 Source */ + { 0x00000725, 0x0080 }, /* R1829 (0x725) - AIF1TX5MIX Input 3 Volume */ + { 0x00000726, 0x0000 }, /* R1830 (0x726) - AIF1TX5MIX Input 4 Source */ + { 0x00000727, 0x0080 }, /* R1831 (0x727) - AIF1TX5MIX Input 4 Volume */ + { 0x00000728, 0x0000 }, /* R1832 (0x728) - AIF1TX6MIX Input 1 Source */ + { 0x00000729, 0x0080 }, /* R1833 (0x729) - AIF1TX6MIX Input 1 Volume */ + { 0x0000072a, 0x0000 }, /* R1834 (0x72A) - AIF1TX6MIX Input 2 Source */ + { 0x0000072b, 0x0080 }, /* R1835 (0x72B) - AIF1TX6MIX Input 2 Volume */ + { 0x0000072c, 0x0000 }, /* R1836 (0x72C) - AIF1TX6MIX Input 3 Source */ + { 0x0000072d, 0x0080 }, /* R1837 (0x72D) - AIF1TX6MIX Input 3 Volume */ + { 0x0000072e, 0x0000 }, /* R1838 (0x72E) - AIF1TX6MIX Input 4 Source */ + { 0x0000072f, 0x0080 }, /* R1839 (0x72F) - AIF1TX6MIX Input 4 Volume */ + { 0x00000740, 0x0000 }, /* R1856 (0x740) - AIF2TX1MIX Input 1 Source */ + { 0x00000741, 0x0080 }, /* R1857 (0x741) - AIF2TX1MIX Input 1 Volume */ + { 0x00000742, 0x0000 }, /* R1858 (0x742) - AIF2TX1MIX Input 2 Source */ + { 0x00000743, 0x0080 }, /* R1859 (0x743) - AIF2TX1MIX Input 2 Volume */ + { 0x00000744, 0x0000 }, /* R1860 (0x744) - AIF2TX1MIX Input 3 Source */ + { 0x00000745, 0x0080 }, /* R1861 (0x745) - AIF2TX1MIX Input 3 Volume */ + { 0x00000746, 0x0000 }, /* R1862 (0x746) - AIF2TX1MIX Input 4 Source */ + { 0x00000747, 0x0080 }, /* R1863 (0x747) - AIF2TX1MIX Input 4 Volume */ + { 0x00000748, 0x0000 }, /* R1864 (0x748) - AIF2TX2MIX Input 1 Source */ + { 0x00000749, 0x0080 }, /* R1865 (0x749) - AIF2TX2MIX Input 1 Volume */ + { 0x0000074a, 0x0000 }, /* R1866 (0x74A) - AIF2TX2MIX Input 2 Source */ + { 0x0000074b, 0x0080 }, /* R1867 (0x74B) - AIF2TX2MIX Input 2 Volume */ + { 0x0000074c, 0x0000 }, /* R1868 (0x74C) - AIF2TX2MIX Input 3 Source */ + { 0x0000074d, 0x0080 }, /* R1869 (0x74D) - AIF2TX2MIX Input 3 Volume */ + { 0x0000074e, 0x0000 }, /* R1870 (0x74E) - AIF2TX2MIX Input 4 Source */ + { 0x0000074f, 0x0080 }, /* R1871 (0x74F) - AIF2TX2MIX Input 4 Volume */ + { 0x00000750, 0x0000 }, /* R1872 (0x750) - AIF2TX3MIX Input 1 Source */ + { 0x00000751, 0x0080 }, /* R1873 (0x751) - AIF2TX3MIX Input 1 Volume */ + { 0x00000752, 0x0000 }, /* R1874 (0x752) - AIF2TX3MIX Input 2 Source */ + { 0x00000753, 0x0080 }, /* R1875 (0x753) - AIF2TX3MIX Input 2 Volume */ + { 0x00000754, 0x0000 }, /* R1876 (0x754) - AIF2TX3MIX Input 3 Source */ + { 0x00000755, 0x0080 }, /* R1877 (0x755) - AIF2TX3MIX Input 3 Volume */ + { 0x00000756, 0x0000 }, /* R1878 (0x756) - AIF2TX3MIX Input 4 Source */ + { 0x00000757, 0x0080 }, /* R1879 (0x757) - AIF2TX3MIX Input 4 Volume */ + { 0x00000758, 0x0000 }, /* R1880 (0x758) - AIF2TX4MIX Input 1 Source */ + { 0x00000759, 0x0080 }, /* R1881 (0x759) - AIF2TX4MIX Input 1 Volume */ + { 0x0000075a, 0x0000 }, /* R1882 (0x75A) - AIF2TX4MIX Input 2 Source */ + { 0x0000075b, 0x0080 }, /* R1883 (0x75B) - AIF2TX4MIX Input 2 Volume */ + { 0x0000075c, 0x0000 }, /* R1884 (0x75C) - AIF2TX4MIX Input 3 Source */ + { 0x0000075d, 0x0080 }, /* R1885 (0x75D) - AIF2TX4MIX Input 3 Volume */ + { 0x0000075e, 0x0000 }, /* R1886 (0x75E) - AIF2TX4MIX Input 4 Source */ + { 0x0000075f, 0x0080 }, /* R1887 (0x75F) - AIF2TX4MIX Input 4 Volume */ + { 0x00000780, 0x0000 }, /* R1920 (0x780) - AIF3TX1MIX Input 1 Source */ + { 0x00000781, 0x0080 }, /* R1921 (0x781) - AIF3TX1MIX Input 1 Volume */ + { 0x00000782, 0x0000 }, /* R1922 (0x782) - AIF3TX1MIX Input 2 Source */ + { 0x00000783, 0x0080 }, /* R1923 (0x783) - AIF3TX1MIX Input 2 Volume */ + { 0x00000784, 0x0000 }, /* R1924 (0x784) - AIF3TX1MIX Input 3 Source */ + { 0x00000785, 0x0080 }, /* R1925 (0x785) - AIF3TX1MIX Input 3 Volume */ + { 0x00000786, 0x0000 }, /* R1926 (0x786) - AIF3TX1MIX Input 4 Source */ + { 0x00000787, 0x0080 }, /* R1927 (0x787) - AIF3TX1MIX Input 4 Volume */ + { 0x00000788, 0x0000 }, /* R1928 (0x788) - AIF3TX2MIX Input 1 Source */ + { 0x00000789, 0x0080 }, /* R1929 (0x789) - AIF3TX2MIX Input 1 Volume */ + { 0x0000078a, 0x0000 }, /* R1930 (0x78A) - AIF3TX2MIX Input 2 Source */ + { 0x0000078b, 0x0080 }, /* R1931 (0x78B) - AIF3TX2MIX Input 2 Volume */ + { 0x0000078c, 0x0000 }, /* R1932 (0x78C) - AIF3TX2MIX Input 3 Source */ + { 0x0000078d, 0x0080 }, /* R1933 (0x78D) - AIF3TX2MIX Input 3 Volume */ + { 0x0000078e, 0x0000 }, /* R1934 (0x78E) - AIF3TX2MIX Input 4 Source */ + { 0x0000078f, 0x0080 }, /* R1935 (0x78F) - AIF3TX2MIX Input 4 Volume */ + { 0x00000800, 0x0000 }, /* R2048 (0x800) - SPDIF1TX1MIX Input 1 Source */ + { 0x00000801, 0x0080 }, /* R2049 (0x801) - SPDIF1TX1MIX Input 1 Volume */ + { 0x00000808, 0x0000 }, /* R2056 (0x808) - SPDIF1TX2MIX Input 1 Source */ + { 0x00000809, 0x0080 }, /* R2057 (0x809) - SPDIF1TX2MIX Input 1 Volume */ + { 0x00000880, 0x0000 }, /* R2176 (0x880) - EQ1MIX Input 1 Source */ + { 0x00000881, 0x0080 }, /* R2177 (0x881) - EQ1MIX Input 1 Volume */ + { 0x00000882, 0x0000 }, /* R2178 (0x882) - EQ1MIX Input 2 Source */ + { 0x00000883, 0x0080 }, /* R2179 (0x883) - EQ1MIX Input 2 Volume */ + { 0x00000884, 0x0000 }, /* R2180 (0x884) - EQ1MIX Input 3 Source */ + { 0x00000885, 0x0080 }, /* R2181 (0x885) - EQ1MIX Input 3 Volume */ + { 0x00000886, 0x0000 }, /* R2182 (0x886) - EQ1MIX Input 4 Source */ + { 0x00000887, 0x0080 }, /* R2183 (0x887) - EQ1MIX Input 4 Volume */ + { 0x00000888, 0x0000 }, /* R2184 (0x888) - EQ2MIX Input 1 Source */ + { 0x00000889, 0x0080 }, /* R2185 (0x889) - EQ2MIX Input 1 Volume */ + { 0x0000088a, 0x0000 }, /* R2186 (0x88A) - EQ2MIX Input 2 Source */ + { 0x0000088b, 0x0080 }, /* R2187 (0x88B) - EQ2MIX Input 2 Volume */ + { 0x0000088c, 0x0000 }, /* R2188 (0x88C) - EQ2MIX Input 3 Source */ + { 0x0000088d, 0x0080 }, /* R2189 (0x88D) - EQ2MIX Input 3 Volume */ + { 0x0000088e, 0x0000 }, /* R2190 (0x88E) - EQ2MIX Input 4 Source */ + { 0x0000088f, 0x0080 }, /* R2191 (0x88F) - EQ2MIX Input 4 Volume */ + { 0x00000890, 0x0000 }, /* R2192 (0x890) - EQ3MIX Input 1 Source */ + { 0x00000891, 0x0080 }, /* R2193 (0x891) - EQ3MIX Input 1 Volume */ + { 0x00000892, 0x0000 }, /* R2194 (0x892) - EQ3MIX Input 2 Source */ + { 0x00000893, 0x0080 }, /* R2195 (0x893) - EQ3MIX Input 2 Volume */ + { 0x00000894, 0x0000 }, /* R2196 (0x894) - EQ3MIX Input 3 Source */ + { 0x00000895, 0x0080 }, /* R2197 (0x895) - EQ3MIX Input 3 Volume */ + { 0x00000896, 0x0000 }, /* R2198 (0x896) - EQ3MIX Input 4 Source */ + { 0x00000897, 0x0080 }, /* R2199 (0x897) - EQ3MIX Input 4 Volume */ + { 0x00000898, 0x0000 }, /* R2200 (0x898) - EQ4MIX Input 1 Source */ + { 0x00000899, 0x0080 }, /* R2201 (0x899) - EQ4MIX Input 1 Volume */ + { 0x0000089a, 0x0000 }, /* R2202 (0x89A) - EQ4MIX Input 2 Source */ + { 0x0000089b, 0x0080 }, /* R2203 (0x89B) - EQ4MIX Input 2 Volume */ + { 0x0000089c, 0x0000 }, /* R2204 (0x89C) - EQ4MIX Input 3 Source */ + { 0x0000089d, 0x0080 }, /* R2205 (0x89D) - EQ4MIX Input 3 Volume */ + { 0x0000089e, 0x0000 }, /* R2206 (0x89E) - EQ4MIX Input 4 Source */ + { 0x0000089f, 0x0080 }, /* R2207 (0x89F) - EQ4MIX Input 4 Volume */ + { 0x000008c0, 0x0000 }, /* R2240 (0x8C0) - DRC1LMIX Input 1 Source */ + { 0x000008c1, 0x0080 }, /* R2241 (0x8C1) - DRC1LMIX Input 1 Volume */ + { 0x000008c2, 0x0000 }, /* R2242 (0x8C2) - DRC1LMIX Input 2 Source */ + { 0x000008c3, 0x0080 }, /* R2243 (0x8C3) - DRC1LMIX Input 2 Volume */ + { 0x000008c4, 0x0000 }, /* R2244 (0x8C4) - DRC1LMIX Input 3 Source */ + { 0x000008c5, 0x0080 }, /* R2245 (0x8C5) - DRC1LMIX Input 3 Volume */ + { 0x000008c6, 0x0000 }, /* R2246 (0x8C6) - DRC1LMIX Input 4 Source */ + { 0x000008c7, 0x0080 }, /* R2247 (0x8C7) - DRC1LMIX Input 4 Volume */ + { 0x000008c8, 0x0000 }, /* R2248 (0x8C8) - DRC1RMIX Input 1 Source */ + { 0x000008c9, 0x0080 }, /* R2249 (0x8C9) - DRC1RMIX Input 1 Volume */ + { 0x000008ca, 0x0000 }, /* R2250 (0x8CA) - DRC1RMIX Input 2 Source */ + { 0x000008cb, 0x0080 }, /* R2251 (0x8CB) - DRC1RMIX Input 2 Volume */ + { 0x000008cc, 0x0000 }, /* R2252 (0x8CC) - DRC1RMIX Input 3 Source */ + { 0x000008cd, 0x0080 }, /* R2253 (0x8CD) - DRC1RMIX Input 3 Volume */ + { 0x000008ce, 0x0000 }, /* R2254 (0x8CE) - DRC1RMIX Input 4 Source */ + { 0x000008cf, 0x0080 }, /* R2255 (0x8CF) - DRC1RMIX Input 4 Volume */ + { 0x000008d0, 0x0000 }, /* R2256 (0x8D0) - DRC2LMIX Input 1 Source */ + { 0x000008d1, 0x0080 }, /* R2257 (0x8D1) - DRC2LMIX Input 1 Volume */ + { 0x000008d2, 0x0000 }, /* R2258 (0x8D2) - DRC2LMIX Input 2 Source */ + { 0x000008d3, 0x0080 }, /* R2259 (0x8D3) - DRC2LMIX Input 2 Volume */ + { 0x000008d4, 0x0000 }, /* R2260 (0x8D4) - DRC2LMIX Input 3 Source */ + { 0x000008d5, 0x0080 }, /* R2261 (0x8D5) - DRC2LMIX Input 3 Volume */ + { 0x000008d6, 0x0000 }, /* R2262 (0x8D6) - DRC2LMIX Input 4 Source */ + { 0x000008d7, 0x0080 }, /* R2263 (0x8D7) - DRC2LMIX Input 4 Volume */ + { 0x000008d8, 0x0000 }, /* R2264 (0x8D8) - DRC2RMIX Input 1 Source */ + { 0x000008d9, 0x0080 }, /* R2265 (0x8D9) - DRC2RMIX Input 1 Volume */ + { 0x000008da, 0x0000 }, /* R2266 (0x8DA) - DRC2RMIX Input 2 Source */ + { 0x000008db, 0x0080 }, /* R2267 (0x8DB) - DRC2RMIX Input 2 Volume */ + { 0x000008dc, 0x0000 }, /* R2268 (0x8DC) - DRC2RMIX Input 3 Source */ + { 0x000008dd, 0x0080 }, /* R2269 (0x8DD) - DRC2RMIX Input 3 Volume */ + { 0x000008de, 0x0000 }, /* R2270 (0x8DE) - DRC2RMIX Input 4 Source */ + { 0x000008df, 0x0080 }, /* R2271 (0x8DF) - DRC2RMIX Input 4 Volume */ + { 0x00000900, 0x0000 }, /* R2304 (0x900) - HPLP1MIX Input 1 Source */ + { 0x00000901, 0x0080 }, /* R2305 (0x901) - HPLP1MIX Input 1 Volume */ + { 0x00000902, 0x0000 }, /* R2306 (0x902) - HPLP1MIX Input 2 Source */ + { 0x00000903, 0x0080 }, /* R2307 (0x903) - HPLP1MIX Input 2 Volume */ + { 0x00000904, 0x0000 }, /* R2308 (0x904) - HPLP1MIX Input 3 Source */ + { 0x00000905, 0x0080 }, /* R2309 (0x905) - HPLP1MIX Input 3 Volume */ + { 0x00000906, 0x0000 }, /* R2310 (0x906) - HPLP1MIX Input 4 Source */ + { 0x00000907, 0x0080 }, /* R2311 (0x907) - HPLP1MIX Input 4 Volume */ + { 0x00000908, 0x0000 }, /* R2312 (0x908) - HPLP2MIX Input 1 Source */ + { 0x00000909, 0x0080 }, /* R2313 (0x909) - HPLP2MIX Input 1 Volume */ + { 0x0000090a, 0x0000 }, /* R2314 (0x90A) - HPLP2MIX Input 2 Source */ + { 0x0000090b, 0x0080 }, /* R2315 (0x90B) - HPLP2MIX Input 2 Volume */ + { 0x0000090c, 0x0000 }, /* R2316 (0x90C) - HPLP2MIX Input 3 Source */ + { 0x0000090d, 0x0080 }, /* R2317 (0x90D) - HPLP2MIX Input 3 Volume */ + { 0x0000090e, 0x0000 }, /* R2318 (0x90E) - HPLP2MIX Input 4 Source */ + { 0x0000090f, 0x0080 }, /* R2319 (0x90F) - HPLP2MIX Input 4 Volume */ + { 0x00000910, 0x0000 }, /* R2320 (0x910) - HPLP3MIX Input 1 Source */ + { 0x00000911, 0x0080 }, /* R2321 (0x911) - HPLP3MIX Input 1 Volume */ + { 0x00000912, 0x0000 }, /* R2322 (0x912) - HPLP3MIX Input 2 Source */ + { 0x00000913, 0x0080 }, /* R2323 (0x913) - HPLP3MIX Input 2 Volume */ + { 0x00000914, 0x0000 }, /* R2324 (0x914) - HPLP3MIX Input 3 Source */ + { 0x00000915, 0x0080 }, /* R2325 (0x915) - HPLP3MIX Input 3 Volume */ + { 0x00000916, 0x0000 }, /* R2326 (0x916) - HPLP3MIX Input 4 Source */ + { 0x00000917, 0x0080 }, /* R2327 (0x917) - HPLP3MIX Input 4 Volume */ + { 0x00000918, 0x0000 }, /* R2328 (0x918) - HPLP4MIX Input 1 Source */ + { 0x00000919, 0x0080 }, /* R2329 (0x919) - HPLP4MIX Input 1 Volume */ + { 0x0000091a, 0x0000 }, /* R2330 (0x91A) - HPLP4MIX Input 2 Source */ + { 0x0000091b, 0x0080 }, /* R2331 (0x91B) - HPLP4MIX Input 2 Volume */ + { 0x0000091c, 0x0000 }, /* R2332 (0x91C) - HPLP4MIX Input 3 Source */ + { 0x0000091d, 0x0080 }, /* R2333 (0x91D) - HPLP4MIX Input 3 Volume */ + { 0x0000091e, 0x0000 }, /* R2334 (0x91E) - HPLP4MIX Input 4 Source */ + { 0x0000091f, 0x0080 }, /* R2335 (0x91F) - HPLP4MIX Input 4 Volume */ + { 0x00000940, 0x0000 }, /* R2368 (0x940) - DSP1LMIX Input 1 Source */ + { 0x00000941, 0x0080 }, /* R2369 (0x941) - DSP1LMIX Input 1 Volume */ + { 0x00000942, 0x0000 }, /* R2370 (0x942) - DSP1LMIX Input 2 Source */ + { 0x00000943, 0x0080 }, /* R2371 (0x943) - DSP1LMIX Input 2 Volume */ + { 0x00000944, 0x0000 }, /* R2372 (0x944) - DSP1LMIX Input 3 Source */ + { 0x00000945, 0x0080 }, /* R2373 (0x945) - DSP1LMIX Input 3 Volume */ + { 0x00000946, 0x0000 }, /* R2374 (0x946) - DSP1LMIX Input 4 Source */ + { 0x00000947, 0x0080 }, /* R2375 (0x947) - DSP1LMIX Input 4 Volume */ + { 0x00000948, 0x0000 }, /* R2376 (0x948) - DSP1RMIX Input 1 Source */ + { 0x00000949, 0x0080 }, /* R2377 (0x949) - DSP1RMIX Input 1 Volume */ + { 0x0000094a, 0x0000 }, /* R2378 (0x94A) - DSP1RMIX Input 2 Source */ + { 0x0000094b, 0x0080 }, /* R2379 (0x94B) - DSP1RMIX Input 2 Volume */ + { 0x0000094c, 0x0000 }, /* R2380 (0x94C) - DSP1RMIX Input 3 Source */ + { 0x0000094d, 0x0080 }, /* R2381 (0x94D) - DSP1RMIX Input 3 Volume */ + { 0x0000094e, 0x0000 }, /* R2382 (0x94E) - DSP1RMIX Input 4 Source */ + { 0x0000094f, 0x0080 }, /* R2383 (0x94F) - DSP1RMIX Input 4 Volume */ + { 0x00000950, 0x0000 }, /* R2384 (0x950) - DSP1AUX1MIX Input 1 Source */ + { 0x00000958, 0x0000 }, /* R2392 (0x958) - DSP1AUX2MIX Input 1 Source */ + { 0x00000960, 0x0000 }, /* R2400 (0x960) - DSP1AUX3MIX Input 1 Source */ + { 0x00000968, 0x0000 }, /* R2408 (0x968) - DSP1AUX4MIX Input 1 Source */ + { 0x00000970, 0x0000 }, /* R2416 (0x970) - DSP1AUX5MIX Input 1 Source */ + { 0x00000978, 0x0000 }, /* R2424 (0x978) - DSP1AUX6MIX Input 1 Source */ + { 0x00000b00, 0x0000 }, /* R2816 (0xB00) - ISRC1DEC1MIX Input 1 Source */ + { 0x00000b08, 0x0000 }, /* R2824 (0xB08) - ISRC1DEC2MIX Input 1 Source */ + { 0x00000b10, 0x0000 }, /* R2832 (0xB10) - ISRC1DEC3MIX Input 1 Source */ + { 0x00000b18, 0x0000 }, /* R2840 (0xB18) - ISRC1DEC4MIX Input 1 Source */ + { 0x00000b20, 0x0000 }, /* R2848 (0xB20) - ISRC1INT1MIX Input 1 Source */ + { 0x00000b28, 0x0000 }, /* R2856 (0xB28) - ISRC1INT2MIX Input 1 Source */ + { 0x00000b30, 0x0000 }, /* R2864 (0xB30) - ISRC1INT3MIX Input 1 Source */ + { 0x00000b38, 0x0000 }, /* R2872 (0xB38) - ISRC1INT4MIX Input 1 Source */ + { 0x00000b40, 0x0000 }, /* R2880 (0xB40) - ISRC2DEC1MIX Input 1 Source */ + { 0x00000b48, 0x0000 }, /* R2888 (0xB48) - ISRC2DEC2MIX Input 1 Source */ + { 0x00000b50, 0x0000 }, /* R2896 (0xB50) - ISRC2DEC3MIX Input 1 Source */ + { 0x00000b58, 0x0000 }, /* R2904 (0xB58) - ISRC2DEC4MIX Input 1 Source */ + { 0x00000b60, 0x0000 }, /* R2912 (0xB60) - ISRC2INT1MIX Input 1 Source */ + { 0x00000b68, 0x0000 }, /* R2920 (0xB68) - ISRC2INT2MIX Input 1 Source */ + { 0x00000b70, 0x0000 }, /* R2928 (0xB70) - ISRC2INT3MIX Input 1 Source */ + { 0x00000b78, 0x0000 }, /* R2936 (0xB78) - ISRC2INT4MIX Input 1 Source */ + { 0x00000e00, 0x0000 }, /* R3584 (0xE00) - FX Ctrl 1 */ + { 0x00000e10, 0x6318 }, /* R3600 (0xE10) - EQ1 1 */ + { 0x00000e11, 0x6300 }, /* R3601 (0xE11) - EQ1 2 */ + { 0x00000e12, 0x0fc8 }, /* R3602 (0xE12) - EQ1 3 */ + { 0x00000e13, 0x03fe }, /* R3603 (0xE13) - EQ1 4 */ + { 0x00000e14, 0x00e0 }, /* R3604 (0xE14) - EQ1 5 */ + { 0x00000e15, 0x1ec4 }, /* R3605 (0xE15) - EQ1 6 */ + { 0x00000e16, 0xf136 }, /* R3606 (0xE16) - EQ1 7 */ + { 0x00000e17, 0x0409 }, /* R3607 (0xE17) - EQ1 8 */ + { 0x00000e18, 0x04cc }, /* R3608 (0xE18) - EQ1 9 */ + { 0x00000e19, 0x1c9b }, /* R3609 (0xE19) - EQ1 10 */ + { 0x00000e1a, 0xf337 }, /* R3610 (0xE1A) - EQ1 11 */ + { 0x00000e1b, 0x040b }, /* R3611 (0xE1B) - EQ1 12 */ + { 0x00000e1c, 0x0cbb }, /* R3612 (0xE1C) - EQ1 13 */ + { 0x00000e1d, 0x16f8 }, /* R3613 (0xE1D) - EQ1 14 */ + { 0x00000e1e, 0xf7d9 }, /* R3614 (0xE1E) - EQ1 15 */ + { 0x00000e1f, 0x040a }, /* R3615 (0xE1F) - EQ1 16 */ + { 0x00000e20, 0x1f14 }, /* R3616 (0xE20) - EQ1 17 */ + { 0x00000e21, 0x058c }, /* R3617 (0xE21) - EQ1 18 */ + { 0x00000e22, 0x0563 }, /* R3618 (0xE22) - EQ1 19 */ + { 0x00000e23, 0x4000 }, /* R3619 (0xE23) - EQ1 20 */ + { 0x00000e24, 0x0b75 }, /* R3620 (0xE24) - EQ1 21 */ + { 0x00000e26, 0x6318 }, /* R3622 (0xE26) - EQ2 1 */ + { 0x00000e27, 0x6300 }, /* R3623 (0xE27) - EQ2 2 */ + { 0x00000e28, 0x0fc8 }, /* R3624 (0xE28) - EQ2 3 */ + { 0x00000e29, 0x03fe }, /* R3625 (0xE29) - EQ2 4 */ + { 0x00000e2a, 0x00e0 }, /* R3626 (0xE2A) - EQ2 5 */ + { 0x00000e2b, 0x1ec4 }, /* R3627 (0xE2B) - EQ2 6 */ + { 0x00000e2c, 0xf136 }, /* R3628 (0xE2C) - EQ2 7 */ + { 0x00000e2d, 0x0409 }, /* R3629 (0xE2D) - EQ2 8 */ + { 0x00000e2e, 0x04cc }, /* R3630 (0xE2E) - EQ2 9 */ + { 0x00000e2f, 0x1c9b }, /* R3631 (0xE2F) - EQ2 10 */ + { 0x00000e30, 0xf337 }, /* R3632 (0xE30) - EQ2 11 */ + { 0x00000e31, 0x040b }, /* R3633 (0xE31) - EQ2 12 */ + { 0x00000e32, 0x0cbb }, /* R3634 (0xE32) - EQ2 13 */ + { 0x00000e33, 0x16f8 }, /* R3635 (0xE33) - EQ2 14 */ + { 0x00000e34, 0xf7d9 }, /* R3636 (0xE34) - EQ2 15 */ + { 0x00000e35, 0x040a }, /* R3637 (0xE35) - EQ2 16 */ + { 0x00000e36, 0x1f14 }, /* R3638 (0xE36) - EQ2 17 */ + { 0x00000e37, 0x058c }, /* R3639 (0xE37) - EQ2 18 */ + { 0x00000e38, 0x0563 }, /* R3640 (0xE38) - EQ2 19 */ + { 0x00000e39, 0x4000 }, /* R3641 (0xE39) - EQ2 20 */ + { 0x00000e3a, 0x0b75 }, /* R3642 (0xE3A) - EQ2 21 */ + { 0x00000e3c, 0x6318 }, /* R3644 (0xE3C) - EQ3 1 */ + { 0x00000e3d, 0x6300 }, /* R3645 (0xE3D) - EQ3 2 */ + { 0x00000e3e, 0x0fc8 }, /* R3646 (0xE3E) - EQ3 3 */ + { 0x00000e3f, 0x03fe }, /* R3647 (0xE3F) - EQ3 4 */ + { 0x00000e40, 0x00e0 }, /* R3648 (0xE40) - EQ3 5 */ + { 0x00000e41, 0x1ec4 }, /* R3649 (0xE41) - EQ3 6 */ + { 0x00000e42, 0xf136 }, /* R3650 (0xE42) - EQ3 7 */ + { 0x00000e43, 0x0409 }, /* R3651 (0xE43) - EQ3 8 */ + { 0x00000e44, 0x04cc }, /* R3652 (0xE44) - EQ3 9 */ + { 0x00000e45, 0x1c9b }, /* R3653 (0xE45) - EQ3 10 */ + { 0x00000e46, 0xf337 }, /* R3654 (0xE46) - EQ3 11 */ + { 0x00000e47, 0x040b }, /* R3655 (0xE47) - EQ3 12 */ + { 0x00000e48, 0x0cbb }, /* R3656 (0xE48) - EQ3 13 */ + { 0x00000e49, 0x16f8 }, /* R3657 (0xE49) - EQ3 14 */ + { 0x00000e4a, 0xf7d9 }, /* R3658 (0xE4A) - EQ3 15 */ + { 0x00000e4b, 0x040a }, /* R3659 (0xE4B) - EQ3 16 */ + { 0x00000e4c, 0x1f14 }, /* R3660 (0xE4C) - EQ3 17 */ + { 0x00000e4d, 0x058c }, /* R3661 (0xE4D) - EQ3 18 */ + { 0x00000e4e, 0x0563 }, /* R3662 (0xE4E) - EQ3 19 */ + { 0x00000e4f, 0x4000 }, /* R3663 (0xE4F) - EQ3 20 */ + { 0x00000e50, 0x0b75 }, /* R3664 (0xE50) - EQ3 21 */ + { 0x00000e52, 0x6318 }, /* R3666 (0xE52) - EQ4 1 */ + { 0x00000e53, 0x6300 }, /* R3667 (0xE53) - EQ4 2 */ + { 0x00000e54, 0x0fc8 }, /* R3668 (0xE54) - EQ4 3 */ + { 0x00000e55, 0x03fe }, /* R3669 (0xE55) - EQ4 4 */ + { 0x00000e56, 0x00e0 }, /* R3670 (0xE56) - EQ4 5 */ + { 0x00000e57, 0x1ec4 }, /* R3671 (0xE57) - EQ4 6 */ + { 0x00000e58, 0xf136 }, /* R3672 (0xE58) - EQ4 7 */ + { 0x00000e59, 0x0409 }, /* R3673 (0xE59) - EQ4 8 */ + { 0x00000e5a, 0x04cc }, /* R3674 (0xE5A) - EQ4 9 */ + { 0x00000e5b, 0x1c9b }, /* R3675 (0xE5B) - EQ4 10 */ + { 0x00000e5c, 0xf337 }, /* R3676 (0xE5C) - EQ4 11 */ + { 0x00000e5d, 0x040b }, /* R3677 (0xE5D) - EQ4 12 */ + { 0x00000e5e, 0x0cbb }, /* R3678 (0xE5E) - EQ4 13 */ + { 0x00000e5f, 0x16f8 }, /* R3679 (0xE5F) - EQ4 14 */ + { 0x00000e60, 0xf7d9 }, /* R3680 (0xE60) - EQ4 15 */ + { 0x00000e61, 0x040a }, /* R3681 (0xE61) - EQ4 16 */ + { 0x00000e62, 0x1f14 }, /* R3682 (0xE62) - EQ4 17 */ + { 0x00000e63, 0x058c }, /* R3683 (0xE63) - EQ4 18 */ + { 0x00000e64, 0x0563 }, /* R3684 (0xE64) - EQ4 19 */ + { 0x00000e65, 0x4000 }, /* R3685 (0xE65) - EQ4 20 */ + { 0x00000e66, 0x0b75 }, /* R3686 (0xE66) - EQ4 21 */ + { 0x00000e80, 0x0018 }, /* R3712 (0xE80) - DRC1 Ctrl 1 */ + { 0x00000e81, 0x0933 }, /* R3713 (0xE81) - DRC1 Ctrl 2 */ + { 0x00000e82, 0x0018 }, /* R3714 (0xE82) - DRC1 Ctrl 3 */ + { 0x00000e83, 0x0000 }, /* R3715 (0xE83) - DRC1 Ctrl 4 */ + { 0x00000e84, 0x0000 }, /* R3716 (0xE84) - DRC1 Ctrl 5 */ + { 0x00000e88, 0x0018 }, /* R3720 (0xE88) - DRC2 Ctrl 1 */ + { 0x00000e89, 0x0933 }, /* R3721 (0xE89) - DRC2 Ctrl 2 */ + { 0x00000e8a, 0x0018 }, /* R3722 (0xE8A) - DRC2 Ctrl 3 */ + { 0x00000e8b, 0x0000 }, /* R3723 (0xE8B) - DRC2 Ctrl 4 */ + { 0x00000e8c, 0x0000 }, /* R3724 (0xE8C) - DRC2 Ctrl 5 */ + { 0x00000ec0, 0x0000 }, /* R3776 (0xEC0) - HPLPF1 1 */ + { 0x00000ec1, 0x0000 }, /* R3777 (0xEC1) - HPLPF1 2 */ + { 0x00000ec4, 0x0000 }, /* R3780 (0xEC4) - HPLPF2 1 */ + { 0x00000ec5, 0x0000 }, /* R3781 (0xEC5) - HPLPF2 2 */ + { 0x00000ec8, 0x0000 }, /* R3784 (0xEC8) - HPLPF3 1 */ + { 0x00000ec9, 0x0000 }, /* R3785 (0xEC9) - HPLPF3 2 */ + { 0x00000ecc, 0x0000 }, /* R3788 (0xECC) - HPLPF4 1 */ + { 0x00000ecd, 0x0000 }, /* R3789 (0xECD) - HPLPF4 2 */ + { 0x00000ef0, 0x0000 }, /* R3824 (0xEF0) - ISRC1 Ctrl 1 */ + { 0x00000ef1, 0x0001 }, /* R3825 (0xEF1) - ISRC1 Ctrl 2 */ + { 0x00000ef2, 0x0000 }, /* R3826 (0xEF2) - ISRC1 Ctrl 3 */ + { 0x00000ef3, 0x0000 }, /* R3827 (0xEF3) - ISRC2 Ctrl 1 */ + { 0x00000ef4, 0x0001 }, /* R3828 (0xEF4) - ISRC2 Ctrl 2 */ + { 0x00000ef5, 0x0000 }, /* R3829 (0xEF5) - ISRC2 Ctrl 3 */ + { 0x00001700, 0x2801 }, /* R5888 (0x1700) - GPIO1 Ctrl 1 */ + { 0x00001701, 0xe800 }, /* R5889 (0x1701) - GPIO1 Ctrl 2 */ + { 0x00001702, 0x2801 }, /* R5890 (0x1702) - GPIO2 Ctrl 1 */ + { 0x00001703, 0xe800 }, /* R5891 (0x1703) - GPIO2 Ctrl 2 */ + { 0x00001704, 0x2801 }, /* R5892 (0x1704) - GPIO3 Ctrl 1 */ + { 0x00001705, 0xe800 }, /* R5893 (0x1705) - GPIO3 Ctrl 2 */ + { 0x00001706, 0x2801 }, /* R5894 (0x1706) - GPIO4 Ctrl 1 */ + { 0x00001707, 0xe800 }, /* R5895 (0x1707) - GPIO4 Ctrl 2 */ + { 0x00001708, 0x2801 }, /* R5896 (0x1708) - GPIO5 Ctrl 1 */ + { 0x00001709, 0xe800 }, /* R5897 (0x1709) - GPIO5 Ctrl 2 */ + { 0x0000170a, 0x2801 }, /* R5898 (0x170A) - GPIO6 Ctrl 1 */ + { 0x0000170b, 0xe800 }, /* R5899 (0x170B) - GPIO6 Ctrl 2 */ + { 0x0000170c, 0x2801 }, /* R5900 (0x170C) - GPIO7 Ctrl 1 */ + { 0x0000170d, 0xe800 }, /* R5901 (0x170D) - GPIO7 Ctrl 2 */ + { 0x0000170e, 0x2801 }, /* R5902 (0x170E) - GPIO8 Ctrl 1 */ + { 0x0000170f, 0xe800 }, /* R5903 (0x170F) - GPIO8 Ctrl 2 */ + { 0x00001710, 0x2801 }, /* R5904 (0x1710) - GPIO9 Ctrl 1 */ + { 0x00001711, 0xe800 }, /* R5905 (0x1711) - GPIO9 Ctrl 2 */ + { 0x00001712, 0x2801 }, /* R5906 (0x1712) - GPIO10 Ctrl 1 */ + { 0x00001713, 0xe800 }, /* R5907 (0x1713) - GPIO10 Ctrl 2 */ + { 0x00001714, 0x2801 }, /* R5908 (0x1714) - GPIO11 Ctrl 1 */ + { 0x00001715, 0xe800 }, /* R5909 (0x1715) - GPIO11 Ctrl 2 */ + { 0x00001716, 0x2801 }, /* R5910 (0x1716) - GPIO12 Ctrl 1 */ + { 0x00001717, 0xe800 }, /* R5911 (0x1717) - GPIO12 Ctrl 2 */ + { 0x00001718, 0x2801 }, /* R5912 (0x1718) - GPIO13 Ctrl 1 */ + { 0x00001719, 0xe800 }, /* R5913 (0x1719) - GPIO13 Ctrl 2 */ + { 0x0000171a, 0x2801 }, /* R5914 (0x171A) - GPIO14 Ctrl 1 */ + { 0x0000171b, 0xe800 }, /* R5915 (0x171B) - GPIO14 Ctrl 2 */ + { 0x0000171c, 0x2801 }, /* R5916 (0x171C) - GPIO15 Ctrl 1 */ + { 0x0000171d, 0xe800 }, /* R5917 (0x171D) - GPIO15 Ctrl 2 */ + { 0x00001840, 0xffff }, /* R6208 (0x1840) - IRQ1 Mask 1 */ + { 0x00001841, 0xffff }, /* R6209 (0x1841) - IRQ1 Mask 2 */ + { 0x00001842, 0xffff }, /* R6210 (0x1842) - IRQ1 Mask 3 */ + { 0x00001843, 0xffff }, /* R6211 (0x1843) - IRQ1 Mask 4 */ + { 0x00001844, 0xffff }, /* R6212 (0x1844) - IRQ1 Mask 5 */ + { 0x00001845, 0xffff }, /* R6213 (0x1845) - IRQ1 Mask 6 */ + { 0x00001846, 0xffff }, /* R6214 (0x1846) - IRQ1 Mask 7 */ + { 0x00001847, 0xffff }, /* R6215 (0x1847) - IRQ1 Mask 8 */ + { 0x00001848, 0xffff }, /* R6216 (0x1848) - IRQ1 Mask 9 */ + { 0x00001849, 0xffff }, /* R6217 (0x1849) - IRQ1 Mask 10 */ + { 0x0000184a, 0xffff }, /* R6218 (0x184A) - IRQ1 Mask 11 */ + { 0x0000184b, 0xffff }, /* R6219 (0x184B) - IRQ1 Mask 12 */ + { 0x0000184c, 0xffff }, /* R6220 (0x184C) - IRQ1 Mask 13 */ + { 0x0000184d, 0xffff }, /* R6221 (0x184D) - IRQ1 Mask 14 */ + { 0x0000184e, 0xffff }, /* R6222 (0x184E) - IRQ1 Mask 15 */ + { 0x0000184f, 0xffff }, /* R6223 (0x184F) - IRQ1 Mask 16 */ + { 0x00001850, 0xffff }, /* R6224 (0x1850) - IRQ1 Mask 17 */ + { 0x00001851, 0xffff }, /* R6225 (0x1851) - IRQ1 Mask 18 */ + { 0x00001852, 0xffff }, /* R6226 (0x1852) - IRQ1 Mask 19 */ + { 0x00001853, 0xffff }, /* R6227 (0x1853) - IRQ1 Mask 20 */ + { 0x00001854, 0xffff }, /* R6228 (0x1854) - IRQ1 Mask 21 */ + { 0x00001855, 0xffff }, /* R6229 (0x1855) - IRQ1 Mask 22 */ + { 0x00001856, 0xffff }, /* R6230 (0x1856) - IRQ1 Mask 23 */ + { 0x00001857, 0xffff }, /* R6231 (0x1857) - IRQ1 Mask 24 */ + { 0x00001858, 0xffff }, /* R6232 (0x1858) - IRQ1 Mask 25 */ + { 0x00001859, 0xffff }, /* R6233 (0x1859) - IRQ1 Mask 26 */ + { 0x0000185a, 0xffff }, /* R6234 (0x185A) - IRQ1 Mask 27 */ + { 0x0000185b, 0xffff }, /* R6235 (0x185B) - IRQ1 Mask 28 */ + { 0x0000185c, 0xffff }, /* R6236 (0x185C) - IRQ1 Mask 29 */ + { 0x0000185d, 0xffff }, /* R6237 (0x185D) - IRQ1 Mask 30 */ + { 0x0000185e, 0xffff }, /* R6238 (0x185E) - IRQ1 Mask 31 */ + { 0x0000185f, 0xffff }, /* R6239 (0x185F) - IRQ1 Mask 32 */ + { 0x00001860, 0xffff }, /* R6240 (0x1860) - IRQ1 Mask 33 */ + { 0x00001a06, 0x0000 }, /* R6662 (0x1A06) - Interrupt Debounce 7 */ + { 0x00001a80, 0x4400 }, /* R6784 (0x1A80) - IRQ1 Ctrl */ +}; + +static bool cs47l15_is_adsp_memory(struct device *dev, unsigned int reg) +{ + switch (reg) { + case 0x080000 ... 0x088ffe: + case 0x0a0000 ... 0x0a9ffe: + case 0x0c0000 ... 0x0c1ffe: + case 0x0e0000 ... 0x0e1ffe: + return true; + default: + return false; + } +} + +static bool cs47l15_16bit_readable_register(struct device *dev, + unsigned int reg) +{ + switch (reg) { + case MADERA_SOFTWARE_RESET: + case MADERA_HARDWARE_REVISION: + case MADERA_WRITE_SEQUENCER_CTRL_0 ... MADERA_WRITE_SEQUENCER_CTRL_2: + case MADERA_TONE_GENERATOR_1 ... MADERA_TONE_GENERATOR_5: + case MADERA_PWM_DRIVE_1 ... MADERA_PWM_DRIVE_3: + case MADERA_SAMPLE_RATE_SEQUENCE_SELECT_1: + case MADERA_SAMPLE_RATE_SEQUENCE_SELECT_2: + case MADERA_SAMPLE_RATE_SEQUENCE_SELECT_3: + case MADERA_SAMPLE_RATE_SEQUENCE_SELECT_4: + case MADERA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_1: + case MADERA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_2: + case MADERA_HAPTICS_CONTROL_1 ... MADERA_HAPTICS_CONTROL_2: + case MADERA_HAPTICS_PHASE_1_INTENSITY: + case MADERA_HAPTICS_PHASE_1_DURATION: + case MADERA_HAPTICS_PHASE_2_INTENSITY: + case MADERA_HAPTICS_PHASE_2_DURATION: + case MADERA_HAPTICS_PHASE_3_INTENSITY: + case MADERA_HAPTICS_PHASE_3_DURATION: + case MADERA_HAPTICS_STATUS: + case MADERA_COMFORT_NOISE_GENERATOR: + case MADERA_CLOCK_32K_1: + case MADERA_SYSTEM_CLOCK_1: + case MADERA_SAMPLE_RATE_1 ... MADERA_SAMPLE_RATE_3: + case MADERA_SAMPLE_RATE_1_STATUS: + case MADERA_SAMPLE_RATE_2_STATUS: + case MADERA_SAMPLE_RATE_3_STATUS: + case MADERA_DSP_CLOCK_1: + case MADERA_DSP_CLOCK_2: + case MADERA_OUTPUT_SYSTEM_CLOCK: + case MADERA_RATE_ESTIMATOR_1 ... MADERA_RATE_ESTIMATOR_5: + case MADERA_FLL1_CONTROL_1 ... MADERA_FLL1_CONTROL_6: + case MADERA_FLL1_CONTROL_7: + case MADERA_FLL1_EFS_2: + case MADERA_FLL1_LOOP_FILTER_TEST_1: + case MADERA_FLL1_SYNCHRONISER_1 ... MADERA_FLL1_SYNCHRONISER_7: + case MADERA_FLL1_SPREAD_SPECTRUM: + case MADERA_FLL1_GPIO_CLOCK: + case MADERA_FLLAO_CONTROL_1: + case MADERA_FLLAO_CONTROL_2: + case MADERA_FLLAO_CONTROL_3: + case MADERA_FLLAO_CONTROL_4: + case MADERA_FLLAO_CONTROL_5: + case MADERA_FLLAO_CONTROL_6: + case MADERA_FLLAO_CONTROL_7: + case MADERA_FLLAO_CONTROL_8: + case MADERA_FLLAO_CONTROL_9: + case MADERA_FLLAO_CONTROL_10: + case MADERA_FLLAO_CONTROL_11: + case MADERA_MIC_BIAS_CTRL_1: + case MADERA_MIC_BIAS_CTRL_5: + case MADERA_HP_CTRL_1L: + case MADERA_HP_CTRL_1R: + case MADERA_ACCESSORY_DETECT_MODE_1: + case MADERA_HEADPHONE_DETECT_0: + case MADERA_HEADPHONE_DETECT_1: + case MADERA_HEADPHONE_DETECT_2: + case MADERA_HEADPHONE_DETECT_3: + case MADERA_HEADPHONE_DETECT_5: + case MADERA_MICD_CLAMP_CONTROL: + case MADERA_MIC_DETECT_1_CONTROL_0: + case MADERA_MIC_DETECT_1_CONTROL_1: + case MADERA_MIC_DETECT_1_CONTROL_2: + case MADERA_MIC_DETECT_1_CONTROL_3: + case MADERA_MIC_DETECT_1_LEVEL_1 ... MADERA_MIC_DETECT_1_LEVEL_4: + case MADERA_MIC_DETECT_1_CONTROL_4: + case MADERA_GP_SWITCH_1: + case MADERA_JACK_DETECT_ANALOGUE: + case MADERA_INPUT_ENABLES: + case MADERA_INPUT_ENABLES_STATUS: + case MADERA_INPUT_RATE: + case MADERA_INPUT_VOLUME_RAMP: + case MADERA_HPF_CONTROL: + case MADERA_IN1L_CONTROL: + case MADERA_ADC_DIGITAL_VOLUME_1L: + case MADERA_DMIC1L_CONTROL: + case MADERA_IN1L_RATE_CONTROL: + case MADERA_IN1R_CONTROL: + case MADERA_ADC_DIGITAL_VOLUME_1R: + case MADERA_DMIC1R_CONTROL: + case MADERA_IN1R_RATE_CONTROL: + case MADERA_IN2L_CONTROL: + case MADERA_ADC_DIGITAL_VOLUME_2L: + case MADERA_DMIC2L_CONTROL: + case MADERA_IN2L_RATE_CONTROL: + case MADERA_IN2R_CONTROL: + case MADERA_ADC_DIGITAL_VOLUME_2R: + case MADERA_DMIC2R_CONTROL: + case MADERA_IN2R_RATE_CONTROL: + case CS47L15_ADC_INT_BIAS: + case CS47L15_PGA_BIAS_SEL: + case MADERA_OUTPUT_ENABLES_1: + case MADERA_OUTPUT_STATUS_1: + case MADERA_RAW_OUTPUT_STATUS_1: + case MADERA_OUTPUT_RATE_1: + case MADERA_OUTPUT_VOLUME_RAMP: + case MADERA_OUTPUT_PATH_CONFIG_1L: + case MADERA_DAC_DIGITAL_VOLUME_1L: + case MADERA_OUTPUT_PATH_CONFIG_1: + case MADERA_NOISE_GATE_SELECT_1L: + case MADERA_OUTPUT_PATH_CONFIG_1R: + case MADERA_DAC_DIGITAL_VOLUME_1R: + case MADERA_NOISE_GATE_SELECT_1R: + case MADERA_OUTPUT_PATH_CONFIG_2: + case MADERA_OUTPUT_PATH_CONFIG_4L: + case MADERA_DAC_DIGITAL_VOLUME_4L: + case MADERA_NOISE_GATE_SELECT_4L: + case MADERA_OUTPUT_PATH_CONFIG_5L: + case MADERA_DAC_DIGITAL_VOLUME_5L: + case MADERA_NOISE_GATE_SELECT_5L: + case MADERA_OUTPUT_PATH_CONFIG_5R: + case MADERA_DAC_DIGITAL_VOLUME_5R: + case MADERA_NOISE_GATE_SELECT_5R: + case MADERA_DAC_AEC_CONTROL_1: + case MADERA_DAC_AEC_CONTROL_2: + case MADERA_NOISE_GATE_CONTROL: + case MADERA_PDM_SPK1_CTRL_1 ... MADERA_PDM_SPK1_CTRL_2: + case MADERA_HP1_SHORT_CIRCUIT_CTRL: + case MADERA_HP_TEST_CTRL_5: + case MADERA_HP_TEST_CTRL_6: + case MADERA_AIF1_BCLK_CTRL: + case MADERA_AIF1_TX_PIN_CTRL: + case MADERA_AIF1_RX_PIN_CTRL: + case MADERA_AIF1_RATE_CTRL: + case MADERA_AIF1_FORMAT: + case MADERA_AIF1_RX_BCLK_RATE: + case MADERA_AIF1_FRAME_CTRL_1 ... MADERA_AIF1_FRAME_CTRL_8: + case MADERA_AIF1_FRAME_CTRL_11 ... MADERA_AIF1_FRAME_CTRL_16: + case MADERA_AIF1_TX_ENABLES: + case MADERA_AIF1_RX_ENABLES: + case MADERA_AIF2_BCLK_CTRL: + case MADERA_AIF2_TX_PIN_CTRL: + case MADERA_AIF2_RX_PIN_CTRL: + case MADERA_AIF2_RATE_CTRL: + case MADERA_AIF2_FORMAT: + case MADERA_AIF2_RX_BCLK_RATE: + case MADERA_AIF2_FRAME_CTRL_1 ... MADERA_AIF2_FRAME_CTRL_6: + case MADERA_AIF2_FRAME_CTRL_11 ... MADERA_AIF2_FRAME_CTRL_14: + case MADERA_AIF2_TX_ENABLES: + case MADERA_AIF2_RX_ENABLES: + case MADERA_AIF3_BCLK_CTRL: + case MADERA_AIF3_TX_PIN_CTRL: + case MADERA_AIF3_RX_PIN_CTRL: + case MADERA_AIF3_RATE_CTRL: + case MADERA_AIF3_FORMAT: + case MADERA_AIF3_RX_BCLK_RATE: + case MADERA_AIF3_FRAME_CTRL_1 ... MADERA_AIF3_FRAME_CTRL_4: + case MADERA_AIF3_FRAME_CTRL_11 ... MADERA_AIF3_FRAME_CTRL_12: + case MADERA_AIF3_TX_ENABLES: + case MADERA_AIF3_RX_ENABLES: + case MADERA_SPD1_TX_CONTROL: + case MADERA_SPD1_TX_CHANNEL_STATUS_1: + case MADERA_SPD1_TX_CHANNEL_STATUS_2: + case MADERA_SPD1_TX_CHANNEL_STATUS_3: + case MADERA_PWM1MIX_INPUT_1_SOURCE: + case MADERA_PWM1MIX_INPUT_1_VOLUME: + case MADERA_PWM1MIX_INPUT_2_SOURCE: + case MADERA_PWM1MIX_INPUT_2_VOLUME: + case MADERA_PWM1MIX_INPUT_3_SOURCE: + case MADERA_PWM1MIX_INPUT_3_VOLUME: + case MADERA_PWM1MIX_INPUT_4_SOURCE: + case MADERA_PWM1MIX_INPUT_4_VOLUME: + case MADERA_PWM2MIX_INPUT_1_SOURCE: + case MADERA_PWM2MIX_INPUT_1_VOLUME: + case MADERA_PWM2MIX_INPUT_2_SOURCE: + case MADERA_PWM2MIX_INPUT_2_VOLUME: + case MADERA_PWM2MIX_INPUT_3_SOURCE: + case MADERA_PWM2MIX_INPUT_3_VOLUME: + case MADERA_PWM2MIX_INPUT_4_SOURCE: + case MADERA_PWM2MIX_INPUT_4_VOLUME: + case MADERA_OUT1LMIX_INPUT_1_SOURCE: + case MADERA_OUT1LMIX_INPUT_1_VOLUME: + case MADERA_OUT1LMIX_INPUT_2_SOURCE: + case MADERA_OUT1LMIX_INPUT_2_VOLUME: + case MADERA_OUT1LMIX_INPUT_3_SOURCE: + case MADERA_OUT1LMIX_INPUT_3_VOLUME: + case MADERA_OUT1LMIX_INPUT_4_SOURCE: + case MADERA_OUT1LMIX_INPUT_4_VOLUME: + case MADERA_OUT1RMIX_INPUT_1_SOURCE: + case MADERA_OUT1RMIX_INPUT_1_VOLUME: + case MADERA_OUT1RMIX_INPUT_2_SOURCE: + case MADERA_OUT1RMIX_INPUT_2_VOLUME: + case MADERA_OUT1RMIX_INPUT_3_SOURCE: + case MADERA_OUT1RMIX_INPUT_3_VOLUME: + case MADERA_OUT1RMIX_INPUT_4_SOURCE: + case MADERA_OUT1RMIX_INPUT_4_VOLUME: + case MADERA_OUT4LMIX_INPUT_1_SOURCE: + case MADERA_OUT4LMIX_INPUT_1_VOLUME: + case MADERA_OUT4LMIX_INPUT_2_SOURCE: + case MADERA_OUT4LMIX_INPUT_2_VOLUME: + case MADERA_OUT4LMIX_INPUT_3_SOURCE: + case MADERA_OUT4LMIX_INPUT_3_VOLUME: + case MADERA_OUT4LMIX_INPUT_4_SOURCE: + case MADERA_OUT4LMIX_INPUT_4_VOLUME: + case MADERA_OUT5LMIX_INPUT_1_SOURCE: + case MADERA_OUT5LMIX_INPUT_1_VOLUME: + case MADERA_OUT5LMIX_INPUT_2_SOURCE: + case MADERA_OUT5LMIX_INPUT_2_VOLUME: + case MADERA_OUT5LMIX_INPUT_3_SOURCE: + case MADERA_OUT5LMIX_INPUT_3_VOLUME: + case MADERA_OUT5LMIX_INPUT_4_SOURCE: + case MADERA_OUT5LMIX_INPUT_4_VOLUME: + case MADERA_OUT5RMIX_INPUT_1_SOURCE: + case MADERA_OUT5RMIX_INPUT_1_VOLUME: + case MADERA_OUT5RMIX_INPUT_2_SOURCE: + case MADERA_OUT5RMIX_INPUT_2_VOLUME: + case MADERA_OUT5RMIX_INPUT_3_SOURCE: + case MADERA_OUT5RMIX_INPUT_3_VOLUME: + case MADERA_OUT5RMIX_INPUT_4_SOURCE: + case MADERA_OUT5RMIX_INPUT_4_VOLUME: + case MADERA_AIF1TX1MIX_INPUT_1_SOURCE: + case MADERA_AIF1TX1MIX_INPUT_1_VOLUME: + case MADERA_AIF1TX1MIX_INPUT_2_SOURCE: + case MADERA_AIF1TX1MIX_INPUT_2_VOLUME: + case MADERA_AIF1TX1MIX_INPUT_3_SOURCE: + case MADERA_AIF1TX1MIX_INPUT_3_VOLUME: + case MADERA_AIF1TX1MIX_INPUT_4_SOURCE: + case MADERA_AIF1TX1MIX_INPUT_4_VOLUME: + case MADERA_AIF1TX2MIX_INPUT_1_SOURCE: + case MADERA_AIF1TX2MIX_INPUT_1_VOLUME: + case MADERA_AIF1TX2MIX_INPUT_2_SOURCE: + case MADERA_AIF1TX2MIX_INPUT_2_VOLUME: + case MADERA_AIF1TX2MIX_INPUT_3_SOURCE: + case MADERA_AIF1TX2MIX_INPUT_3_VOLUME: + case MADERA_AIF1TX2MIX_INPUT_4_SOURCE: + case MADERA_AIF1TX2MIX_INPUT_4_VOLUME: + case MADERA_AIF1TX3MIX_INPUT_1_SOURCE: + case MADERA_AIF1TX3MIX_INPUT_1_VOLUME: + case MADERA_AIF1TX3MIX_INPUT_2_SOURCE: + case MADERA_AIF1TX3MIX_INPUT_2_VOLUME: + case MADERA_AIF1TX3MIX_INPUT_3_SOURCE: + case MADERA_AIF1TX3MIX_INPUT_3_VOLUME: + case MADERA_AIF1TX3MIX_INPUT_4_SOURCE: + case MADERA_AIF1TX3MIX_INPUT_4_VOLUME: + case MADERA_AIF1TX4MIX_INPUT_1_SOURCE: + case MADERA_AIF1TX4MIX_INPUT_1_VOLUME: + case MADERA_AIF1TX4MIX_INPUT_2_SOURCE: + case MADERA_AIF1TX4MIX_INPUT_2_VOLUME: + case MADERA_AIF1TX4MIX_INPUT_3_SOURCE: + case MADERA_AIF1TX4MIX_INPUT_3_VOLUME: + case MADERA_AIF1TX4MIX_INPUT_4_SOURCE: + case MADERA_AIF1TX4MIX_INPUT_4_VOLUME: + case MADERA_AIF1TX5MIX_INPUT_1_SOURCE: + case MADERA_AIF1TX5MIX_INPUT_1_VOLUME: + case MADERA_AIF1TX5MIX_INPUT_2_SOURCE: + case MADERA_AIF1TX5MIX_INPUT_2_VOLUME: + case MADERA_AIF1TX5MIX_INPUT_3_SOURCE: + case MADERA_AIF1TX5MIX_INPUT_3_VOLUME: + case MADERA_AIF1TX5MIX_INPUT_4_SOURCE: + case MADERA_AIF1TX5MIX_INPUT_4_VOLUME: + case MADERA_AIF1TX6MIX_INPUT_1_SOURCE: + case MADERA_AIF1TX6MIX_INPUT_1_VOLUME: + case MADERA_AIF1TX6MIX_INPUT_2_SOURCE: + case MADERA_AIF1TX6MIX_INPUT_2_VOLUME: + case MADERA_AIF1TX6MIX_INPUT_3_SOURCE: + case MADERA_AIF1TX6MIX_INPUT_3_VOLUME: + case MADERA_AIF1TX6MIX_INPUT_4_SOURCE: + case MADERA_AIF1TX6MIX_INPUT_4_VOLUME: + case MADERA_AIF2TX1MIX_INPUT_1_SOURCE: + case MADERA_AIF2TX1MIX_INPUT_1_VOLUME: + case MADERA_AIF2TX1MIX_INPUT_2_SOURCE: + case MADERA_AIF2TX1MIX_INPUT_2_VOLUME: + case MADERA_AIF2TX1MIX_INPUT_3_SOURCE: + case MADERA_AIF2TX1MIX_INPUT_3_VOLUME: + case MADERA_AIF2TX1MIX_INPUT_4_SOURCE: + case MADERA_AIF2TX1MIX_INPUT_4_VOLUME: + case MADERA_AIF2TX2MIX_INPUT_1_SOURCE: + case MADERA_AIF2TX2MIX_INPUT_1_VOLUME: + case MADERA_AIF2TX2MIX_INPUT_2_SOURCE: + case MADERA_AIF2TX2MIX_INPUT_2_VOLUME: + case MADERA_AIF2TX2MIX_INPUT_3_SOURCE: + case MADERA_AIF2TX2MIX_INPUT_3_VOLUME: + case MADERA_AIF2TX2MIX_INPUT_4_SOURCE: + case MADERA_AIF2TX2MIX_INPUT_4_VOLUME: + case MADERA_AIF2TX3MIX_INPUT_1_SOURCE: + case MADERA_AIF2TX3MIX_INPUT_1_VOLUME: + case MADERA_AIF2TX3MIX_INPUT_2_SOURCE: + case MADERA_AIF2TX3MIX_INPUT_2_VOLUME: + case MADERA_AIF2TX3MIX_INPUT_3_SOURCE: + case MADERA_AIF2TX3MIX_INPUT_3_VOLUME: + case MADERA_AIF2TX3MIX_INPUT_4_SOURCE: + case MADERA_AIF2TX3MIX_INPUT_4_VOLUME: + case MADERA_AIF2TX4MIX_INPUT_1_SOURCE: + case MADERA_AIF2TX4MIX_INPUT_1_VOLUME: + case MADERA_AIF2TX4MIX_INPUT_2_SOURCE: + case MADERA_AIF2TX4MIX_INPUT_2_VOLUME: + case MADERA_AIF2TX4MIX_INPUT_3_SOURCE: + case MADERA_AIF2TX4MIX_INPUT_3_VOLUME: + case MADERA_AIF2TX4MIX_INPUT_4_SOURCE: + case MADERA_AIF2TX4MIX_INPUT_4_VOLUME: + case MADERA_AIF3TX1MIX_INPUT_1_SOURCE: + case MADERA_AIF3TX1MIX_INPUT_1_VOLUME: + case MADERA_AIF3TX1MIX_INPUT_2_SOURCE: + case MADERA_AIF3TX1MIX_INPUT_2_VOLUME: + case MADERA_AIF3TX1MIX_INPUT_3_SOURCE: + case MADERA_AIF3TX1MIX_INPUT_3_VOLUME: + case MADERA_AIF3TX1MIX_INPUT_4_SOURCE: + case MADERA_AIF3TX1MIX_INPUT_4_VOLUME: + case MADERA_AIF3TX2MIX_INPUT_1_SOURCE: + case MADERA_AIF3TX2MIX_INPUT_1_VOLUME: + case MADERA_AIF3TX2MIX_INPUT_2_SOURCE: + case MADERA_AIF3TX2MIX_INPUT_2_VOLUME: + case MADERA_AIF3TX2MIX_INPUT_3_SOURCE: + case MADERA_AIF3TX2MIX_INPUT_3_VOLUME: + case MADERA_AIF3TX2MIX_INPUT_4_SOURCE: + case MADERA_AIF3TX2MIX_INPUT_4_VOLUME: + case MADERA_SPDIF1TX1MIX_INPUT_1_SOURCE: + case MADERA_SPDIF1TX1MIX_INPUT_1_VOLUME: + case MADERA_SPDIF1TX2MIX_INPUT_1_SOURCE: + case MADERA_SPDIF1TX2MIX_INPUT_1_VOLUME: + case MADERA_EQ1MIX_INPUT_1_SOURCE: + case MADERA_EQ1MIX_INPUT_1_VOLUME: + case MADERA_EQ1MIX_INPUT_2_SOURCE: + case MADERA_EQ1MIX_INPUT_2_VOLUME: + case MADERA_EQ1MIX_INPUT_3_SOURCE: + case MADERA_EQ1MIX_INPUT_3_VOLUME: + case MADERA_EQ1MIX_INPUT_4_SOURCE: + case MADERA_EQ1MIX_INPUT_4_VOLUME: + case MADERA_EQ2MIX_INPUT_1_SOURCE: + case MADERA_EQ2MIX_INPUT_1_VOLUME: + case MADERA_EQ2MIX_INPUT_2_SOURCE: + case MADERA_EQ2MIX_INPUT_2_VOLUME: + case MADERA_EQ2MIX_INPUT_3_SOURCE: + case MADERA_EQ2MIX_INPUT_3_VOLUME: + case MADERA_EQ2MIX_INPUT_4_SOURCE: + case MADERA_EQ2MIX_INPUT_4_VOLUME: + case MADERA_EQ3MIX_INPUT_1_SOURCE: + case MADERA_EQ3MIX_INPUT_1_VOLUME: + case MADERA_EQ3MIX_INPUT_2_SOURCE: + case MADERA_EQ3MIX_INPUT_2_VOLUME: + case MADERA_EQ3MIX_INPUT_3_SOURCE: + case MADERA_EQ3MIX_INPUT_3_VOLUME: + case MADERA_EQ3MIX_INPUT_4_SOURCE: + case MADERA_EQ3MIX_INPUT_4_VOLUME: + case MADERA_EQ4MIX_INPUT_1_SOURCE: + case MADERA_EQ4MIX_INPUT_1_VOLUME: + case MADERA_EQ4MIX_INPUT_2_SOURCE: + case MADERA_EQ4MIX_INPUT_2_VOLUME: + case MADERA_EQ4MIX_INPUT_3_SOURCE: + case MADERA_EQ4MIX_INPUT_3_VOLUME: + case MADERA_EQ4MIX_INPUT_4_SOURCE: + case MADERA_EQ4MIX_INPUT_4_VOLUME: + case MADERA_DRC1LMIX_INPUT_1_SOURCE: + case MADERA_DRC1LMIX_INPUT_1_VOLUME: + case MADERA_DRC1LMIX_INPUT_2_SOURCE: + case MADERA_DRC1LMIX_INPUT_2_VOLUME: + case MADERA_DRC1LMIX_INPUT_3_SOURCE: + case MADERA_DRC1LMIX_INPUT_3_VOLUME: + case MADERA_DRC1LMIX_INPUT_4_SOURCE: + case MADERA_DRC1LMIX_INPUT_4_VOLUME: + case MADERA_DRC1RMIX_INPUT_1_SOURCE: + case MADERA_DRC1RMIX_INPUT_1_VOLUME: + case MADERA_DRC1RMIX_INPUT_2_SOURCE: + case MADERA_DRC1RMIX_INPUT_2_VOLUME: + case MADERA_DRC1RMIX_INPUT_3_SOURCE: + case MADERA_DRC1RMIX_INPUT_3_VOLUME: + case MADERA_DRC1RMIX_INPUT_4_SOURCE: + case MADERA_DRC1RMIX_INPUT_4_VOLUME: + case MADERA_DRC2LMIX_INPUT_1_SOURCE: + case MADERA_DRC2LMIX_INPUT_1_VOLUME: + case MADERA_DRC2LMIX_INPUT_2_SOURCE: + case MADERA_DRC2LMIX_INPUT_2_VOLUME: + case MADERA_DRC2LMIX_INPUT_3_SOURCE: + case MADERA_DRC2LMIX_INPUT_3_VOLUME: + case MADERA_DRC2LMIX_INPUT_4_SOURCE: + case MADERA_DRC2LMIX_INPUT_4_VOLUME: + case MADERA_DRC2RMIX_INPUT_1_SOURCE: + case MADERA_DRC2RMIX_INPUT_1_VOLUME: + case MADERA_DRC2RMIX_INPUT_2_SOURCE: + case MADERA_DRC2RMIX_INPUT_2_VOLUME: + case MADERA_DRC2RMIX_INPUT_3_SOURCE: + case MADERA_DRC2RMIX_INPUT_3_VOLUME: + case MADERA_DRC2RMIX_INPUT_4_SOURCE: + case MADERA_DRC2RMIX_INPUT_4_VOLUME: + case MADERA_HPLP1MIX_INPUT_1_SOURCE: + case MADERA_HPLP1MIX_INPUT_1_VOLUME: + case MADERA_HPLP1MIX_INPUT_2_SOURCE: + case MADERA_HPLP1MIX_INPUT_2_VOLUME: + case MADERA_HPLP1MIX_INPUT_3_SOURCE: + case MADERA_HPLP1MIX_INPUT_3_VOLUME: + case MADERA_HPLP1MIX_INPUT_4_SOURCE: + case MADERA_HPLP1MIX_INPUT_4_VOLUME: + case MADERA_HPLP2MIX_INPUT_1_SOURCE: + case MADERA_HPLP2MIX_INPUT_1_VOLUME: + case MADERA_HPLP2MIX_INPUT_2_SOURCE: + case MADERA_HPLP2MIX_INPUT_2_VOLUME: + case MADERA_HPLP2MIX_INPUT_3_SOURCE: + case MADERA_HPLP2MIX_INPUT_3_VOLUME: + case MADERA_HPLP2MIX_INPUT_4_SOURCE: + case MADERA_HPLP2MIX_INPUT_4_VOLUME: + case MADERA_HPLP3MIX_INPUT_1_SOURCE: + case MADERA_HPLP3MIX_INPUT_1_VOLUME: + case MADERA_HPLP3MIX_INPUT_2_SOURCE: + case MADERA_HPLP3MIX_INPUT_2_VOLUME: + case MADERA_HPLP3MIX_INPUT_3_SOURCE: + case MADERA_HPLP3MIX_INPUT_3_VOLUME: + case MADERA_HPLP3MIX_INPUT_4_SOURCE: + case MADERA_HPLP3MIX_INPUT_4_VOLUME: + case MADERA_HPLP4MIX_INPUT_1_SOURCE: + case MADERA_HPLP4MIX_INPUT_1_VOLUME: + case MADERA_HPLP4MIX_INPUT_2_SOURCE: + case MADERA_HPLP4MIX_INPUT_2_VOLUME: + case MADERA_HPLP4MIX_INPUT_3_SOURCE: + case MADERA_HPLP4MIX_INPUT_3_VOLUME: + case MADERA_HPLP4MIX_INPUT_4_SOURCE: + case MADERA_HPLP4MIX_INPUT_4_VOLUME: + case MADERA_DSP1LMIX_INPUT_1_SOURCE: + case MADERA_DSP1LMIX_INPUT_1_VOLUME: + case MADERA_DSP1LMIX_INPUT_2_SOURCE: + case MADERA_DSP1LMIX_INPUT_2_VOLUME: + case MADERA_DSP1LMIX_INPUT_3_SOURCE: + case MADERA_DSP1LMIX_INPUT_3_VOLUME: + case MADERA_DSP1LMIX_INPUT_4_SOURCE: + case MADERA_DSP1LMIX_INPUT_4_VOLUME: + case MADERA_DSP1RMIX_INPUT_1_SOURCE: + case MADERA_DSP1RMIX_INPUT_1_VOLUME: + case MADERA_DSP1RMIX_INPUT_2_SOURCE: + case MADERA_DSP1RMIX_INPUT_2_VOLUME: + case MADERA_DSP1RMIX_INPUT_3_SOURCE: + case MADERA_DSP1RMIX_INPUT_3_VOLUME: + case MADERA_DSP1RMIX_INPUT_4_SOURCE: + case MADERA_DSP1RMIX_INPUT_4_VOLUME: + case MADERA_DSP1AUX1MIX_INPUT_1_SOURCE: + case MADERA_DSP1AUX2MIX_INPUT_1_SOURCE: + case MADERA_DSP1AUX3MIX_INPUT_1_SOURCE: + case MADERA_DSP1AUX4MIX_INPUT_1_SOURCE: + case MADERA_DSP1AUX5MIX_INPUT_1_SOURCE: + case MADERA_DSP1AUX6MIX_INPUT_1_SOURCE: + case MADERA_ISRC1DEC1MIX_INPUT_1_SOURCE: + case MADERA_ISRC1DEC2MIX_INPUT_1_SOURCE: + case MADERA_ISRC1DEC3MIX_INPUT_1_SOURCE: + case MADERA_ISRC1DEC4MIX_INPUT_1_SOURCE: + case MADERA_ISRC1INT1MIX_INPUT_1_SOURCE: + case MADERA_ISRC1INT2MIX_INPUT_1_SOURCE: + case MADERA_ISRC1INT3MIX_INPUT_1_SOURCE: + case MADERA_ISRC1INT4MIX_INPUT_1_SOURCE: + case MADERA_ISRC2DEC1MIX_INPUT_1_SOURCE: + case MADERA_ISRC2DEC2MIX_INPUT_1_SOURCE: + case MADERA_ISRC2DEC3MIX_INPUT_1_SOURCE: + case MADERA_ISRC2DEC4MIX_INPUT_1_SOURCE: + case MADERA_ISRC2INT1MIX_INPUT_1_SOURCE: + case MADERA_ISRC2INT2MIX_INPUT_1_SOURCE: + case MADERA_ISRC2INT3MIX_INPUT_1_SOURCE: + case MADERA_ISRC2INT4MIX_INPUT_1_SOURCE: + case MADERA_FX_CTRL1 ... MADERA_FX_CTRL2: + case MADERA_EQ1_1 ... MADERA_EQ1_21: + case MADERA_EQ2_1 ... MADERA_EQ2_21: + case MADERA_EQ3_1 ... MADERA_EQ3_21: + case MADERA_EQ4_1 ... MADERA_EQ4_21: + case MADERA_DRC1_CTRL1 ... MADERA_DRC1_CTRL5: + case MADERA_DRC2_CTRL1 ... MADERA_DRC2_CTRL5: + case MADERA_HPLPF1_1 ... MADERA_HPLPF1_2: + case MADERA_HPLPF2_1 ... MADERA_HPLPF2_2: + case MADERA_HPLPF3_1 ... MADERA_HPLPF3_2: + case MADERA_HPLPF4_1 ... MADERA_HPLPF4_2: + case MADERA_ISRC_1_CTRL_1 ... MADERA_ISRC_1_CTRL_3: + case MADERA_ISRC_2_CTRL_1 ... MADERA_ISRC_2_CTRL_3: + case MADERA_GPIO1_CTRL_1 ... MADERA_GPIO15_CTRL_2: + case MADERA_IRQ1_STATUS_1 ... MADERA_IRQ1_STATUS_33: + case MADERA_IRQ1_MASK_1 ... MADERA_IRQ1_MASK_33: + case MADERA_IRQ1_RAW_STATUS_1 ... MADERA_IRQ1_RAW_STATUS_33: + case MADERA_INTERRUPT_DEBOUNCE_7: + case MADERA_IRQ1_CTRL: + return true; + default: + return false; + } +} + +static bool cs47l15_16bit_volatile_register(struct device *dev, + unsigned int reg) +{ + switch (reg) { + case MADERA_SOFTWARE_RESET: + case MADERA_HARDWARE_REVISION: + case MADERA_WRITE_SEQUENCER_CTRL_0 ... MADERA_WRITE_SEQUENCER_CTRL_2: + case MADERA_HAPTICS_STATUS: + case MADERA_SAMPLE_RATE_1_STATUS: + case MADERA_SAMPLE_RATE_2_STATUS: + case MADERA_SAMPLE_RATE_3_STATUS: + case MADERA_HP_CTRL_1L: + case MADERA_HP_CTRL_1R: + case MADERA_MIC_DETECT_1_CONTROL_3: + case MADERA_MIC_DETECT_1_CONTROL_4: + case MADERA_HEADPHONE_DETECT_2: + case MADERA_HEADPHONE_DETECT_3: + case MADERA_HEADPHONE_DETECT_5: + case MADERA_INPUT_ENABLES_STATUS: + case MADERA_OUTPUT_STATUS_1: + case MADERA_RAW_OUTPUT_STATUS_1: + case MADERA_SPD1_TX_CHANNEL_STATUS_1: + case MADERA_SPD1_TX_CHANNEL_STATUS_2: + case MADERA_SPD1_TX_CHANNEL_STATUS_3: + case MADERA_FX_CTRL2: + case MADERA_IRQ1_STATUS_1 ... MADERA_IRQ1_STATUS_33: + case MADERA_IRQ1_RAW_STATUS_1 ... MADERA_IRQ1_RAW_STATUS_33: + return true; + default: + return false; + } +} + +static bool cs47l15_32bit_readable_register(struct device *dev, + unsigned int reg) +{ + switch (reg) { + case MADERA_WSEQ_SEQUENCE_1 ... MADERA_WSEQ_SEQUENCE_225: + case MADERA_OTP_HPDET_CAL_1 ... MADERA_OTP_HPDET_CAL_2: + case MADERA_DSP1_CONFIG_1 ... MADERA_DSP1_PMEM_ERR_ADDR___XMEM_ERR_ADDR: + return true; + default: + return cs47l15_is_adsp_memory(dev, reg); + } +} + +static bool cs47l15_32bit_volatile_register(struct device *dev, + unsigned int reg) +{ + switch (reg) { + case MADERA_WSEQ_SEQUENCE_1 ... MADERA_WSEQ_SEQUENCE_225: + case MADERA_OTP_HPDET_CAL_1 ... MADERA_OTP_HPDET_CAL_2: + case MADERA_DSP1_CONFIG_1 ... MADERA_DSP1_PMEM_ERR_ADDR___XMEM_ERR_ADDR: + return true; + default: + return cs47l15_is_adsp_memory(dev, reg); + } +} + +const struct regmap_config cs47l15_16bit_spi_regmap = { + .name = "cs47l15_16bit", + .reg_bits = 32, + .pad_bits = 16, + .val_bits = 16, + + .max_register = MADERA_INTERRUPT_RAW_STATUS_1, + .readable_reg = &cs47l15_16bit_readable_register, + .volatile_reg = &cs47l15_16bit_volatile_register, + + .cache_type = REGCACHE_RBTREE, + .reg_defaults = cs47l15_reg_default, + .num_reg_defaults = ARRAY_SIZE(cs47l15_reg_default), +}; +EXPORT_SYMBOL_GPL(cs47l15_16bit_spi_regmap); + +const struct regmap_config cs47l15_16bit_i2c_regmap = { + .name = "cs47l15_16bit", + .reg_bits = 32, + .val_bits = 16, + + .max_register = MADERA_INTERRUPT_RAW_STATUS_1, + .readable_reg = &cs47l15_16bit_readable_register, + .volatile_reg = &cs47l15_16bit_volatile_register, + + .cache_type = REGCACHE_RBTREE, + .reg_defaults = cs47l15_reg_default, + .num_reg_defaults = ARRAY_SIZE(cs47l15_reg_default), +}; +EXPORT_SYMBOL_GPL(cs47l15_16bit_i2c_regmap); + +const struct regmap_config cs47l15_32bit_spi_regmap = { + .name = "cs47l15_32bit", + .reg_bits = 32, + .reg_stride = 2, + .pad_bits = 16, + .val_bits = 32, + + .max_register = MADERA_DSP1_PMEM_ERR_ADDR___XMEM_ERR_ADDR, + .readable_reg = &cs47l15_32bit_readable_register, + .volatile_reg = &cs47l15_32bit_volatile_register, + + .cache_type = REGCACHE_RBTREE, +}; +EXPORT_SYMBOL_GPL(cs47l15_32bit_spi_regmap); + +const struct regmap_config cs47l15_32bit_i2c_regmap = { + .name = "cs47l15_32bit", + .reg_bits = 32, + .reg_stride = 2, + .val_bits = 32, + + .max_register = MADERA_DSP1_PMEM_ERR_ADDR___XMEM_ERR_ADDR, + .readable_reg = &cs47l15_32bit_readable_register, + .volatile_reg = &cs47l15_32bit_volatile_register, + + .cache_type = REGCACHE_RBTREE, +}; +EXPORT_SYMBOL_GPL(cs47l15_32bit_i2c_regmap); diff --git a/drivers/mfd/madera-core.c b/drivers/mfd/madera-core.c index bc4e25b5b97d..a354567ebc86 100644 --- a/drivers/mfd/madera-core.c +++ b/drivers/mfd/madera-core.c @@ -31,6 +31,7 @@ #include "madera.h" +#define CS47L15_SILICON_ID 0x6370 #define CS47L35_SILICON_ID 0x6360 #define CS47L85_SILICON_ID 0x6338 #define CS47L90_SILICON_ID 0x6364 @@ -46,6 +47,28 @@ static const struct mfd_cell madera_ldo1_devs[] = { { .name = "madera-ldo1" }, }; +static const char * const cs47l15_supplies[] = { + "MICVDD", + "CPVDD1", + "SPKVDD", +}; + +static const struct mfd_cell cs47l15_devs[] = { + { .name = "madera-pinctrl", }, + { .name = "madera-irq" }, + { .name = "madera-gpio" }, + { + .name = "madera-extcon", + .parent_supplies = cs47l15_supplies, + .num_parent_supplies = 1, /* We only need MICVDD */ + }, + { + .name = "cs47l15-codec", + .parent_supplies = cs47l15_supplies, + .num_parent_supplies = ARRAY_SIZE(cs47l15_supplies), + }, +}; + static const char * const cs47l35_supplies[] = { "MICVDD", "DBVDD2", @@ -129,6 +152,8 @@ static const struct mfd_cell cs47l90_devs[] = { const char *madera_name_from_type(enum madera_type type) { switch (type) { + case CS47L15: + return "CS47L15"; case CS47L35: return "CS47L35"; case CS47L85: @@ -291,6 +316,7 @@ const struct dev_pm_ops madera_pm_ops = { EXPORT_SYMBOL_GPL(madera_pm_ops); const struct of_device_id madera_of_match[] = { + { .compatible = "cirrus,cs47l15", .data = (void *)CS47L15 }, { .compatible = "cirrus,cs47l35", .data = (void *)CS47L35 }, { .compatible = "cirrus,cs47l85", .data = (void *)CS47L85 }, { .compatible = "cirrus,cs47l90", .data = (void *)CS47L90 }, @@ -339,6 +365,10 @@ static void madera_set_micbias_info(struct madera *madera) * childbiases for each micbias. Unspecified values default to 0. */ switch (madera->type) { + case CS47L15: + madera->num_micbias = 1; + madera->num_childbias[0] = 3; + return; case CS47L35: madera->num_micbias = 2; madera->num_childbias[0] = 2; @@ -402,6 +432,7 @@ int madera_dev_init(struct madera *madera) * No devm_ because we need to control shutdown order of children. */ switch (madera->type) { + case CS47L15: case CS47L35: case CS47L90: case CS47L91: @@ -471,6 +502,19 @@ int madera_dev_init(struct madera *madera) } switch (hwid) { + case CS47L15_SILICON_ID: + if (IS_ENABLED(CONFIG_MFD_CS47L15)) { + switch (madera->type) { + case CS47L15: + patch_fn = &cs47l15_patch; + mfd_devs = cs47l15_devs; + n_devs = ARRAY_SIZE(cs47l15_devs); + break; + default: + break; + } + } + break; case CS47L35_SILICON_ID: if (IS_ENABLED(CONFIG_MFD_CS47L35)) { switch (madera->type) { diff --git a/drivers/mfd/madera-i2c.c b/drivers/mfd/madera-i2c.c index 05ae94be01d8..bd868459cedb 100644 --- a/drivers/mfd/madera-i2c.c +++ b/drivers/mfd/madera-i2c.c @@ -39,6 +39,12 @@ static int madera_i2c_probe(struct i2c_client *i2c, type = id->driver_data; switch (type) { + case CS47L15: + if (IS_ENABLED(CONFIG_MFD_CS47L15)) { + regmap_16bit_config = &cs47l15_16bit_i2c_regmap; + regmap_32bit_config = &cs47l15_32bit_i2c_regmap; + } + break; case CS47L35: if (IS_ENABLED(CONFIG_MFD_CS47L35)) { regmap_16bit_config = &cs47l35_16bit_i2c_regmap; @@ -113,6 +119,7 @@ static int madera_i2c_remove(struct i2c_client *i2c) } static const struct i2c_device_id madera_i2c_id[] = { + { "cs47l15", CS47L15 }, { "cs47l35", CS47L35 }, { "cs47l85", CS47L85 }, { "cs47l90", CS47L90 }, diff --git a/drivers/mfd/madera-spi.c b/drivers/mfd/madera-spi.c index 4c398b278bba..a36741b73c25 100644 --- a/drivers/mfd/madera-spi.c +++ b/drivers/mfd/madera-spi.c @@ -39,6 +39,12 @@ static int madera_spi_probe(struct spi_device *spi) type = id->driver_data; switch (type) { + case CS47L15: + if (IS_ENABLED(CONFIG_MFD_CS47L15)) { + regmap_16bit_config = &cs47l15_16bit_spi_regmap; + regmap_32bit_config = &cs47l15_32bit_spi_regmap; + } + break; case CS47L35: if (IS_ENABLED(CONFIG_MFD_CS47L35)) { regmap_16bit_config = &cs47l35_16bit_spi_regmap; @@ -112,6 +118,7 @@ static int madera_spi_remove(struct spi_device *spi) } static const struct spi_device_id madera_spi_ids[] = { + { "cs47l15", CS47L15 }, { "cs47l35", CS47L35 }, { "cs47l85", CS47L85 }, { "cs47l90", CS47L90 }, diff --git a/drivers/mfd/madera.h b/drivers/mfd/madera.h index 891b84efb9a7..ccc16f2a1288 100644 --- a/drivers/mfd/madera.h +++ b/drivers/mfd/madera.h @@ -24,6 +24,12 @@ int madera_dev_exit(struct madera *madera); const char *madera_name_from_type(enum madera_type type); +extern const struct regmap_config cs47l15_16bit_spi_regmap; +extern const struct regmap_config cs47l15_32bit_spi_regmap; +extern const struct regmap_config cs47l15_16bit_i2c_regmap; +extern const struct regmap_config cs47l15_32bit_i2c_regmap; +int cs47l15_patch(struct madera *madera); + extern const struct regmap_config cs47l35_16bit_spi_regmap; extern const struct regmap_config cs47l35_32bit_spi_regmap; extern const struct regmap_config cs47l35_16bit_i2c_regmap; diff --git a/include/linux/mfd/madera/core.h b/include/linux/mfd/madera/core.h index 4d5d51a9c8a6..98dd3cb5e84d 100644 --- a/include/linux/mfd/madera/core.h +++ b/include/linux/mfd/madera/core.h @@ -27,11 +27,13 @@ enum madera_type { CS47L90 = 3, CS47L91 = 4, WM1840 = 7, + CS47L15 = 8, }; #define MADERA_MAX_CORE_SUPPLIES 2 #define MADERA_MAX_GPIOS 40 +#define CS47L15_NUM_GPIOS 15 #define CS47L35_NUM_GPIOS 16 #define CS47L85_NUM_GPIOS 40 #define CS47L90_NUM_GPIOS 38 diff --git a/include/linux/mfd/madera/registers.h b/include/linux/mfd/madera/registers.h index 977e06101711..5b054d511c6a 100644 --- a/include/linux/mfd/madera/registers.h +++ b/include/linux/mfd/madera/registers.h @@ -244,6 +244,8 @@ #define MADERA_IN6R_CONTROL 0x33C #define MADERA_ADC_DIGITAL_VOLUME_6R 0x33D #define MADERA_DMIC6R_CONTROL 0x33E +#define CS47L15_ADC_INT_BIAS 0x3A8 +#define CS47L15_PGA_BIAS_SEL 0x3C4 #define MADERA_OUTPUT_ENABLES_1 0x400 #define MADERA_OUTPUT_STATUS_1 0x401 #define MADERA_RAW_OUTPUT_STATUS_1 0x406 @@ -1202,6 +1204,8 @@ #define MADERA_GPIO1_CTRL_2 0x1701 #define MADERA_GPIO2_CTRL_1 0x1702 #define MADERA_GPIO2_CTRL_2 0x1703 +#define MADERA_GPIO15_CTRL_1 0x171C +#define MADERA_GPIO15_CTRL_2 0x171D #define MADERA_GPIO16_CTRL_1 0x171E #define MADERA_GPIO16_CTRL_2 0x171F #define MADERA_GPIO38_CTRL_1 0x174A @@ -1232,6 +1236,7 @@ #define MADERA_IRQ2_CTRL 0x1A82 #define MADERA_INTERRUPT_RAW_STATUS_1 0x1AA0 #define MADERA_WSEQ_SEQUENCE_1 0x3000 +#define MADERA_WSEQ_SEQUENCE_225 0x31C0 #define MADERA_WSEQ_SEQUENCE_252 0x31F6 #define CS47L35_OTP_HPDET_CAL_1 0x31F8 #define CS47L35_OTP_HPDET_CAL_2 0x31FA From 297939901f382f16ab78a8073cdfb2a6279bb654 Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Thu, 30 May 2019 15:39:53 +0100 Subject: [PATCH 31/45] mfd: madera: Add Madera core support for CS47L92 This patch adds all the core support and defines for the Cirrus Logic CS42L92, CS47L92 and CS47L93 smart audio CODECs. Registers or fields are named MADERA_* if it is part of the common hardware platform and does not conflict with any other Madera codecs. It is named CS47L15_* if it is unique to CS47L15 and conflicts with definitions on other codecs. Signed-off-by: Stuart Henderson Signed-off-by: Richard Fitzgerald Signed-off-by: Charles Keepax Signed-off-by: Lee Jones --- drivers/mfd/Kconfig | 7 + drivers/mfd/Makefile | 3 + drivers/mfd/cs47l92-tables.c | 1948 ++++++++++++++++++++++++++ drivers/mfd/madera-core.c | 58 + drivers/mfd/madera-i2c.c | 11 + drivers/mfd/madera-spi.c | 11 + drivers/mfd/madera.h | 7 + include/linux/mfd/madera/core.h | 4 + include/linux/mfd/madera/registers.h | 195 +++ 9 files changed, 2244 insertions(+) create mode 100644 drivers/mfd/cs47l92-tables.c diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig index 86ae0a11f631..760100c7d5f9 100644 --- a/drivers/mfd/Kconfig +++ b/drivers/mfd/Kconfig @@ -288,6 +288,13 @@ config MFD_CS47L90 help Support for Cirrus Logic CS47L90 and CS47L91 Smart Codecs +config MFD_CS47L92 + bool "Cirrus Logic CS47L92/93" + select PINCTRL_CS47L92 + depends on MFD_MADERA + help + Support for Cirrus Logic CS42L92, CS47L92 and CS47L93 Smart Codecs + config MFD_ASIC3 bool "Compaq ASIC3" depends on GPIOLIB && ARM diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile index cc044f38af84..f026ada68f6a 100644 --- a/drivers/mfd/Makefile +++ b/drivers/mfd/Makefile @@ -87,6 +87,9 @@ endif ifeq ($(CONFIG_MFD_CS47L90),y) madera-objs += cs47l90-tables.o endif +ifeq ($(CONFIG_MFD_CS47L92),y) +madera-objs += cs47l92-tables.o +endif obj-$(CONFIG_MFD_MADERA) += madera.o obj-$(CONFIG_MFD_MADERA_I2C) += madera-i2c.o obj-$(CONFIG_MFD_MADERA_SPI) += madera-spi.o diff --git a/drivers/mfd/cs47l92-tables.c b/drivers/mfd/cs47l92-tables.c new file mode 100644 index 000000000000..3dc1fefe68f5 --- /dev/null +++ b/drivers/mfd/cs47l92-tables.c @@ -0,0 +1,1948 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Regmap tables for CS47L92 codec + * + * Copyright (C) 2016-2019 Cirrus Logic, Inc. and + * Cirrus Logic International Semiconductor Ltd. + * + * Author: Stuart Henderson + */ + +#include +#include +#include + +#include +#include + +#include "madera.h" + +static const struct reg_sequence cs47l92_reva_16_patch[] = { + { 0x3A2, 0x2C29 }, + { 0x3A3, 0x0E00 }, + { 0x281, 0x0000 }, + { 0x282, 0x0000 }, + { 0x4EA, 0x0100 }, + { 0x22B, 0x0000 }, + { 0x4A0, 0x0080 }, + { 0x4A1, 0x0000 }, + { 0x4A2, 0x0000 }, + { 0x180B, 0x033F }, + { 0x190B, 0x033F }, + { 0x442, 0x0304 }, + { 0x34C, 0x0003 }, + { 0x124, 0x0C49 }, + { 0x120, 0x0345 }, + { 0x120, 0x0305 }, + { 0x4FA, 0x5064 }, + { 0x1300, 0x050E }, + { 0x1302, 0x0101 }, + { 0x1380, 0x02E0 }, + { 0x1381, 0xF942 }, + { 0x1382, 0x04CE }, + { 0x1383, 0xFF06 }, + { 0x1390, 0x0304 }, + { 0x1391, 0xF8FF }, + { 0x1392, 0x04F3 }, + { 0x1393, 0xFF00 }, + { 0x13A0, 0x02E0 }, + { 0x13A1, 0xF942 }, + { 0x13A2, 0x04CE }, + { 0x13A3, 0xFF06 }, + { 0x13B0, 0x0304 }, + { 0x13B1, 0xF8FF }, + { 0x13B2, 0x04F3 }, + { 0x13B3, 0xFF00 }, + { 0x412, 0x0005 }, + { 0x41A, 0x0005 }, + { 0x422, 0x0005 }, +}; + +static const struct reg_sequence cs47l92_reva_32_patch[] = { + { 0x3030, 0x04A00C01 }, + { 0x3032, 0x0225F501 }, + { 0x3044, 0x04A00C00 }, + { 0x3046, 0x0225FF01 }, + { 0x3080, 0x04A00C01 }, + { 0x3082, 0x0226F501 }, + { 0x3094, 0x04A00C00 }, + { 0x3096, 0x0226FF01 }, + { 0x30D1, 0x04A10C01 }, + { 0x30D2, 0x0227F501 }, + { 0x30E4, 0x04A10C00 }, + { 0x30E6, 0x0227FF01 }, + { 0x3120, 0x04A10C01 }, + { 0x3122, 0x0228F501 }, + { 0x3134, 0x04A10C00 }, + { 0x3136, 0x0228FF01 }, + { 0x3170, 0x04A20C01 }, + { 0x3172, 0x022B0101 }, + { 0x3174, 0x0229F501 }, + { 0x3184, 0x04A20C00 }, + { 0x3186, 0x022B0100 }, + { 0x3188, 0x0229FF01 }, + { 0x31C0, 0x04A20C01 }, + { 0x31C2, 0x022B0001 }, + { 0x31C4, 0x022AF501 }, + { 0x31D4, 0x04A20C00 }, + { 0x31D6, 0x022B0000 }, + { 0x31D8, 0x022AFF01 }, +}; + +int cs47l92_patch(struct madera *madera) +{ + int ret; + + ret = regmap_register_patch(madera->regmap, + cs47l92_reva_16_patch, + ARRAY_SIZE(cs47l92_reva_16_patch)); + if (ret < 0) { + dev_err(madera->dev, + "Error in applying 16-bit patch: %d\n", ret); + return ret; + } + + ret = regmap_register_patch(madera->regmap_32bit, + cs47l92_reva_32_patch, + ARRAY_SIZE(cs47l92_reva_32_patch)); + if (ret < 0) { + dev_err(madera->dev, + "Error in applying 32-bit patch: %d\n", ret); + return ret; + } + + return 0; +} +EXPORT_SYMBOL_GPL(cs47l92_patch); + +static const struct reg_default cs47l92_reg_default[] = { + { 0x00000020, 0x0000 }, /* R32 (0x20) - Tone Generator 1 */ + { 0x00000021, 0x1000 }, /* R33 (0x21) - Tone Generator 2 */ + { 0x00000022, 0x0000 }, /* R34 (0x22) - Tone Generator 3 */ + { 0x00000023, 0x1000 }, /* R35 (0x23) - Tone Generator 4 */ + { 0x00000024, 0x0000 }, /* R36 (0x24) - Tone Generator 5 */ + { 0x00000030, 0x0000 }, /* R48 (0x30) - PWM Drive 1 */ + { 0x00000031, 0x0100 }, /* R49 (0x31) - PWM Drive 2 */ + { 0x00000032, 0x0100 }, /* R50 (0x32) - PWM Drive 3 */ + { 0x00000061, 0x01ff }, /* R97 (0x61) - Sample Rate Sequence Select 1 */ + { 0x00000062, 0x01ff }, /* R98 (0x62) - Sample Rate Sequence Select 2 */ + { 0x00000063, 0x01ff }, /* R99 (0x63) - Sample Rate Sequence Select 3 */ + { 0x00000064, 0x01ff }, /* R100 (0x64) - Sample Rate Sequence Select 4 */ + { 0x00000090, 0x0000 }, /* R144 (0x90) - Haptics Control 1 */ + { 0x00000091, 0x7fff }, /* R145 (0x91) - Haptics Control 2 */ + { 0x00000092, 0x0000 }, /* R146 (0x92) - Haptics Phase 1 Intensity */ + { 0x00000093, 0x0000 }, /* R147 (0x93) - Haptics Phase 1 Duration */ + { 0x00000094, 0x0000 }, /* R148 (0x94) - Haptics Phase 2 Intensity */ + { 0x00000095, 0x0000 }, /* R149 (0x95) - Haptics Phase 2 Duration */ + { 0x00000096, 0x0000 }, /* R150 (0x96) - Haptics Phase 3 Intensity */ + { 0x00000097, 0x0000 }, /* R151 (0x97) - Haptics Phase 3 Duration */ + { 0x000000a0, 0x0000 }, /* R160 (0xa0) - Comfort Noise Generator */ + { 0x00000100, 0x0002 }, /* R256 (0x100) - Clock 32k 1 */ + { 0x00000101, 0x0404 }, /* R257 (0x101) - System Clock 1 */ + { 0x00000102, 0x0011 }, /* R258 (0x102) - Sample Rate 1 */ + { 0x00000103, 0x0011 }, /* R259 (0x103) - Sample Rate 2 */ + { 0x00000104, 0x0011 }, /* R260 (0x104) - Sample Rate 3 */ + { 0x00000112, 0x0305 }, /* R274 (0x112) - Async Clock 1 */ + { 0x00000113, 0x0011 }, /* R275 (0x113) - Async Sample Rate 1 */ + { 0x00000114, 0x0011 }, /* R276 (0x114) - Async Sample Rate 2 */ + { 0x00000120, 0x0305 }, /* R288 (0x120) - DSP Clock 1 */ + { 0x00000122, 0x0000 }, /* R290 (0x122) - DSP Clock 2 */ + { 0x00000149, 0x0000 }, /* R329 (0x149) - Output System Clock */ + { 0x0000014a, 0x0000 }, /* R330 (0x14a) - Output Async Clock */ + { 0x00000152, 0x0000 }, /* R338 (0x152) - Rate Estimator 1 */ + { 0x00000153, 0x0000 }, /* R339 (0x153) - Rate Estimator 2 */ + { 0x00000154, 0x0000 }, /* R340 (0x154) - Rate Estimator 3 */ + { 0x00000155, 0x0000 }, /* R341 (0x155) - Rate Estimator 4 */ + { 0x00000156, 0x0000 }, /* R342 (0x156) - Rate Estimator 5 */ + { 0x00000171, 0x7004 }, /* R369 (0x171) - FLL1 Control 1 */ + { 0x00000172, 0x0004 }, /* R370 (0x172) - FLL1 Control 2 */ + { 0x00000173, 0x0000 }, /* R371 (0x173) - FLL1 Control 3 */ + { 0x00000174, 0x0000 }, /* R372 (0x174) - FLL1 Control 4 */ + { 0x00000175, 0x0001 }, /* R373 (0x175) - FLL1 Control 5 */ + { 0x00000176, 0x8000 }, /* R374 (0x176) - FLL1 Control 6 */ + { 0x00000177, 0x0680 }, /* R375 (0x177) - FLL1 Control 7 */ + { 0x00000178, 0x21f0 }, /* R376 (0x178) - FLL1 Control 8 */ + { 0x00000179, 0x0000 }, /* R377 (0x179) - FLL1 Control 9 */ + { 0x0000017a, 0x0000 }, /* R378 (0x17a) - FLL1 Control 10 */ + { 0x0000017b, 0x0011 }, /* R379 (0x17b) - FLL1 Control 11 */ + { 0x0000017d, 0x33e8 }, /* R381 (0x17d) - FLL1 Digital Test 1 */ + { 0x00000181, 0x7000 }, /* R385 (0x181) - FLL1 Synchroniser 1 */ + { 0x00000182, 0x0004 }, /* R386 (0x182) - FLL1 Synchroniser 2 */ + { 0x00000183, 0x0000 }, /* R387 (0x183) - FLL1 Synchroniser 3 */ + { 0x00000184, 0x0000 }, /* R388 (0x184) - FLL1 Synchroniser 4 */ + { 0x00000185, 0x0001 }, /* R389 (0x185) - FLL1 Synchroniser 5 */ + { 0x00000186, 0x0000 }, /* R390 (0x186) - FLL1 Synchroniser 6 */ + { 0x0000018e, 0x0c04 }, /* R398 (0x18e) - FLL1 GPIO Clock */ + { 0x00000191, 0x7000 }, /* R401 (0x191) - FLL2 Control 1 */ + { 0x00000192, 0x0004 }, /* R402 (0x192) - FLL2 Control 2 */ + { 0x00000193, 0x0000 }, /* R403 (0x193) - FLL2 Control 3 */ + { 0x00000194, 0x0000 }, /* R404 (0x194) - FLL2 Control 4 */ + { 0x00000195, 0x0001 }, /* R405 (0x195) - FLL2 Control 5 */ + { 0x00000196, 0x8000 }, /* R406 (0x196) - FLL2 Control 6 */ + { 0x00000197, 0x0680 }, /* R407 (0x197) - FLL2 Control 7 */ + { 0x00000198, 0x21f0 }, /* R408 (0x198) - FLL2 Control 8 */ + { 0x00000199, 0x0000 }, /* R409 (0x199) - FLL2 Control 9 */ + { 0x0000019a, 0x0000 }, /* R410 (0x19a) - FLL2 Control 10 */ + { 0x0000019b, 0x0011 }, /* R411 (0x19b) - FLL2 Control 11 */ + { 0x0000019d, 0x33e8 }, /* R413 (0x19d) - FLL2 Digital Test 1 */ + { 0x000001a1, 0x7000 }, /* R417 (0x1a1) - FLL2 Synchroniser 1 */ + { 0x000001a2, 0x0004 }, /* R418 (0x1a2) - FLL2 Synchroniser 2 */ + { 0x000001a3, 0x0000 }, /* R419 (0x1a3) - FLL2 Synchroniser 3 */ + { 0x000001a4, 0x0000 }, /* R420 (0x1a4) - FLL2 Synchroniser 4 */ + { 0x000001a5, 0x0001 }, /* R421 (0x1a5) - FLL2 Synchroniser 5 */ + { 0x000001a6, 0x0000 }, /* R422 (0x1a6) - FLL2 Synchroniser 6 */ + { 0x000001ae, 0x0c04 }, /* R430 (0x1ae) - FLL2 GPIO Clock */ + { 0x00000200, 0x0006 }, /* R512 (0x200) - Mic Charge Pump 1 */ + { 0x00000213, 0x03e4 }, /* R531 (0x213) - LDO2 Control 1 */ + { 0x00000218, 0x00e6 }, /* R536 (0x218) - Mic Bias Ctrl 1 */ + { 0x00000219, 0x00e6 }, /* R537 (0x219) - Mic Bias Ctrl 2 */ + { 0x0000021c, 0x2222 }, /* R540 (0x21c) - Mic Bias Ctrl 5 */ + { 0x0000021e, 0x0022 }, /* R542 (0x21e) - Mic Bias Ctrl 6 */ + { 0x00000293, 0x0080 }, /* R659 (0x293) - Accessory Detect Mode 1 */ + { 0x00000299, 0x0000 }, /* R665 (0x299) - Headphone Detect 0 */ + { 0x0000029b, 0x0000 }, /* R667 (0x29b) - Headphone Detect 1 */ + { 0x000002a2, 0x0010 }, /* R674 (0x2a2) - Mic Detect 1 Control 0 */ + { 0x000002a3, 0x1102 }, /* R675 (0x2a3) - Mic Detect 1 Control 1 */ + { 0x000002a4, 0x009f }, /* R676 (0x2a4) - Mic Detect 1 Control 2 */ + { 0x000002a6, 0x3d3d }, /* R678 (0x2a6) - Mic Detect 1 Level 1 */ + { 0x000002a7, 0x3d3d }, /* R679 (0x2a7) - Mic Detect 1 Level 2 */ + { 0x000002a8, 0x333d }, /* R680 (0x2a8) - Mic Detect 1 Level 3 */ + { 0x000002a9, 0x202d }, /* R681 (0x2a9) - Mic Detect 1 Level 4 */ + { 0x000002b2, 0x0010 }, /* R690 (0x2b2) - Mic Detect 2 Control 0 */ + { 0x000002b3, 0x1102 }, /* R691 (0x2b3) - Mic Detect 2 Control 1 */ + { 0x000002b4, 0x009f }, /* R692 (0x2b4) - Mic Detect 2 Control 2 */ + { 0x000002b6, 0x3d3d }, /* R694 (0x2b6) - Mic Detect 2 Level 1 */ + { 0x000002b7, 0x3d3d }, /* R695 (0x2b7) - Mic Detect 2 Level 2 */ + { 0x000002b8, 0x333d }, /* R696 (0x2b8) - Mic Detect 2 Level 3 */ + { 0x000002b9, 0x202d }, /* R697 (0x2b9) - Mic Detect 2 Level 4 */ + { 0x000002c6, 0x0210 }, /* R710 (0x2c6) - Micd Clamp control */ + { 0x000002c8, 0x0000 }, /* R712 (0x2c8) - GP Switch 1 */ + { 0x000002d3, 0x0000 }, /* R723 (0x2d3) - Jack Detect Analogue */ + { 0x00000300, 0x0000 }, /* R768 (0x300) - Input Enables */ + { 0x00000308, 0x0400 }, /* R776 (0x308) - Input Rate */ + { 0x00000309, 0x0022 }, /* R777 (0x309) - Input Volume Ramp */ + { 0x0000030c, 0x0002 }, /* R780 (0x30c) - HPF Control */ + { 0x00000310, 0x0080 }, /* R784 (0x310) - IN1L Control */ + { 0x00000311, 0x0180 }, /* R785 (0x311) - ADC Digital Volume 1L */ + { 0x00000312, 0x0500 }, /* R786 (0x312) - DMIC1L Control */ + { 0x00000313, 0x0000 }, /* R787 (0x313) - IN1L Rate Control */ + { 0x00000314, 0x0080 }, /* R788 (0x314) - IN1R Control */ + { 0x00000315, 0x0180 }, /* R789 (0x315) - ADC Digital Volume 1R */ + { 0x00000316, 0x0000 }, /* R790 (0x316) - DMIC1R Control */ + { 0x00000317, 0x0000 }, /* R791 (0x317) - IN1R Rate Control */ + { 0x00000318, 0x0080 }, /* R792 (0x318) - IN2L Control */ + { 0x00000319, 0x0180 }, /* R793 (0x319) - ADC Digital Volume 2L */ + { 0x0000031a, 0x0500 }, /* R794 (0x31a) - DMIC2L Control */ + { 0x0000031b, 0x0000 }, /* R795 (0x31b) - IN2L Rate Control */ + { 0x0000031c, 0x0080 }, /* R796 (0x31c) - IN2R Control */ + { 0x0000031d, 0x0180 }, /* R797 (0x31d) - ADC Digital Volume 2R */ + { 0x0000031e, 0x0000 }, /* R798 (0x31e) - DMIC2R Control */ + { 0x0000031f, 0x0000 }, /* R799 (0x31f) - IN2R Rate Control */ + { 0x00000320, 0x0000 }, /* R800 (0x320) - IN3L Control */ + { 0x00000321, 0x0180 }, /* R801 (0x321) - ADC Digital Volume 3L */ + { 0x00000322, 0x0500 }, /* R802 (0x322) - DMIC3L Control */ + { 0x00000323, 0x0000 }, /* R803 (0x323) - IN3L Rate Control */ + { 0x00000324, 0x0000 }, /* R804 (0x324) - IN3R Control */ + { 0x00000325, 0x0180 }, /* R805 (0x325) - ADC Digital Volume 3R */ + { 0x00000326, 0x0000 }, /* R806 (0x326) - DMIC3R Control */ + { 0x00000327, 0x0000 }, /* R807 (0x327) - IN3R Rate Control */ + { 0x00000328, 0x0000 }, /* R808 (0x328) - IN4L Control */ + { 0x00000329, 0x0180 }, /* R809 (0x329) - ADC Digital Volume 4L */ + { 0x0000032a, 0x0500 }, /* R810 (0x32a) - DMIC4L Control */ + { 0x0000032b, 0x0000 }, /* R811 (0x32b) - IN4L Rate Control */ + { 0x0000032c, 0x0000 }, /* R812 (0x32c) - IN4R Control */ + { 0x0000032d, 0x0180 }, /* R813 (0x32d) - ADC Digital Volume 4R */ + { 0x0000032e, 0x0000 }, /* R814 (0x32e) - DMIC4R Control */ + { 0x0000032f, 0x0000 }, /* R815 (0x32f) - IN4R Rate Control */ + { 0x00000400, 0x0000 }, /* R1024 (0x400) - Output Enables 1 */ + { 0x00000408, 0x0040 }, /* R1032 (0x408) - Output Rate 1 */ + { 0x00000409, 0x0022 }, /* R1033 (0x409) - Output Volume Ramp */ + { 0x00000410, 0x0080 }, /* R1040 (0x410) - Output Path Config 1L */ + { 0x00000411, 0x0180 }, /* R1041 (0x411) - DAC Digital Volume 1L */ + { 0x00000412, 0x0005 }, /* R1042 (0x412) - Output Path Config 1 */ + { 0x00000413, 0x0001 }, /* R1043 (0x413) - Noise Gate Select 1L */ + { 0x00000414, 0x0080 }, /* R1044 (0x414) - Output Path Config 1R */ + { 0x00000415, 0x0180 }, /* R1045 (0x415) - DAC Digital Volume 1R */ + { 0x00000417, 0x0002 }, /* R1047 (0x417) - Noise Gate Select 1R */ + { 0x00000418, 0x0080 }, /* R1048 (0x418) - Output Path Config 2L */ + { 0x00000419, 0x0180 }, /* R1049 (0x419) - DAC Digital Volume 2L */ + { 0x0000041a, 0x0005 }, /* R1050 (0x41a) - Output Path Config 2 */ + { 0x0000041b, 0x0004 }, /* R1051 (0x41b) - Noise Gate Select 2L */ + { 0x0000041c, 0x0080 }, /* R1052 (0x41c) - Output Path Config 2R */ + { 0x0000041d, 0x0180 }, /* R1053 (0x41d) - DAC Digital Volume 2R */ + { 0x0000041f, 0x0008 }, /* R1055 (0x41f) - Noise Gate Select 2R */ + { 0x00000420, 0x0080 }, /* R1056 (0x420) - Output Path Config 3L */ + { 0x00000421, 0x0180 }, /* R1057 (0x421) - DAC Digital Volume 3L */ + { 0x00000422, 0x0005 }, /* R1058 (0x422) - Output Path Config 3 */ + { 0x00000423, 0x0010 }, /* R1059 (0x423) - Noise Gate Select 3L */ + { 0x00000424, 0x0080 }, /* R1060 (0x424) - Output Path Config 3R */ + { 0x00000425, 0x0180 }, /* R1061 (0x425) - DAC Digital Volume 3R */ + { 0x00000427, 0x0020 }, /* R1063 (0x427) - Noise Gate Select 3R */ + { 0x00000430, 0x0000 }, /* R1072 (0x430) - Output Path Config 5L */ + { 0x00000431, 0x0180 }, /* R1073 (0x431) - DAC Digital Volume 5L */ + { 0x00000433, 0x0100 }, /* R1075 (0x433) - Noise Gate Select 5L */ + { 0x00000434, 0x0000 }, /* R1076 (0x434) - Output Path Config 5R */ + { 0x00000435, 0x0180 }, /* R1077 (0x435) - DAC Digital Volume 5R */ + { 0x00000437, 0x0200 }, /* R1079 (0x437) - Noise Gate Select 5R */ + { 0x00000450, 0x0000 }, /* R1104 (0x450) - DAC AEC Control 1 */ + { 0x00000451, 0x0000 }, /* R1105 (0x451) - DAC AEC Control 2 */ + { 0x00000458, 0x0000 }, /* R1112 (0x458) - Noise Gate Control */ + { 0x00000490, 0x0069 }, /* R1168 (0x490) - PDM SPK1 Ctrl 1 */ + { 0x00000491, 0x0000 }, /* R1169 (0x491) - PDM SPK1 Ctrl 2 */ + { 0x000004a0, 0x0080 }, /* R1184 (0x4a0) - HP1 Short Circuit Ctrl */ + { 0x000004a1, 0x0000 }, /* R1185 (0x4a1) - HP2 Short Circuit Ctrl */ + { 0x000004a2, 0x0000 }, /* R1186 (0x4a2) - HP3 Short Circuit Ctrl */ + { 0x00000500, 0x000c }, /* R1280 (0x500) - AIF1 BCLK Ctrl */ + { 0x00000501, 0x0000 }, /* R1281 (0x501) - AIF1 Tx Pin Ctrl */ + { 0x00000502, 0x0000 }, /* R1282 (0x502) - AIF1 Rx Pin Ctrl */ + { 0x00000503, 0x0000 }, /* R1283 (0x503) - AIF1 Rate Ctrl */ + { 0x00000504, 0x0000 }, /* R1284 (0x504) - AIF1 Format */ + { 0x00000506, 0x0040 }, /* R1286 (0x506) - AIF1 Rx BCLK Rate */ + { 0x00000507, 0x1818 }, /* R1287 (0x507) - AIF1 Frame Ctrl 1 */ + { 0x00000508, 0x1818 }, /* R1288 (0x508) - AIF1 Frame Ctrl 2 */ + { 0x00000509, 0x0000 }, /* R1289 (0x509) - AIF1 Frame Ctrl 3 */ + { 0x0000050a, 0x0001 }, /* R1290 (0x50a) - AIF1 Frame Ctrl 4 */ + { 0x0000050b, 0x0002 }, /* R1291 (0x50b) - AIF1 Frame Ctrl 5 */ + { 0x0000050c, 0x0003 }, /* R1292 (0x50c) - AIF1 Frame Ctrl 6 */ + { 0x0000050d, 0x0004 }, /* R1293 (0x50d) - AIF1 Frame Ctrl 7 */ + { 0x0000050e, 0x0005 }, /* R1294 (0x50e) - AIF1 Frame Ctrl 8 */ + { 0x0000050f, 0x0006 }, /* R1295 (0x50f) - AIF1 Frame Ctrl 9 */ + { 0x00000510, 0x0007 }, /* R1296 (0x510) - AIF1 Frame Ctrl 10 */ + { 0x00000511, 0x0000 }, /* R1297 (0x511) - AIF1 Frame Ctrl 11 */ + { 0x00000512, 0x0001 }, /* R1298 (0x512) - AIF1 Frame Ctrl 12 */ + { 0x00000513, 0x0002 }, /* R1299 (0x513) - AIF1 Frame Ctrl 13 */ + { 0x00000514, 0x0003 }, /* R1300 (0x514) - AIF1 Frame Ctrl 14 */ + { 0x00000515, 0x0004 }, /* R1301 (0x515) - AIF1 Frame Ctrl 15 */ + { 0x00000516, 0x0005 }, /* R1302 (0x516) - AIF1 Frame Ctrl 16 */ + { 0x00000517, 0x0006 }, /* R1303 (0x517) - AIF1 Frame Ctrl 17 */ + { 0x00000518, 0x0007 }, /* R1304 (0x518) - AIF1 Frame Ctrl 18 */ + { 0x00000519, 0x0000 }, /* R1305 (0x519) - AIF1 Tx Enables */ + { 0x0000051a, 0x0000 }, /* R1306 (0x51a) - AIF1 Rx Enables */ + { 0x00000540, 0x000c }, /* R1344 (0x540) - AIF2 BCLK Ctrl */ + { 0x00000541, 0x0000 }, /* R1345 (0x541) - AIF2 Tx Pin Ctrl */ + { 0x00000542, 0x0000 }, /* R1346 (0x542) - AIF2 Rx Pin Ctrl */ + { 0x00000543, 0x0000 }, /* R1347 (0x543) - AIF2 Rate Ctrl */ + { 0x00000544, 0x0000 }, /* R1348 (0x544) - AIF2 Format */ + { 0x00000546, 0x0040 }, /* R1350 (0x546) - AIF2 Rx BCLK Rate */ + { 0x00000547, 0x1818 }, /* R1351 (0x547) - AIF2 Frame Ctrl 1 */ + { 0x00000548, 0x1818 }, /* R1352 (0x548) - AIF2 Frame Ctrl 2 */ + { 0x00000549, 0x0000 }, /* R1353 (0x549) - AIF2 Frame Ctrl 3 */ + { 0x0000054a, 0x0001 }, /* R1354 (0x54a) - AIF2 Frame Ctrl 4 */ + { 0x0000054b, 0x0002 }, /* R1355 (0x54b) - AIF2 Frame Ctrl 5 */ + { 0x0000054c, 0x0003 }, /* R1356 (0x54c) - AIF2 Frame Ctrl 6 */ + { 0x0000054d, 0x0004 }, /* R1357 (0x54d) - AIF2 Frame Ctrl 7 */ + { 0x0000054e, 0x0005 }, /* R1358 (0x54e) - AIF2 Frame Ctrl 8 */ + { 0x0000054f, 0x0006 }, /* R1359 (0x54f) - AIF2 Frame Ctrl 9 */ + { 0x00000550, 0x0007 }, /* R1360 (0x550) - AIF2 Frame Ctrl 10 */ + { 0x00000551, 0x0000 }, /* R1361 (0x551) - AIF2 Frame Ctrl 11 */ + { 0x00000552, 0x0001 }, /* R1362 (0x552) - AIF2 Frame Ctrl 12 */ + { 0x00000553, 0x0002 }, /* R1363 (0x553) - AIF2 Frame Ctrl 13 */ + { 0x00000554, 0x0003 }, /* R1364 (0x554) - AIF2 Frame Ctrl 14 */ + { 0x00000555, 0x0004 }, /* R1365 (0x555) - AIF2 Frame Ctrl 15 */ + { 0x00000556, 0x0005 }, /* R1366 (0x556) - AIF2 Frame Ctrl 16 */ + { 0x00000557, 0x0006 }, /* R1367 (0x557) - AIF2 Frame Ctrl 17 */ + { 0x00000558, 0x0007 }, /* R1368 (0x558) - AIF2 Frame Ctrl 18 */ + { 0x00000559, 0x0000 }, /* R1369 (0x559) - AIF2 Tx Enables */ + { 0x0000055a, 0x0000 }, /* R1370 (0x55a) - AIF2 Rx Enables */ + { 0x00000580, 0x000c }, /* R1408 (0x580) - AIF3 BCLK Ctrl */ + { 0x00000581, 0x0000 }, /* R1409 (0x581) - AIF3 Tx Pin Ctrl */ + { 0x00000582, 0x0000 }, /* R1410 (0x582) - AIF3 Rx Pin Ctrl */ + { 0x00000583, 0x0000 }, /* R1411 (0x583) - AIF3 Rate Ctrl */ + { 0x00000584, 0x0000 }, /* R1412 (0x584) - AIF3 Format */ + { 0x00000586, 0x0040 }, /* R1414 (0x586) - AIF3 Rx BCLK Rate */ + { 0x00000587, 0x1818 }, /* R1415 (0x587) - AIF3 Frame Ctrl 1 */ + { 0x00000588, 0x1818 }, /* R1416 (0x588) - AIF3 Frame Ctrl 2 */ + { 0x00000589, 0x0000 }, /* R1417 (0x589) - AIF3 Frame Ctrl 3 */ + { 0x0000058a, 0x0001 }, /* R1418 (0x58a) - AIF3 Frame Ctrl 4 */ + { 0x0000058b, 0x0002 }, /* R1419 (0x58b) - AIF3 Frame Ctrl 5 */ + { 0x0000058c, 0x0003 }, /* R1420 (0x58c) - AIF3 Frame Ctrl 6 */ + { 0x0000058d, 0x0004 }, /* R1421 (0x58d) - AIF3 Frame Ctrl 7 */ + { 0x0000058e, 0x0005 }, /* R1422 (0x58e) - AIF3 Frame Ctrl 8 */ + { 0x0000058f, 0x0006 }, /* R1423 (0x58f) - AIF3 Frame Ctrl 9 */ + { 0x00000590, 0x0007 }, /* R1424 (0x590) - AIF3 Frame Ctrl 10 */ + { 0x00000591, 0x0000 }, /* R1425 (0x591) - AIF3 Frame Ctrl 11 */ + { 0x00000592, 0x0001 }, /* R1426 (0x592) - AIF3 Frame Ctrl 12 */ + { 0x00000593, 0x0002 }, /* R1427 (0x593) - AIF3 Frame Ctrl 13 */ + { 0x00000594, 0x0003 }, /* R1428 (0x594) - AIF3 Frame Ctrl 14 */ + { 0x00000595, 0x0004 }, /* R1429 (0x595) - AIF3 Frame Ctrl 15 */ + { 0x00000596, 0x0005 }, /* R1430 (0x596) - AIF3 Frame Ctrl 16 */ + { 0x00000597, 0x0006 }, /* R1431 (0x597) - AIF3 Frame Ctrl 17 */ + { 0x00000598, 0x0007 }, /* R1432 (0x598) - AIF3 Frame Ctrl 18 */ + { 0x00000599, 0x0000 }, /* R1433 (0x599) - AIF3 Tx Enables */ + { 0x0000059a, 0x0000 }, /* R1434 (0x59a) - AIF3 Rx Enables */ + { 0x000005c2, 0x0000 }, /* R1474 (0x5c2) - SPD1 Tx Control */ + { 0x000005e3, 0x0000 }, /* R1507 (0x5e3) - SLIMBus Framer Ref Gear */ + { 0x000005e5, 0x0000 }, /* R1509 (0x5e5) - SLIMBus Rates 1 */ + { 0x000005e6, 0x0000 }, /* R1510 (0x5e6) - SLIMBus Rates 2 */ + { 0x000005e7, 0x0000 }, /* R1511 (0x5e7) - SLIMBus Rates 3 */ + { 0x000005e8, 0x0000 }, /* R1512 (0x5e8) - SLIMBus Rates 4 */ + { 0x000005e9, 0x0000 }, /* R1513 (0x5e9) - SLIMBus Rates 5 */ + { 0x000005ea, 0x0000 }, /* R1514 (0x5ea) - SLIMBus Rates 6 */ + { 0x000005eb, 0x0000 }, /* R1515 (0x5eb) - SLIMBus Rates 7 */ + { 0x000005ec, 0x0000 }, /* R1516 (0x5ec) - SLIMBus Rates 8 */ + { 0x000005f5, 0x0000 }, /* R1525 (0x5f5) - SLIMBus RX Channel Enable */ + { 0x000005f6, 0x0000 }, /* R1526 (0x5f6) - SLIMBus TX Channel Enable */ + { 0x00000640, 0x0000 }, /* R1600 (0x640) - PWM1MIX Input 1 Source */ + { 0x00000641, 0x0080 }, /* R1601 (0x641) - PWM1MIX Input 1 Volume */ + { 0x00000642, 0x0000 }, /* R1602 (0x642) - PWM1MIX Input 2 Source */ + { 0x00000643, 0x0080 }, /* R1603 (0x643) - PWM1MIX Input 2 Volume */ + { 0x00000644, 0x0000 }, /* R1604 (0x644) - PWM1MIX Input 3 Source */ + { 0x00000645, 0x0080 }, /* R1605 (0x645) - PWM1MIX Input 3 Volume */ + { 0x00000646, 0x0000 }, /* R1606 (0x646) - PWM1MIX Input 4 Source */ + { 0x00000647, 0x0080 }, /* R1607 (0x647) - PWM1MIX Input 4 Volume */ + { 0x00000648, 0x0000 }, /* R1608 (0x648) - PWM2MIX Input 1 Source */ + { 0x00000649, 0x0080 }, /* R1609 (0x649) - PWM2MIX Input 1 Volume */ + { 0x0000064a, 0x0000 }, /* R1610 (0x64a) - PWM2MIX Input 2 Source */ + { 0x0000064b, 0x0080 }, /* R1611 (0x64b) - PWM2MIX Input 2 Volume */ + { 0x0000064c, 0x0000 }, /* R1612 (0x64c) - PWM2MIX Input 3 Source */ + { 0x0000064d, 0x0080 }, /* R1613 (0x64d) - PWM2MIX Input 3 Volume */ + { 0x0000064e, 0x0000 }, /* R1614 (0x64e) - PWM2MIX Input 4 Source */ + { 0x0000064f, 0x0080 }, /* R1615 (0x64f) - PWM2MIX Input 4 Volume */ + { 0x00000680, 0x0000 }, /* R1664 (0x680) - OUT1LMIX Input 1 Source */ + { 0x00000681, 0x0080 }, /* R1665 (0x681) - OUT1LMIX Input 1 Volume */ + { 0x00000682, 0x0000 }, /* R1666 (0x682) - OUT1LMIX Input 2 Source */ + { 0x00000683, 0x0080 }, /* R1667 (0x683) - OUT1LMIX Input 2 Volume */ + { 0x00000684, 0x0000 }, /* R1668 (0x684) - OUT1LMIX Input 3 Source */ + { 0x00000685, 0x0080 }, /* R1669 (0x685) - OUT1LMIX Input 3 Volume */ + { 0x00000686, 0x0000 }, /* R1670 (0x686) - OUT1LMIX Input 4 Source */ + { 0x00000687, 0x0080 }, /* R1671 (0x687) - OUT1LMIX Input 4 Volume */ + { 0x00000688, 0x0000 }, /* R1672 (0x688) - OUT1RMIX Input 1 Source */ + { 0x00000689, 0x0080 }, /* R1673 (0x689) - OUT1RMIX Input 1 Volume */ + { 0x0000068a, 0x0000 }, /* R1674 (0x68a) - OUT1RMIX Input 2 Source */ + { 0x0000068b, 0x0080 }, /* R1675 (0x68b) - OUT1RMIX Input 2 Volume */ + { 0x0000068c, 0x0000 }, /* R1676 (0x68c) - OUT1RMIX Input 3 Source */ + { 0x0000068d, 0x0080 }, /* R1677 (0x68d) - OUT1RMIX Input 3 Volume */ + { 0x0000068e, 0x0000 }, /* R1678 (0x68e) - OUT1RMIX Input 4 Source */ + { 0x0000068f, 0x0080 }, /* R1679 (0x68f) - OUT1RMIX Input 4 Volume */ + { 0x00000690, 0x0000 }, /* R1680 (0x690) - OUT2LMIX Input 1 Source */ + { 0x00000691, 0x0080 }, /* R1681 (0x691) - OUT2LMIX Input 1 Volume */ + { 0x00000692, 0x0000 }, /* R1682 (0x692) - OUT2LMIX Input 2 Source */ + { 0x00000693, 0x0080 }, /* R1683 (0x693) - OUT2LMIX Input 2 Volume */ + { 0x00000694, 0x0000 }, /* R1684 (0x694) - OUT2LMIX Input 3 Source */ + { 0x00000695, 0x0080 }, /* R1685 (0x695) - OUT2LMIX Input 3 Volume */ + { 0x00000696, 0x0000 }, /* R1686 (0x696) - OUT2LMIX Input 4 Source */ + { 0x00000697, 0x0080 }, /* R1687 (0x697) - OUT2LMIX Input 4 Volume */ + { 0x00000698, 0x0000 }, /* R1688 (0x698) - OUT2RMIX Input 1 Source */ + { 0x00000699, 0x0080 }, /* R1689 (0x699) - OUT2RMIX Input 1 Volume */ + { 0x0000069a, 0x0000 }, /* R1690 (0x69a) - OUT2RMIX Input 2 Source */ + { 0x0000069b, 0x0080 }, /* R1691 (0x69b) - OUT2RMIX Input 2 Volume */ + { 0x0000069c, 0x0000 }, /* R1692 (0x69c) - OUT2RMIX Input 3 Source */ + { 0x0000069d, 0x0080 }, /* R1693 (0x69d) - OUT2RMIX Input 3 Volume */ + { 0x0000069e, 0x0000 }, /* R1694 (0x69e) - OUT2RMIX Input 4 Source */ + { 0x0000069f, 0x0080 }, /* R1695 (0x69f) - OUT2RMIX Input 4 Volume */ + { 0x000006a0, 0x0000 }, /* R1696 (0x6a0) - OUT3LMIX Input 1 Source */ + { 0x000006a1, 0x0080 }, /* R1697 (0x6a1) - OUT3LMIX Input 1 Volume */ + { 0x000006a2, 0x0000 }, /* R1698 (0x6a2) - OUT3LMIX Input 2 Source */ + { 0x000006a3, 0x0080 }, /* R1699 (0x6a3) - OUT3LMIX Input 2 Volume */ + { 0x000006a4, 0x0000 }, /* R1700 (0x6a4) - OUT3LMIX Input 3 Source */ + { 0x000006a5, 0x0080 }, /* R1701 (0x6a5) - OUT3LMIX Input 3 Volume */ + { 0x000006a6, 0x0000 }, /* R1702 (0x6a6) - OUT3LMIX Input 4 Source */ + { 0x000006a7, 0x0080 }, /* R1703 (0x6a7) - OUT3LMIX Input 4 Volume */ + { 0x000006a8, 0x0000 }, /* R1704 (0x6a8) - OUT3RMIX Input 1 Source */ + { 0x000006a9, 0x0080 }, /* R1705 (0x6a9) - OUT3RMIX Input 1 Volume */ + { 0x000006aa, 0x0000 }, /* R1706 (0x6aa) - OUT3RMIX Input 2 Source */ + { 0x000006ab, 0x0080 }, /* R1707 (0x6ab) - OUT3RMIX Input 2 Volume */ + { 0x000006ac, 0x0000 }, /* R1708 (0x6ac) - OUT3RMIX Input 3 Source */ + { 0x000006ad, 0x0080 }, /* R1709 (0x6ad) - OUT3RMIX Input 3 Volume */ + { 0x000006ae, 0x0000 }, /* R1710 (0x6ae) - OUT3RMIX Input 4 Source */ + { 0x000006af, 0x0080 }, /* R1711 (0x6af) - OUT3RMIX Input 4 Volume */ + { 0x000006c0, 0x0000 }, /* R1728 (0x6c0) - OUT5LMIX Input 1 Source */ + { 0x000006c1, 0x0080 }, /* R1729 (0x6c1) - OUT5LMIX Input 1 Volume */ + { 0x000006c2, 0x0000 }, /* R1730 (0x6c2) - OUT5LMIX Input 2 Source */ + { 0x000006c3, 0x0080 }, /* R1731 (0x6c3) - OUT5LMIX Input 2 Volume */ + { 0x000006c4, 0x0000 }, /* R1732 (0x6c4) - OUT5LMIX Input 3 Source */ + { 0x000006c5, 0x0080 }, /* R1733 (0x6c5) - OUT5LMIX Input 3 Volume */ + { 0x000006c6, 0x0000 }, /* R1734 (0x6c6) - OUT5LMIX Input 4 Source */ + { 0x000006c7, 0x0080 }, /* R1735 (0x6c7) - OUT5LMIX Input 4 Volume */ + { 0x000006c8, 0x0000 }, /* R1736 (0x6c8) - OUT5RMIX Input 1 Source */ + { 0x000006c9, 0x0080 }, /* R1737 (0x6c9) - OUT5RMIX Input 1 Volume */ + { 0x000006ca, 0x0000 }, /* R1738 (0x6ca) - OUT5RMIX Input 2 Source */ + { 0x000006cb, 0x0080 }, /* R1739 (0x6cb) - OUT5RMIX Input 2 Volume */ + { 0x000006cc, 0x0000 }, /* R1740 (0x6cc) - OUT5RMIX Input 3 Source */ + { 0x000006cd, 0x0080 }, /* R1741 (0x6cd) - OUT5RMIX Input 3 Volume */ + { 0x000006ce, 0x0000 }, /* R1742 (0x6ce) - OUT5RMIX Input 4 Source */ + { 0x000006cf, 0x0080 }, /* R1743 (0x6cf) - OUT5RMIX Input 4 Volume */ + { 0x00000700, 0x0000 }, /* R1792 (0x700) - AIF1TX1MIX Input 1 Source */ + { 0x00000701, 0x0080 }, /* R1793 (0x701) - AIF1TX1MIX Input 1 Volume */ + { 0x00000702, 0x0000 }, /* R1794 (0x702) - AIF1TX1MIX Input 2 Source */ + { 0x00000703, 0x0080 }, /* R1795 (0x703) - AIF1TX1MIX Input 2 Volume */ + { 0x00000704, 0x0000 }, /* R1796 (0x704) - AIF1TX1MIX Input 3 Source */ + { 0x00000705, 0x0080 }, /* R1797 (0x705) - AIF1TX1MIX Input 3 Volume */ + { 0x00000706, 0x0000 }, /* R1798 (0x706) - AIF1TX1MIX Input 4 Source */ + { 0x00000707, 0x0080 }, /* R1799 (0x707) - AIF1TX1MIX Input 4 Volume */ + { 0x00000708, 0x0000 }, /* R1800 (0x708) - AIF1TX2MIX Input 1 Source */ + { 0x00000709, 0x0080 }, /* R1801 (0x709) - AIF1TX2MIX Input 1 Volume */ + { 0x0000070a, 0x0000 }, /* R1802 (0x70a) - AIF1TX2MIX Input 2 Source */ + { 0x0000070b, 0x0080 }, /* R1803 (0x70b) - AIF1TX2MIX Input 2 Volume */ + { 0x0000070c, 0x0000 }, /* R1804 (0x70c) - AIF1TX2MIX Input 3 Source */ + { 0x0000070d, 0x0080 }, /* R1805 (0x70d) - AIF1TX2MIX Input 3 Volume */ + { 0x0000070e, 0x0000 }, /* R1806 (0x70e) - AIF1TX2MIX Input 4 Source */ + { 0x0000070f, 0x0080 }, /* R1807 (0x70f) - AIF1TX2MIX Input 4 Volume */ + { 0x00000710, 0x0000 }, /* R1808 (0x710) - AIF1TX3MIX Input 1 Source */ + { 0x00000711, 0x0080 }, /* R1809 (0x711) - AIF1TX3MIX Input 1 Volume */ + { 0x00000712, 0x0000 }, /* R1810 (0x712) - AIF1TX3MIX Input 2 Source */ + { 0x00000713, 0x0080 }, /* R1811 (0x713) - AIF1TX3MIX Input 2 Volume */ + { 0x00000714, 0x0000 }, /* R1812 (0x714) - AIF1TX3MIX Input 3 Source */ + { 0x00000715, 0x0080 }, /* R1813 (0x715) - AIF1TX3MIX Input 3 Volume */ + { 0x00000716, 0x0000 }, /* R1814 (0x716) - AIF1TX3MIX Input 4 Source */ + { 0x00000717, 0x0080 }, /* R1815 (0x717) - AIF1TX3MIX Input 4 Volume */ + { 0x00000718, 0x0000 }, /* R1816 (0x718) - AIF1TX4MIX Input 1 Source */ + { 0x00000719, 0x0080 }, /* R1817 (0x719) - AIF1TX4MIX Input 1 Volume */ + { 0x0000071a, 0x0000 }, /* R1818 (0x71a) - AIF1TX4MIX Input 2 Source */ + { 0x0000071b, 0x0080 }, /* R1819 (0x71b) - AIF1TX4MIX Input 2 Volume */ + { 0x0000071c, 0x0000 }, /* R1820 (0x71c) - AIF1TX4MIX Input 3 Source */ + { 0x0000071d, 0x0080 }, /* R1821 (0x71d) - AIF1TX4MIX Input 3 Volume */ + { 0x0000071e, 0x0000 }, /* R1822 (0x71e) - AIF1TX4MIX Input 4 Source */ + { 0x0000071f, 0x0080 }, /* R1823 (0x71f) - AIF1TX4MIX Input 4 Volume */ + { 0x00000720, 0x0000 }, /* R1824 (0x720) - AIF1TX5MIX Input 1 Source */ + { 0x00000721, 0x0080 }, /* R1825 (0x721) - AIF1TX5MIX Input 1 Volume */ + { 0x00000722, 0x0000 }, /* R1826 (0x722) - AIF1TX5MIX Input 2 Source */ + { 0x00000723, 0x0080 }, /* R1827 (0x723) - AIF1TX5MIX Input 2 Volume */ + { 0x00000724, 0x0000 }, /* R1828 (0x724) - AIF1TX5MIX Input 3 Source */ + { 0x00000725, 0x0080 }, /* R1829 (0x725) - AIF1TX5MIX Input 3 Volume */ + { 0x00000726, 0x0000 }, /* R1830 (0x726) - AIF1TX5MIX Input 4 Source */ + { 0x00000727, 0x0080 }, /* R1831 (0x727) - AIF1TX5MIX Input 4 Volume */ + { 0x00000728, 0x0000 }, /* R1832 (0x728) - AIF1TX6MIX Input 1 Source */ + { 0x00000729, 0x0080 }, /* R1833 (0x729) - AIF1TX6MIX Input 1 Volume */ + { 0x0000072a, 0x0000 }, /* R1834 (0x72a) - AIF1TX6MIX Input 2 Source */ + { 0x0000072b, 0x0080 }, /* R1835 (0x72b) - AIF1TX6MIX Input 2 Volume */ + { 0x0000072c, 0x0000 }, /* R1836 (0x72c) - AIF1TX6MIX Input 3 Source */ + { 0x0000072d, 0x0080 }, /* R1837 (0x72d) - AIF1TX6MIX Input 3 Volume */ + { 0x0000072e, 0x0000 }, /* R1838 (0x72e) - AIF1TX6MIX Input 4 Source */ + { 0x0000072f, 0x0080 }, /* R1839 (0x72f) - AIF1TX6MIX Input 4 Volume */ + { 0x00000730, 0x0000 }, /* R1840 (0x730) - AIF1TX7MIX Input 1 Source */ + { 0x00000731, 0x0080 }, /* R1841 (0x731) - AIF1TX7MIX Input 1 Volume */ + { 0x00000732, 0x0000 }, /* R1842 (0x732) - AIF1TX7MIX Input 2 Source */ + { 0x00000733, 0x0080 }, /* R1843 (0x733) - AIF1TX7MIX Input 2 Volume */ + { 0x00000734, 0x0000 }, /* R1844 (0x734) - AIF1TX7MIX Input 3 Source */ + { 0x00000735, 0x0080 }, /* R1845 (0x735) - AIF1TX7MIX Input 3 Volume */ + { 0x00000736, 0x0000 }, /* R1846 (0x736) - AIF1TX7MIX Input 4 Source */ + { 0x00000737, 0x0080 }, /* R1847 (0x737) - AIF1TX7MIX Input 4 Volume */ + { 0x00000738, 0x0000 }, /* R1848 (0x738) - AIF1TX8MIX Input 1 Source */ + { 0x00000739, 0x0080 }, /* R1849 (0x739) - AIF1TX8MIX Input 1 Volume */ + { 0x0000073a, 0x0000 }, /* R1850 (0x73a) - AIF1TX8MIX Input 2 Source */ + { 0x0000073b, 0x0080 }, /* R1851 (0x73b) - AIF1TX8MIX Input 2 Volume */ + { 0x0000073c, 0x0000 }, /* R1852 (0x73c) - AIF1TX8MIX Input 3 Source */ + { 0x0000073d, 0x0080 }, /* R1853 (0x73d) - AIF1TX8MIX Input 3 Volume */ + { 0x0000073e, 0x0000 }, /* R1854 (0x73e) - AIF1TX8MIX Input 4 Source */ + { 0x0000073f, 0x0080 }, /* R1855 (0x73f) - AIF1TX8MIX Input 4 Volume */ + { 0x00000740, 0x0000 }, /* R1856 (0x740) - AIF2TX1MIX Input 1 Source */ + { 0x00000741, 0x0080 }, /* R1857 (0x741) - AIF2TX1MIX Input 1 Volume */ + { 0x00000742, 0x0000 }, /* R1858 (0x742) - AIF2TX1MIX Input 2 Source */ + { 0x00000743, 0x0080 }, /* R1859 (0x743) - AIF2TX1MIX Input 2 Volume */ + { 0x00000744, 0x0000 }, /* R1860 (0x744) - AIF2TX1MIX Input 3 Source */ + { 0x00000745, 0x0080 }, /* R1861 (0x745) - AIF2TX1MIX Input 3 Volume */ + { 0x00000746, 0x0000 }, /* R1862 (0x746) - AIF2TX1MIX Input 4 Source */ + { 0x00000747, 0x0080 }, /* R1863 (0x747) - AIF2TX1MIX Input 4 Volume */ + { 0x00000748, 0x0000 }, /* R1864 (0x748) - AIF2TX2MIX Input 1 Source */ + { 0x00000749, 0x0080 }, /* R1865 (0x749) - AIF2TX2MIX Input 1 Volume */ + { 0x0000074a, 0x0000 }, /* R1866 (0x74a) - AIF2TX2MIX Input 2 Source */ + { 0x0000074b, 0x0080 }, /* R1867 (0x74b) - AIF2TX2MIX Input 2 Volume */ + { 0x0000074c, 0x0000 }, /* R1868 (0x74c) - AIF2TX2MIX Input 3 Source */ + { 0x0000074d, 0x0080 }, /* R1869 (0x74d) - AIF2TX2MIX Input 3 Volume */ + { 0x0000074e, 0x0000 }, /* R1870 (0x74e) - AIF2TX2MIX Input 4 Source */ + { 0x0000074f, 0x0080 }, /* R1871 (0x74f) - AIF2TX2MIX Input 4 Volume */ + { 0x00000750, 0x0000 }, /* R1872 (0x750) - AIF2TX3MIX Input 1 Source */ + { 0x00000751, 0x0080 }, /* R1873 (0x751) - AIF2TX3MIX Input 1 Volume */ + { 0x00000752, 0x0000 }, /* R1874 (0x752) - AIF2TX3MIX Input 2 Source */ + { 0x00000753, 0x0080 }, /* R1875 (0x753) - AIF2TX3MIX Input 2 Volume */ + { 0x00000754, 0x0000 }, /* R1876 (0x754) - AIF2TX3MIX Input 3 Source */ + { 0x00000755, 0x0080 }, /* R1877 (0x755) - AIF2TX3MIX Input 3 Volume */ + { 0x00000756, 0x0000 }, /* R1878 (0x756) - AIF2TX3MIX Input 4 Source */ + { 0x00000757, 0x0080 }, /* R1879 (0x757) - AIF2TX3MIX Input 4 Volume */ + { 0x00000758, 0x0000 }, /* R1880 (0x758) - AIF2TX4MIX Input 1 Source */ + { 0x00000759, 0x0080 }, /* R1881 (0x759) - AIF2TX4MIX Input 1 Volume */ + { 0x0000075a, 0x0000 }, /* R1882 (0x75a) - AIF2TX4MIX Input 2 Source */ + { 0x0000075b, 0x0080 }, /* R1883 (0x75b) - AIF2TX4MIX Input 2 Volume */ + { 0x0000075c, 0x0000 }, /* R1884 (0x75c) - AIF2TX4MIX Input 3 Source */ + { 0x0000075d, 0x0080 }, /* R1885 (0x75d) - AIF2TX4MIX Input 3 Volume */ + { 0x0000075e, 0x0000 }, /* R1886 (0x75e) - AIF2TX4MIX Input 4 Source */ + { 0x0000075f, 0x0080 }, /* R1887 (0x75f) - AIF2TX4MIX Input 4 Volume */ + { 0x00000760, 0x0000 }, /* R1888 (0x760) - AIF2TX5MIX Input 1 Source */ + { 0x00000761, 0x0080 }, /* R1889 (0x761) - AIF2TX5MIX Input 1 Volume */ + { 0x00000762, 0x0000 }, /* R1890 (0x762) - AIF2TX5MIX Input 2 Source */ + { 0x00000763, 0x0080 }, /* R1891 (0x763) - AIF2TX5MIX Input 2 Volume */ + { 0x00000764, 0x0000 }, /* R1892 (0x764) - AIF2TX5MIX Input 3 Source */ + { 0x00000765, 0x0080 }, /* R1893 (0x765) - AIF2TX5MIX Input 3 Volume */ + { 0x00000766, 0x0000 }, /* R1894 (0x766) - AIF2TX5MIX Input 4 Source */ + { 0x00000767, 0x0080 }, /* R1895 (0x767) - AIF2TX5MIX Input 4 Volume */ + { 0x00000768, 0x0000 }, /* R1896 (0x768) - AIF2TX6MIX Input 1 Source */ + { 0x00000769, 0x0080 }, /* R1897 (0x769) - AIF2TX6MIX Input 1 Volume */ + { 0x0000076a, 0x0000 }, /* R1898 (0x76a) - AIF2TX6MIX Input 2 Source */ + { 0x0000076b, 0x0080 }, /* R1899 (0x76b) - AIF2TX6MIX Input 2 Volume */ + { 0x0000076c, 0x0000 }, /* R1900 (0x76c) - AIF2TX6MIX Input 3 Source */ + { 0x0000076d, 0x0080 }, /* R1901 (0x76d) - AIF2TX6MIX Input 3 Volume */ + { 0x0000076e, 0x0000 }, /* R1902 (0x76e) - AIF2TX6MIX Input 4 Source */ + { 0x0000076f, 0x0080 }, /* R1903 (0x76f) - AIF2TX6MIX Input 4 Volume */ + { 0x00000770, 0x0000 }, /* R1904 (0x770) - AIF2TX7MIX Input 1 Source */ + { 0x00000771, 0x0080 }, /* R1905 (0x771) - AIF2TX7MIX Input 1 Volume */ + { 0x00000772, 0x0000 }, /* R1906 (0x772) - AIF2TX7MIX Input 2 Source */ + { 0x00000773, 0x0080 }, /* R1907 (0x773) - AIF2TX7MIX Input 2 Volume */ + { 0x00000774, 0x0000 }, /* R1908 (0x774) - AIF2TX7MIX Input 3 Source */ + { 0x00000775, 0x0080 }, /* R1909 (0x775) - AIF2TX7MIX Input 3 Volume */ + { 0x00000776, 0x0000 }, /* R1910 (0x776) - AIF2TX7MIX Input 4 Source */ + { 0x00000777, 0x0080 }, /* R1911 (0x777) - AIF2TX7MIX Input 4 Volume */ + { 0x00000778, 0x0000 }, /* R1912 (0x778) - AIF2TX8MIX Input 1 Source */ + { 0x00000779, 0x0080 }, /* R1913 (0x779) - AIF2TX8MIX Input 1 Volume */ + { 0x0000077a, 0x0000 }, /* R1914 (0x77a) - AIF2TX8MIX Input 2 Source */ + { 0x0000077b, 0x0080 }, /* R1915 (0x77b) - AIF2TX8MIX Input 2 Volume */ + { 0x0000077c, 0x0000 }, /* R1916 (0x77c) - AIF2TX8MIX Input 3 Source */ + { 0x0000077d, 0x0080 }, /* R1917 (0x77d) - AIF2TX8MIX Input 3 Volume */ + { 0x0000077e, 0x0000 }, /* R1918 (0x77e) - AIF2TX8MIX Input 4 Source */ + { 0x0000077f, 0x0080 }, /* R1919 (0x77f) - AIF2TX8MIX Input 4 Volume */ + { 0x00000780, 0x0000 }, /* R1920 (0x780) - AIF3TX1MIX Input 1 Source */ + { 0x00000781, 0x0080 }, /* R1921 (0x781) - AIF3TX1MIX Input 1 Volume */ + { 0x00000782, 0x0000 }, /* R1922 (0x782) - AIF3TX1MIX Input 2 Source */ + { 0x00000783, 0x0080 }, /* R1923 (0x783) - AIF3TX1MIX Input 2 Volume */ + { 0x00000784, 0x0000 }, /* R1924 (0x784) - AIF3TX1MIX Input 3 Source */ + { 0x00000785, 0x0080 }, /* R1925 (0x785) - AIF3TX1MIX Input 3 Volume */ + { 0x00000786, 0x0000 }, /* R1926 (0x786) - AIF3TX1MIX Input 4 Source */ + { 0x00000787, 0x0080 }, /* R1927 (0x787) - AIF3TX1MIX Input 4 Volume */ + { 0x00000788, 0x0000 }, /* R1928 (0x788) - AIF3TX2MIX Input 1 Source */ + { 0x00000789, 0x0080 }, /* R1929 (0x789) - AIF3TX2MIX Input 1 Volume */ + { 0x0000078a, 0x0000 }, /* R1930 (0x78a) - AIF3TX2MIX Input 2 Source */ + { 0x0000078b, 0x0080 }, /* R1931 (0x78b) - AIF3TX2MIX Input 2 Volume */ + { 0x0000078c, 0x0000 }, /* R1932 (0x78c) - AIF3TX2MIX Input 3 Source */ + { 0x0000078d, 0x0080 }, /* R1933 (0x78d) - AIF3TX2MIX Input 3 Volume */ + { 0x0000078e, 0x0000 }, /* R1934 (0x78e) - AIF3TX2MIX Input 4 Source */ + { 0x0000078f, 0x0080 }, /* R1935 (0x78f) - AIF3TX2MIX Input 4 Volume */ + { 0x00000790, 0x0000 }, /* R1936 (0x790) - AIF3TX3MIX Input 1 Source */ + { 0x00000791, 0x0080 }, /* R1937 (0x791) - AIF3TX3MIX Input 1 Volume */ + { 0x00000792, 0x0000 }, /* R1938 (0x792) - AIF3TX3MIX Input 2 Source */ + { 0x00000793, 0x0080 }, /* R1939 (0x793) - AIF3TX3MIX Input 2 Volume */ + { 0x00000794, 0x0000 }, /* R1940 (0x794) - AIF3TX3MIX Input 3 Source */ + { 0x00000795, 0x0080 }, /* R1941 (0x795) - AIF3TX3MIX Input 3 Volume */ + { 0x00000796, 0x0000 }, /* R1942 (0x796) - AIF3TX3MIX Input 4 Source */ + { 0x00000797, 0x0080 }, /* R1943 (0x797) - AIF3TX3MIX Input 4 Volume */ + { 0x00000798, 0x0000 }, /* R1944 (0x798) - AIF3TX4MIX Input 1 Source */ + { 0x00000799, 0x0080 }, /* R1945 (0x799) - AIF3TX4MIX Input 1 Volume */ + { 0x0000079a, 0x0000 }, /* R1946 (0x79a) - AIF3TX4MIX Input 2 Source */ + { 0x0000079b, 0x0080 }, /* R1947 (0x79b) - AIF3TX4MIX Input 2 Volume */ + { 0x0000079c, 0x0000 }, /* R1948 (0x79c) - AIF3TX4MIX Input 3 Source */ + { 0x0000079d, 0x0080 }, /* R1949 (0x79d) - AIF3TX4MIX Input 3 Volume */ + { 0x0000079e, 0x0000 }, /* R1950 (0x79e) - AIF3TX4MIX Input 4 Source */ + { 0x0000079f, 0x0080 }, /* R1951 (0x79f) - AIF3TX4MIX Input 4 Volume */ + { 0x000007a0, 0x0000 }, /* R1952 (0x7a0) - AIF3TX5MIX Input 1 Source */ + { 0x000007a1, 0x0080 }, /* R1953 (0x7a1) - AIF3TX5MIX Input 1 Volume */ + { 0x000007a2, 0x0000 }, /* R1954 (0x7a2) - AIF3TX5MIX Input 2 Source */ + { 0x000007a3, 0x0080 }, /* R1955 (0x7a3) - AIF3TX5MIX Input 2 Volume */ + { 0x000007a4, 0x0000 }, /* R1956 (0x7a4) - AIF3TX5MIX Input 3 Source */ + { 0x000007a5, 0x0080 }, /* R1957 (0x7a5) - AIF3TX5MIX Input 3 Volume */ + { 0x000007a6, 0x0000 }, /* R1958 (0x7a6) - AIF3TX5MIX Input 4 Source */ + { 0x000007a7, 0x0080 }, /* R1959 (0x7a7) - AIF3TX5MIX Input 4 Volume */ + { 0x000007a8, 0x0000 }, /* R1960 (0x7a8) - AIF3TX6MIX Input 1 Source */ + { 0x000007a9, 0x0080 }, /* R1961 (0x7a9) - AIF3TX6MIX Input 1 Volume */ + { 0x000007aa, 0x0000 }, /* R1962 (0x7aa) - AIF3TX6MIX Input 2 Source */ + { 0x000007ab, 0x0080 }, /* R1963 (0x7ab) - AIF3TX6MIX Input 2 Volume */ + { 0x000007ac, 0x0000 }, /* R1964 (0x7ac) - AIF3TX6MIX Input 3 Source */ + { 0x000007ad, 0x0080 }, /* R1965 (0x7ad) - AIF3TX6MIX Input 3 Volume */ + { 0x000007ae, 0x0000 }, /* R1966 (0x7ae) - AIF3TX6MIX Input 4 Source */ + { 0x000007af, 0x0080 }, /* R1967 (0x7af) - AIF3TX6MIX Input 4 Volume */ + { 0x000007b0, 0x0000 }, /* R1968 (0x7b0) - AIF3TX7MIX Input 1 Source */ + { 0x000007b1, 0x0080 }, /* R1969 (0x7b1) - AIF3TX7MIX Input 1 Volume */ + { 0x000007b2, 0x0000 }, /* R1970 (0x7b2) - AIF3TX7MIX Input 2 Source */ + { 0x000007b3, 0x0080 }, /* R1971 (0x7b3) - AIF3TX7MIX Input 2 Volume */ + { 0x000007b4, 0x0000 }, /* R1972 (0x7b4) - AIF3TX7MIX Input 3 Source */ + { 0x000007b5, 0x0080 }, /* R1973 (0x7b5) - AIF3TX7MIX Input 3 Volume */ + { 0x000007b6, 0x0000 }, /* R1974 (0x7b6) - AIF3TX7MIX Input 4 Source */ + { 0x000007b7, 0x0080 }, /* R1975 (0x7b7) - AIF3TX7MIX Input 4 Volume */ + { 0x000007b8, 0x0000 }, /* R1976 (0x7b8) - AIF3TX8MIX Input 1 Source */ + { 0x000007b9, 0x0080 }, /* R1977 (0x7b9) - AIF3TX8MIX Input 1 Volume */ + { 0x000007ba, 0x0000 }, /* R1978 (0x7ba) - AIF3TX8MIX Input 2 Source */ + { 0x000007bb, 0x0080 }, /* R1979 (0x7bb) - AIF3TX8MIX Input 2 Volume */ + { 0x000007bc, 0x0000 }, /* R1980 (0x7bc) - AIF3TX8MIX Input 3 Source */ + { 0x000007bd, 0x0080 }, /* R1981 (0x7bd) - AIF3TX8MIX Input 3 Volume */ + { 0x000007be, 0x0000 }, /* R1982 (0x7be) - AIF3TX8MIX Input 4 Source */ + { 0x000007bf, 0x0080 }, /* R1983 (0x7bf) - AIF3TX8MIX Input 4 Volume */ + { 0x000007c0, 0x0000 }, /* R1984 (0x7c0) - SLIMTX1MIX Input 1 Source */ + { 0x000007c1, 0x0080 }, /* R1985 (0x7c1) - SLIMTX1MIX Input 1 Volume */ + { 0x000007c2, 0x0000 }, /* R1986 (0x7c2) - SLIMTX1MIX Input 2 Source */ + { 0x000007c3, 0x0080 }, /* R1987 (0x7c3) - SLIMTX1MIX Input 2 Volume */ + { 0x000007c4, 0x0000 }, /* R1988 (0x7c4) - SLIMTX1MIX Input 3 Source */ + { 0x000007c5, 0x0080 }, /* R1989 (0x7c5) - SLIMTX1MIX Input 3 Volume */ + { 0x000007c6, 0x0000 }, /* R1990 (0x7c6) - SLIMTX1MIX Input 4 Source */ + { 0x000007c7, 0x0080 }, /* R1991 (0x7c7) - SLIMTX1MIX Input 4 Volume */ + { 0x000007c8, 0x0000 }, /* R1992 (0x7c8) - SLIMTX2MIX Input 1 Source */ + { 0x000007c9, 0x0080 }, /* R1993 (0x7c9) - SLIMTX2MIX Input 1 Volume */ + { 0x000007ca, 0x0000 }, /* R1994 (0x7ca) - SLIMTX2MIX Input 2 Source */ + { 0x000007cb, 0x0080 }, /* R1995 (0x7cb) - SLIMTX2MIX Input 2 Volume */ + { 0x000007cc, 0x0000 }, /* R1996 (0x7cc) - SLIMTX2MIX Input 3 Source */ + { 0x000007cd, 0x0080 }, /* R1997 (0x7cd) - SLIMTX2MIX Input 3 Volume */ + { 0x000007ce, 0x0000 }, /* R1998 (0x7ce) - SLIMTX2MIX Input 4 Source */ + { 0x000007cf, 0x0080 }, /* R1999 (0x7cf) - SLIMTX2MIX Input 4 Volume */ + { 0x000007d0, 0x0000 }, /* R2000 (0x7d0) - SLIMTX3MIX Input 1 Source */ + { 0x000007d1, 0x0080 }, /* R2001 (0x7d1) - SLIMTX3MIX Input 1 Volume */ + { 0x000007d2, 0x0000 }, /* R2002 (0x7d2) - SLIMTX3MIX Input 2 Source */ + { 0x000007d3, 0x0080 }, /* R2003 (0x7d3) - SLIMTX3MIX Input 2 Volume */ + { 0x000007d4, 0x0000 }, /* R2004 (0x7d4) - SLIMTX3MIX Input 3 Source */ + { 0x000007d5, 0x0080 }, /* R2005 (0x7d5) - SLIMTX3MIX Input 3 Volume */ + { 0x000007d6, 0x0000 }, /* R2006 (0x7d6) - SLIMTX3MIX Input 4 Source */ + { 0x000007d7, 0x0080 }, /* R2007 (0x7d7) - SLIMTX3MIX Input 4 Volume */ + { 0x000007d8, 0x0000 }, /* R2008 (0x7d8) - SLIMTX4MIX Input 1 Source */ + { 0x000007d9, 0x0080 }, /* R2009 (0x7d9) - SLIMTX4MIX Input 1 Volume */ + { 0x000007da, 0x0000 }, /* R2010 (0x7da) - SLIMTX4MIX Input 2 Source */ + { 0x000007db, 0x0080 }, /* R2011 (0x7db) - SLIMTX4MIX Input 2 Volume */ + { 0x000007dc, 0x0000 }, /* R2012 (0x7dc) - SLIMTX4MIX Input 3 Source */ + { 0x000007dd, 0x0080 }, /* R2013 (0x7dd) - SLIMTX4MIX Input 3 Volume */ + { 0x000007de, 0x0000 }, /* R2014 (0x7de) - SLIMTX4MIX Input 4 Source */ + { 0x000007df, 0x0080 }, /* R2015 (0x7df) - SLIMTX4MIX Input 4 Volume */ + { 0x000007e0, 0x0000 }, /* R2016 (0x7e0) - SLIMTX5MIX Input 1 Source */ + { 0x000007e1, 0x0080 }, /* R2017 (0x7e1) - SLIMTX5MIX Input 1 Volume */ + { 0x000007e2, 0x0000 }, /* R2018 (0x7e2) - SLIMTX5MIX Input 2 Source */ + { 0x000007e3, 0x0080 }, /* R2019 (0x7e3) - SLIMTX5MIX Input 2 Volume */ + { 0x000007e4, 0x0000 }, /* R2020 (0x7e4) - SLIMTX5MIX Input 3 Source */ + { 0x000007e5, 0x0080 }, /* R2021 (0x7e5) - SLIMTX5MIX Input 3 Volume */ + { 0x000007e6, 0x0000 }, /* R2022 (0x7e6) - SLIMTX5MIX Input 4 Source */ + { 0x000007e7, 0x0080 }, /* R2023 (0x7e7) - SLIMTX5MIX Input 4 Volume */ + { 0x000007e8, 0x0000 }, /* R2024 (0x7e8) - SLIMTX6MIX Input 1 Source */ + { 0x000007e9, 0x0080 }, /* R2025 (0x7e9) - SLIMTX6MIX Input 1 Volume */ + { 0x000007ea, 0x0000 }, /* R2026 (0x7ea) - SLIMTX6MIX Input 2 Source */ + { 0x000007eb, 0x0080 }, /* R2027 (0x7eb) - SLIMTX6MIX Input 2 Volume */ + { 0x000007ec, 0x0000 }, /* R2028 (0x7ec) - SLIMTX6MIX Input 3 Source */ + { 0x000007ed, 0x0080 }, /* R2029 (0x7ed) - SLIMTX6MIX Input 3 Volume */ + { 0x000007ee, 0x0000 }, /* R2030 (0x7ee) - SLIMTX6MIX Input 4 Source */ + { 0x000007ef, 0x0080 }, /* R2031 (0x7ef) - SLIMTX6MIX Input 4 Volume */ + { 0x000007f0, 0x0000 }, /* R2032 (0x7f0) - SLIMTX7MIX Input 1 Source */ + { 0x000007f1, 0x0080 }, /* R2033 (0x7f1) - SLIMTX7MIX Input 1 Volume */ + { 0x000007f2, 0x0000 }, /* R2034 (0x7f2) - SLIMTX7MIX Input 2 Source */ + { 0x000007f3, 0x0080 }, /* R2035 (0x7f3) - SLIMTX7MIX Input 2 Volume */ + { 0x000007f4, 0x0000 }, /* R2036 (0x7f4) - SLIMTX7MIX Input 3 Source */ + { 0x000007f5, 0x0080 }, /* R2037 (0x7f5) - SLIMTX7MIX Input 3 Volume */ + { 0x000007f6, 0x0000 }, /* R2038 (0x7f6) - SLIMTX7MIX Input 4 Source */ + { 0x000007f7, 0x0080 }, /* R2039 (0x7f7) - SLIMTX7MIX Input 4 Volume */ + { 0x000007f8, 0x0000 }, /* R2040 (0x7f8) - SLIMTX8MIX Input 1 Source */ + { 0x000007f9, 0x0080 }, /* R2041 (0x7f9) - SLIMTX8MIX Input 1 Volume */ + { 0x000007fa, 0x0000 }, /* R2042 (0x7fa) - SLIMTX8MIX Input 2 Source */ + { 0x000007fb, 0x0080 }, /* R2043 (0x7fb) - SLIMTX8MIX Input 2 Volume */ + { 0x000007fc, 0x0000 }, /* R2044 (0x7fc) - SLIMTX8MIX Input 3 Source */ + { 0x000007fd, 0x0080 }, /* R2045 (0x7fd) - SLIMTX8MIX Input 3 Volume */ + { 0x000007fe, 0x0000 }, /* R2046 (0x7fe) - SLIMTX8MIX Input 4 Source */ + { 0x000007ff, 0x0080 }, /* R2047 (0x7ff) - SLIMTX8MIX Input 4 Volume */ + { 0x00000800, 0x0000 }, /* R2048 (0x800) - SPDIF1TX1MIX Input 1 Source */ + { 0x00000801, 0x0080 }, /* R2049 (0x801) - SPDIF1TX1MIX Input 1 Volume */ + { 0x00000808, 0x0000 }, /* R2056 (0x808) - SPDIF1TX2MIX Input 1 Source */ + { 0x00000809, 0x0080 }, /* R2057 (0x809) - SPDIF1TX2MIX Input 1 Volume */ + { 0x00000880, 0x0000 }, /* R2176 (0x880) - EQ1MIX Input 1 Source */ + { 0x00000881, 0x0080 }, /* R2177 (0x881) - EQ1MIX Input 1 Volume */ + { 0x00000882, 0x0000 }, /* R2178 (0x882) - EQ1MIX Input 2 Source */ + { 0x00000883, 0x0080 }, /* R2179 (0x883) - EQ1MIX Input 2 Volume */ + { 0x00000884, 0x0000 }, /* R2180 (0x884) - EQ1MIX Input 3 Source */ + { 0x00000885, 0x0080 }, /* R2181 (0x885) - EQ1MIX Input 3 Volume */ + { 0x00000886, 0x0000 }, /* R2182 (0x886) - EQ1MIX Input 4 Source */ + { 0x00000887, 0x0080 }, /* R2183 (0x887) - EQ1MIX Input 4 Volume */ + { 0x00000888, 0x0000 }, /* R2184 (0x888) - EQ2MIX Input 1 Source */ + { 0x00000889, 0x0080 }, /* R2185 (0x889) - EQ2MIX Input 1 Volume */ + { 0x0000088a, 0x0000 }, /* R2186 (0x88a) - EQ2MIX Input 2 Source */ + { 0x0000088b, 0x0080 }, /* R2187 (0x88b) - EQ2MIX Input 2 Volume */ + { 0x0000088c, 0x0000 }, /* R2188 (0x88c) - EQ2MIX Input 3 Source */ + { 0x0000088d, 0x0080 }, /* R2189 (0x88d) - EQ2MIX Input 3 Volume */ + { 0x0000088e, 0x0000 }, /* R2190 (0x88e) - EQ2MIX Input 4 Source */ + { 0x0000088f, 0x0080 }, /* R2191 (0x88f) - EQ2MIX Input 4 Volume */ + { 0x00000890, 0x0000 }, /* R2192 (0x890) - EQ3MIX Input 1 Source */ + { 0x00000891, 0x0080 }, /* R2193 (0x891) - EQ3MIX Input 1 Volume */ + { 0x00000892, 0x0000 }, /* R2194 (0x892) - EQ3MIX Input 2 Source */ + { 0x00000893, 0x0080 }, /* R2195 (0x893) - EQ3MIX Input 2 Volume */ + { 0x00000894, 0x0000 }, /* R2196 (0x894) - EQ3MIX Input 3 Source */ + { 0x00000895, 0x0080 }, /* R2197 (0x895) - EQ3MIX Input 3 Volume */ + { 0x00000896, 0x0000 }, /* R2198 (0x896) - EQ3MIX Input 4 Source */ + { 0x00000897, 0x0080 }, /* R2199 (0x897) - EQ3MIX Input 4 Volume */ + { 0x00000898, 0x0000 }, /* R2200 (0x898) - EQ4MIX Input 1 Source */ + { 0x00000899, 0x0080 }, /* R2201 (0x899) - EQ4MIX Input 1 Volume */ + { 0x0000089a, 0x0000 }, /* R2202 (0x89a) - EQ4MIX Input 2 Source */ + { 0x0000089b, 0x0080 }, /* R2203 (0x89b) - EQ4MIX Input 2 Volume */ + { 0x0000089c, 0x0000 }, /* R2204 (0x89c) - EQ4MIX Input 3 Source */ + { 0x0000089d, 0x0080 }, /* R2205 (0x89d) - EQ4MIX Input 3 Volume */ + { 0x0000089e, 0x0000 }, /* R2206 (0x89e) - EQ4MIX Input 4 Source */ + { 0x0000089f, 0x0080 }, /* R2207 (0x89f) - EQ4MIX Input 4 Volume */ + { 0x000008c0, 0x0000 }, /* R2240 (0x8c0) - DRC1LMIX Input 1 Source */ + { 0x000008c1, 0x0080 }, /* R2241 (0x8c1) - DRC1LMIX Input 1 Volume */ + { 0x000008c2, 0x0000 }, /* R2242 (0x8c2) - DRC1LMIX Input 2 Source */ + { 0x000008c3, 0x0080 }, /* R2243 (0x8c3) - DRC1LMIX Input 2 Volume */ + { 0x000008c4, 0x0000 }, /* R2244 (0x8c4) - DRC1LMIX Input 3 Source */ + { 0x000008c5, 0x0080 }, /* R2245 (0x8c5) - DRC1LMIX Input 3 Volume */ + { 0x000008c6, 0x0000 }, /* R2246 (0x8c6) - DRC1LMIX Input 4 Source */ + { 0x000008c7, 0x0080 }, /* R2247 (0x8c7) - DRC1LMIX Input 4 Volume */ + { 0x000008c8, 0x0000 }, /* R2248 (0x8c8) - DRC1RMIX Input 1 Source */ + { 0x000008c9, 0x0080 }, /* R2249 (0x8c9) - DRC1RMIX Input 1 Volume */ + { 0x000008ca, 0x0000 }, /* R2250 (0x8ca) - DRC1RMIX Input 2 Source */ + { 0x000008cb, 0x0080 }, /* R2251 (0x8cb) - DRC1RMIX Input 2 Volume */ + { 0x000008cc, 0x0000 }, /* R2252 (0x8cc) - DRC1RMIX Input 3 Source */ + { 0x000008cd, 0x0080 }, /* R2253 (0x8cd) - DRC1RMIX Input 3 Volume */ + { 0x000008ce, 0x0000 }, /* R2254 (0x8ce) - DRC1RMIX Input 4 Source */ + { 0x000008cf, 0x0080 }, /* R2255 (0x8cf) - DRC1RMIX Input 4 Volume */ + { 0x000008d0, 0x0000 }, /* R2256 (0x8d0) - DRC2LMIX Input 1 Source */ + { 0x000008d1, 0x0080 }, /* R2257 (0x8d1) - DRC2LMIX Input 1 Volume */ + { 0x000008d2, 0x0000 }, /* R2258 (0x8d2) - DRC2LMIX Input 2 Source */ + { 0x000008d3, 0x0080 }, /* R2259 (0x8d3) - DRC2LMIX Input 2 Volume */ + { 0x000008d4, 0x0000 }, /* R2260 (0x8d4) - DRC2LMIX Input 3 Source */ + { 0x000008d5, 0x0080 }, /* R2261 (0x8d5) - DRC2LMIX Input 3 Volume */ + { 0x000008d6, 0x0000 }, /* R2262 (0x8d6) - DRC2LMIX Input 4 Source */ + { 0x000008d7, 0x0080 }, /* R2263 (0x8d7) - DRC2LMIX Input 4 Volume */ + { 0x000008d8, 0x0000 }, /* R2264 (0x8d8) - DRC2RMIX Input 1 Source */ + { 0x000008d9, 0x0080 }, /* R2265 (0x8d9) - DRC2RMIX Input 1 Volume */ + { 0x000008da, 0x0000 }, /* R2266 (0x8da) - DRC2RMIX Input 2 Source */ + { 0x000008db, 0x0080 }, /* R2267 (0x8db) - DRC2RMIX Input 2 Volume */ + { 0x000008dc, 0x0000 }, /* R2268 (0x8dc) - DRC2RMIX Input 3 Source */ + { 0x000008dd, 0x0080 }, /* R2269 (0x8dd) - DRC2RMIX Input 3 Volume */ + { 0x000008de, 0x0000 }, /* R2270 (0x8de) - DRC2RMIX Input 4 Source */ + { 0x000008df, 0x0080 }, /* R2271 (0x8df) - DRC2RMIX Input 4 Volume */ + { 0x00000900, 0x0000 }, /* R2304 (0x900) - HPLP1MIX Input 1 Source */ + { 0x00000901, 0x0080 }, /* R2305 (0x901) - HPLP1MIX Input 1 Volume */ + { 0x00000902, 0x0000 }, /* R2306 (0x902) - HPLP1MIX Input 2 Source */ + { 0x00000903, 0x0080 }, /* R2307 (0x903) - HPLP1MIX Input 2 Volume */ + { 0x00000904, 0x0000 }, /* R2308 (0x904) - HPLP1MIX Input 3 Source */ + { 0x00000905, 0x0080 }, /* R2309 (0x905) - HPLP1MIX Input 3 Volume */ + { 0x00000906, 0x0000 }, /* R2310 (0x906) - HPLP1MIX Input 4 Source */ + { 0x00000907, 0x0080 }, /* R2311 (0x907) - HPLP1MIX Input 4 Volume */ + { 0x00000908, 0x0000 }, /* R2312 (0x908) - HPLP2MIX Input 1 Source */ + { 0x00000909, 0x0080 }, /* R2313 (0x909) - HPLP2MIX Input 1 Volume */ + { 0x0000090a, 0x0000 }, /* R2314 (0x90a) - HPLP2MIX Input 2 Source */ + { 0x0000090b, 0x0080 }, /* R2315 (0x90b) - HPLP2MIX Input 2 Volume */ + { 0x0000090c, 0x0000 }, /* R2316 (0x90c) - HPLP2MIX Input 3 Source */ + { 0x0000090d, 0x0080 }, /* R2317 (0x90d) - HPLP2MIX Input 3 Volume */ + { 0x0000090e, 0x0000 }, /* R2318 (0x90e) - HPLP2MIX Input 4 Source */ + { 0x0000090f, 0x0080 }, /* R2319 (0x90f) - HPLP2MIX Input 4 Volume */ + { 0x00000910, 0x0000 }, /* R2320 (0x910) - HPLP3MIX Input 1 Source */ + { 0x00000911, 0x0080 }, /* R2321 (0x911) - HPLP3MIX Input 1 Volume */ + { 0x00000912, 0x0000 }, /* R2322 (0x912) - HPLP3MIX Input 2 Source */ + { 0x00000913, 0x0080 }, /* R2323 (0x913) - HPLP3MIX Input 2 Volume */ + { 0x00000914, 0x0000 }, /* R2324 (0x914) - HPLP3MIX Input 3 Source */ + { 0x00000915, 0x0080 }, /* R2325 (0x915) - HPLP3MIX Input 3 Volume */ + { 0x00000916, 0x0000 }, /* R2326 (0x916) - HPLP3MIX Input 4 Source */ + { 0x00000917, 0x0080 }, /* R2327 (0x917) - HPLP3MIX Input 4 Volume */ + { 0x00000918, 0x0000 }, /* R2328 (0x918) - HPLP4MIX Input 1 Source */ + { 0x00000919, 0x0080 }, /* R2329 (0x919) - HPLP4MIX Input 1 Volume */ + { 0x0000091a, 0x0000 }, /* R2330 (0x91a) - HPLP4MIX Input 2 Source */ + { 0x0000091b, 0x0080 }, /* R2331 (0x91b) - HPLP4MIX Input 2 Volume */ + { 0x0000091c, 0x0000 }, /* R2332 (0x91c) - HPLP4MIX Input 3 Source */ + { 0x0000091d, 0x0080 }, /* R2333 (0x91d) - HPLP4MIX Input 3 Volume */ + { 0x0000091e, 0x0000 }, /* R2334 (0x91e) - HPLP4MIX Input 4 Source */ + { 0x0000091f, 0x0080 }, /* R2335 (0x91f) - HPLP4MIX Input 4 Volume */ + { 0x00000940, 0x0000 }, /* R2368 (0x940) - DSP1LMIX Input 1 Source */ + { 0x00000941, 0x0080 }, /* R2369 (0x941) - DSP1LMIX Input 1 Volume */ + { 0x00000942, 0x0000 }, /* R2370 (0x942) - DSP1LMIX Input 2 Source */ + { 0x00000943, 0x0080 }, /* R2371 (0x943) - DSP1LMIX Input 2 Volume */ + { 0x00000944, 0x0000 }, /* R2372 (0x944) - DSP1LMIX Input 3 Source */ + { 0x00000945, 0x0080 }, /* R2373 (0x945) - DSP1LMIX Input 3 Volume */ + { 0x00000946, 0x0000 }, /* R2374 (0x946) - DSP1LMIX Input 4 Source */ + { 0x00000947, 0x0080 }, /* R2375 (0x947) - DSP1LMIX Input 4 Volume */ + { 0x00000948, 0x0000 }, /* R2376 (0x948) - DSP1RMIX Input 1 Source */ + { 0x00000949, 0x0080 }, /* R2377 (0x949) - DSP1RMIX Input 1 Volume */ + { 0x0000094a, 0x0000 }, /* R2378 (0x94a) - DSP1RMIX Input 2 Source */ + { 0x0000094b, 0x0080 }, /* R2379 (0x94b) - DSP1RMIX Input 2 Volume */ + { 0x0000094c, 0x0000 }, /* R2380 (0x94c) - DSP1RMIX Input 3 Source */ + { 0x0000094d, 0x0080 }, /* R2381 (0x94d) - DSP1RMIX Input 3 Volume */ + { 0x0000094e, 0x0000 }, /* R2382 (0x94e) - DSP1RMIX Input 4 Source */ + { 0x0000094f, 0x0080 }, /* R2383 (0x94f) - DSP1RMIX Input 4 Volume */ + { 0x00000950, 0x0000 }, /* R2384 (0x950) - DSP1AUX1MIX Input 1 Source */ + { 0x00000958, 0x0000 }, /* R2392 (0x958) - DSP1AUX2MIX Input 1 Source */ + { 0x00000960, 0x0000 }, /* R2400 (0x960) - DSP1AUX3MIX Input 1 Source */ + { 0x00000968, 0x0000 }, /* R2408 (0x968) - DSP1AUX4MIX Input 1 Source */ + { 0x00000970, 0x0000 }, /* R2416 (0x970) - DSP1AUX5MIX Input 1 Source */ + { 0x00000978, 0x0000 }, /* R2424 (0x978) - DSP1AUX6MIX Input 1 Source */ + { 0x00000a80, 0x0000 }, /* R2688 (0xa80) - ASRC1 1LMIX Input 1 Source */ + { 0x00000a88, 0x0000 }, /* R2696 (0xa88) - ASRC1 1RMIX Input 1 Source */ + { 0x00000a90, 0x0000 }, /* R2704 (0xa90) - ASRC1 2LMIX Input 1 Source */ + { 0x00000a98, 0x0000 }, /* R2712 (0xa98) - ASRC1 2RMIX Input 1 Source */ + { 0x00000b00, 0x0000 }, /* R2816 (0xb00) - ISRC1DEC1MIX Input 1 Source */ + { 0x00000b08, 0x0000 }, /* R2824 (0xb08) - ISRC1DEC2MIX Input 1 Source */ + { 0x00000b20, 0x0000 }, /* R2848 (0xb20) - ISRC1INT1MIX Input 1 Source */ + { 0x00000b28, 0x0000 }, /* R2856 (0xb28) - ISRC1INT2MIX Input 1 Source */ + { 0x00000b40, 0x0000 }, /* R2880 (0xb40) - ISRC2DEC1MIX Input 1 Source */ + { 0x00000b48, 0x0000 }, /* R2888 (0xb48) - ISRC2DEC2MIX Input 1 Source */ + { 0x00000b60, 0x0000 }, /* R2912 (0xb60) - ISRC2INT1MIX Input 1 Source */ + { 0x00000b68, 0x0000 }, /* R2920 (0xb68) - ISRC2INT2MIX Input 1 Source */ + { 0x00000dc0, 0x0000 }, /* R3520 (0xdc0) - DFC1MIX Input 1 Source */ + { 0x00000dc8, 0x0000 }, /* R3528 (0xdc8) - DFC2MIX Input 1 Source */ + { 0x00000dd0, 0x0000 }, /* R3536 (0xdd0) - DFC3MIX Input 1 Source */ + { 0x00000dd8, 0x0000 }, /* R3544 (0xdd8) - DFC4MIX Input 1 Source */ + { 0x00000de0, 0x0000 }, /* R3552 (0xde0) - DFC5MIX Input 1 Source */ + { 0x00000de8, 0x0000 }, /* R3560 (0xde8) - DFC6MIX Input 1 Source */ + { 0x00000df0, 0x0000 }, /* R3568 (0xdf0) - DFC7MIX Input 1 Source */ + { 0x00000df8, 0x0000 }, /* R3576 (0xdf8) - DFC8MIX Input 1 Source */ + { 0x00000e00, 0x0000 }, /* R3584 (0xe00) - FX Ctrl 1 */ + { 0x00000e10, 0x6318 }, /* R3600 (0xe10) - EQ1 1 */ + { 0x00000e11, 0x6300 }, /* R3601 (0xe11) - EQ1 2 */ + { 0x00000e12, 0x0fc8 }, /* R3602 (0xe12) - EQ1 3 */ + { 0x00000e13, 0x03fe }, /* R3603 (0xe13) - EQ1 4 */ + { 0x00000e14, 0x00e0 }, /* R3604 (0xe14) - EQ1 5 */ + { 0x00000e15, 0x1ec4 }, /* R3605 (0xe15) - EQ1 6 */ + { 0x00000e16, 0xf136 }, /* R3606 (0xe16) - EQ1 7 */ + { 0x00000e17, 0x0409 }, /* R3607 (0xe17) - EQ1 8 */ + { 0x00000e18, 0x04cc }, /* R3608 (0xe18) - EQ1 9 */ + { 0x00000e19, 0x1c9b }, /* R3609 (0xe19) - EQ1 10 */ + { 0x00000e1a, 0xf337 }, /* R3610 (0xe1a) - EQ1 11 */ + { 0x00000e1b, 0x040b }, /* R3611 (0xe1b) - EQ1 12 */ + { 0x00000e1c, 0x0cbb }, /* R3612 (0xe1c) - EQ1 13 */ + { 0x00000e1d, 0x16f8 }, /* R3613 (0xe1d) - EQ1 14 */ + { 0x00000e1e, 0xf7d9 }, /* R3614 (0xe1e) - EQ1 15 */ + { 0x00000e1f, 0x040a }, /* R3615 (0xe1f) - EQ1 16 */ + { 0x00000e20, 0x1f14 }, /* R3616 (0xe20) - EQ1 17 */ + { 0x00000e21, 0x058c }, /* R3617 (0xe21) - EQ1 18 */ + { 0x00000e22, 0x0563 }, /* R3618 (0xe22) - EQ1 19 */ + { 0x00000e23, 0x4000 }, /* R3619 (0xe23) - EQ1 20 */ + { 0x00000e24, 0x0b75 }, /* R3620 (0xe24) - EQ1 21 */ + { 0x00000e26, 0x6318 }, /* R3622 (0xe26) - EQ2 1 */ + { 0x00000e27, 0x6300 }, /* R3623 (0xe27) - EQ2 2 */ + { 0x00000e28, 0x0fc8 }, /* R3624 (0xe28) - EQ2 3 */ + { 0x00000e29, 0x03fe }, /* R3625 (0xe29) - EQ2 4 */ + { 0x00000e2a, 0x00e0 }, /* R3626 (0xe2a) - EQ2 5 */ + { 0x00000e2b, 0x1ec4 }, /* R3627 (0xe2b) - EQ2 6 */ + { 0x00000e2c, 0xf136 }, /* R3628 (0xe2c) - EQ2 7 */ + { 0x00000e2d, 0x0409 }, /* R3629 (0xe2d) - EQ2 8 */ + { 0x00000e2e, 0x04cc }, /* R3630 (0xe2e) - EQ2 9 */ + { 0x00000e2f, 0x1c9b }, /* R3631 (0xe2f) - EQ2 10 */ + { 0x00000e30, 0xf337 }, /* R3632 (0xe30) - EQ2 11 */ + { 0x00000e31, 0x040b }, /* R3633 (0xe31) - EQ2 12 */ + { 0x00000e32, 0x0cbb }, /* R3634 (0xe32) - EQ2 13 */ + { 0x00000e33, 0x16f8 }, /* R3635 (0xe33) - EQ2 14 */ + { 0x00000e34, 0xf7d9 }, /* R3636 (0xe34) - EQ2 15 */ + { 0x00000e35, 0x040a }, /* R3637 (0xe35) - EQ2 16 */ + { 0x00000e36, 0x1f14 }, /* R3638 (0xe36) - EQ2 17 */ + { 0x00000e37, 0x058c }, /* R3639 (0xe37) - EQ2 18 */ + { 0x00000e38, 0x0563 }, /* R3640 (0xe38) - EQ2 19 */ + { 0x00000e39, 0x4000 }, /* R3641 (0xe39) - EQ2 20 */ + { 0x00000e3a, 0x0b75 }, /* R3642 (0xe3a) - EQ2 21 */ + { 0x00000e3c, 0x6318 }, /* R3644 (0xe3c) - EQ3 1 */ + { 0x00000e3d, 0x6300 }, /* R3645 (0xe3d) - EQ3 2 */ + { 0x00000e3e, 0x0fc8 }, /* R3646 (0xe3e) - EQ3 3 */ + { 0x00000e3f, 0x03fe }, /* R3647 (0xe3f) - EQ3 4 */ + { 0x00000e40, 0x00e0 }, /* R3648 (0xe40) - EQ3 5 */ + { 0x00000e41, 0x1ec4 }, /* R3649 (0xe41) - EQ3 6 */ + { 0x00000e42, 0xf136 }, /* R3650 (0xe42) - EQ3 7 */ + { 0x00000e43, 0x0409 }, /* R3651 (0xe43) - EQ3 8 */ + { 0x00000e44, 0x04cc }, /* R3652 (0xe44) - EQ3 9 */ + { 0x00000e45, 0x1c9b }, /* R3653 (0xe45) - EQ3 10 */ + { 0x00000e46, 0xf337 }, /* R3654 (0xe46) - EQ3 11 */ + { 0x00000e47, 0x040b }, /* R3655 (0xe47) - EQ3 12 */ + { 0x00000e48, 0x0cbb }, /* R3656 (0xe48) - EQ3 13 */ + { 0x00000e49, 0x16f8 }, /* R3657 (0xe49) - EQ3 14 */ + { 0x00000e4a, 0xf7d9 }, /* R3658 (0xe4a) - EQ3 15 */ + { 0x00000e4b, 0x040a }, /* R3659 (0xe4b) - EQ3 16 */ + { 0x00000e4c, 0x1f14 }, /* R3660 (0xe4c) - EQ3 17 */ + { 0x00000e4d, 0x058c }, /* R3661 (0xe4d) - EQ3 18 */ + { 0x00000e4e, 0x0563 }, /* R3662 (0xe4e) - EQ3 19 */ + { 0x00000e4f, 0x4000 }, /* R3663 (0xe4f) - EQ3 20 */ + { 0x00000e50, 0x0b75 }, /* R3664 (0xe50) - EQ3 21 */ + { 0x00000e52, 0x6318 }, /* R3666 (0xe52) - EQ4 1 */ + { 0x00000e53, 0x6300 }, /* R3667 (0xe53) - EQ4 2 */ + { 0x00000e54, 0x0fc8 }, /* R3668 (0xe54) - EQ4 3 */ + { 0x00000e55, 0x03fe }, /* R3669 (0xe55) - EQ4 4 */ + { 0x00000e56, 0x00e0 }, /* R3670 (0xe56) - EQ4 5 */ + { 0x00000e57, 0x1ec4 }, /* R3671 (0xe57) - EQ4 6 */ + { 0x00000e58, 0xf136 }, /* R3672 (0xe58) - EQ4 7 */ + { 0x00000e59, 0x0409 }, /* R3673 (0xe59) - EQ4 8 */ + { 0x00000e5a, 0x04cc }, /* R3674 (0xe5a) - EQ4 9 */ + { 0x00000e5b, 0x1c9b }, /* R3675 (0xe5b) - EQ4 10 */ + { 0x00000e5c, 0xf337 }, /* R3676 (0xe5c) - EQ4 11 */ + { 0x00000e5d, 0x040b }, /* R3677 (0xe5d) - EQ4 12 */ + { 0x00000e5e, 0x0cbb }, /* R3678 (0xe5e) - EQ4 13 */ + { 0x00000e5f, 0x16f8 }, /* R3679 (0xe5f) - EQ4 14 */ + { 0x00000e60, 0xf7d9 }, /* R3680 (0xe60) - EQ4 15 */ + { 0x00000e61, 0x040a }, /* R3681 (0xe61) - EQ4 16 */ + { 0x00000e62, 0x1f14 }, /* R3682 (0xe62) - EQ4 17 */ + { 0x00000e63, 0x058c }, /* R3683 (0xe63) - EQ4 18 */ + { 0x00000e64, 0x0563 }, /* R3684 (0xe64) - EQ4 19 */ + { 0x00000e65, 0x4000 }, /* R3685 (0xe65) - EQ4 20 */ + { 0x00000e66, 0x0b75 }, /* R3686 (0xe66) - EQ4 21 */ + { 0x00000e80, 0x0018 }, /* R3712 (0xe80) - DRC1 Ctrl 1 */ + { 0x00000e81, 0x0933 }, /* R3713 (0xe81) - DRC1 Ctrl 2 */ + { 0x00000e82, 0x0018 }, /* R3714 (0xe82) - DRC1 Ctrl 3 */ + { 0x00000e83, 0x0000 }, /* R3715 (0xe83) - DRC1 Ctrl 4 */ + { 0x00000e84, 0x0000 }, /* R3716 (0xe84) - DRC1 Ctrl 5 */ + { 0x00000e88, 0x0018 }, /* R3720 (0xe88) - DRC2 Ctrl 1 */ + { 0x00000e89, 0x0933 }, /* R3721 (0xe89) - DRC2 Ctrl 2 */ + { 0x00000e8a, 0x0018 }, /* R3722 (0xe8a) - DRC2 Ctrl 3 */ + { 0x00000e8b, 0x0000 }, /* R3723 (0xe8b) - DRC2 Ctrl 4 */ + { 0x00000e8c, 0x0000 }, /* R3724 (0xe8c) - DRC2 Ctrl 5 */ + { 0x00000ec0, 0x0000 }, /* R3776 (0xec0) - HPLPF1 1 */ + { 0x00000ec1, 0x0000 }, /* R3777 (0xec1) - HPLPF1 2 */ + { 0x00000ec4, 0x0000 }, /* R3780 (0xec4) - HPLPF2 1 */ + { 0x00000ec5, 0x0000 }, /* R3781 (0xec5) - HPLPF2 2 */ + { 0x00000ec8, 0x0000 }, /* R3784 (0xec8) - HPLPF3 1 */ + { 0x00000ec9, 0x0000 }, /* R3785 (0xec9) - HPLPF3 2 */ + { 0x00000ecc, 0x0000 }, /* R3788 (0xecc) - HPLPF4 1 */ + { 0x00000ecd, 0x0000 }, /* R3789 (0xecd) - HPLPF4 2 */ + { 0x00000ee0, 0x0000 }, /* R3808 (0xee0) - ASRC1 Enable */ + { 0x00000ee2, 0x0000 }, /* R3810 (0xee2) - ASRC1 Rate 1 */ + { 0x00000ee3, 0x4000 }, /* R3811 (0xee3) - ASRC1 Rate 2 */ + { 0x00000ef0, 0x0000 }, /* R3824 (0xef0) - ISRC1 Ctrl 1 */ + { 0x00000ef1, 0x0001 }, /* R3825 (0xef1) - ISRC1 Ctrl 2 */ + { 0x00000ef2, 0x0000 }, /* R3826 (0xef2) - ISRC1 Ctrl 3 */ + { 0x00000ef3, 0x0000 }, /* R3827 (0xef3) - ISRC2 Ctrl 1 */ + { 0x00000ef4, 0x0001 }, /* R3828 (0xef4) - ISRC2 Ctrl 2 */ + { 0x00000ef5, 0x0000 }, /* R3829 (0xef5) - ISRC2 Ctrl 3 */ + { 0x000010c0, 0x0008 }, /* R4288 (0x10c0) - AUXPDM1 Ctrl 0 */ + { 0x000010c1, 0x4000 }, /* R4289 (0x10c1) - AUXPDM1 Ctrl 1 */ + { 0x00001480, 0x0000 }, /* R5248 (0x1480) - DFC1 Ctrl W0 */ + { 0x00001482, 0x1f00 }, /* R5250 (0x1482) - DFC1 Rx W0 */ + { 0x00001484, 0x1f00 }, /* R5252 (0x1484) - DFC1 Tx W0 */ + { 0x00001486, 0x0000 }, /* R5254 (0x1486) - DFC2 Ctrl W0 */ + { 0x00001488, 0x1f00 }, /* R5256 (0x1488) - DFC2 Rx W0 */ + { 0x0000148a, 0x1f00 }, /* R5258 (0x148a) - DFC2 Tx W0 */ + { 0x0000148c, 0x0000 }, /* R5260 (0x148c) - DFC3 Ctrl W0 */ + { 0x0000148e, 0x1f00 }, /* R5262 (0x148e) - DFC3 Rx W0 */ + { 0x00001490, 0x1f00 }, /* R5264 (0x1490) - DFC3 Tx W0 */ + { 0x00001492, 0x0000 }, /* R5266 (0x1492) - DFC4 Ctrl W0 */ + { 0x00001494, 0x1f00 }, /* R5268 (0x1494) - DFC4 Rx W0 */ + { 0x00001496, 0x1f00 }, /* R5270 (0x1496) - DFC4 Tx W0 */ + { 0x00001498, 0x0000 }, /* R5272 (0x1498) - DFC5 Ctrl W0 */ + { 0x0000149a, 0x1f00 }, /* R5274 (0x149a) - DFC5 Rx W0 */ + { 0x0000149c, 0x1f00 }, /* R5276 (0x149c) - DFC5 Tx W0 */ + { 0x0000149e, 0x0000 }, /* R5278 (0x149e) - DFC6 Ctrl W0 */ + { 0x000014a0, 0x1f00 }, /* R5280 (0x14a0) - DFC6 Rx W0 */ + { 0x000014a2, 0x1f00 }, /* R5282 (0x14a2) - DFC6 Tx W0 */ + { 0x000014a4, 0x0000 }, /* R5284 (0x14a4) - DFC7 Ctrl W0 */ + { 0x000014a6, 0x1f00 }, /* R5286 (0x14a6) - DFC7 Rx W0 */ + { 0x000014a8, 0x1f00 }, /* R5288 (0x14a8) - DFC7 Tx W0 */ + { 0x000014aa, 0x0000 }, /* R5290 (0x14aa) - DFC8 Ctrl W0 */ + { 0x000014ac, 0x1f00 }, /* R5292 (0x14ac) - DFC8 Rx W0 */ + { 0x000014ae, 0x1f00 }, /* R5294 (0x14ae) - DFC8 Tx W0 */ + { 0x00001700, 0x2001 }, /* R5888 (0x1700) - GPIO1 Ctrl 1 */ + { 0x00001701, 0xf000 }, /* R5889 (0x1701) - GPIO1 Ctrl 2 */ + { 0x00001702, 0x2001 }, /* R5890 (0x1702) - GPIO2 Ctrl 1 */ + { 0x00001703, 0xf000 }, /* R5891 (0x1703) - GPIO2 Ctrl 2 */ + { 0x00001704, 0x2001 }, /* R5892 (0x1704) - GPIO3 Ctrl 1 */ + { 0x00001705, 0xf000 }, /* R5893 (0x1705) - GPIO3 Ctrl 2 */ + { 0x00001706, 0x2001 }, /* R5894 (0x1706) - GPIO4 Ctrl 1 */ + { 0x00001707, 0xf000 }, /* R5895 (0x1707) - GPIO4 Ctrl 2 */ + { 0x00001708, 0x2001 }, /* R5896 (0x1708) - GPIO5 Ctrl 1 */ + { 0x00001709, 0xf000 }, /* R5897 (0x1709) - GPIO5 Ctrl 2 */ + { 0x0000170a, 0x2001 }, /* R5898 (0x170a) - GPIO6 Ctrl 1 */ + { 0x0000170b, 0xf000 }, /* R5899 (0x170b) - GPIO6 Ctrl 2 */ + { 0x0000170c, 0x2001 }, /* R5900 (0x170c) - GPIO7 Ctrl 1 */ + { 0x0000170d, 0xf000 }, /* R5901 (0x170d) - GPIO7 Ctrl 2 */ + { 0x0000170e, 0x2001 }, /* R5902 (0x170e) - GPIO8 Ctrl 1 */ + { 0x0000170f, 0xf000 }, /* R5903 (0x170f) - GPIO8 Ctrl 2 */ + { 0x00001710, 0x2001 }, /* R5904 (0x1710) - GPIO9 Ctrl 1 */ + { 0x00001711, 0xf000 }, /* R5905 (0x1711) - GPIO9 Ctrl 2 */ + { 0x00001712, 0x2001 }, /* R5906 (0x1712) - GPIO10 Ctrl 1 */ + { 0x00001713, 0xf000 }, /* R5907 (0x1713) - GPIO10 Ctrl 2 */ + { 0x00001714, 0x2001 }, /* R5908 (0x1714) - GPIO11 Ctrl 1 */ + { 0x00001715, 0xf000 }, /* R5909 (0x1715) - GPIO11 Ctrl 2 */ + { 0x00001716, 0x2001 }, /* R5910 (0x1716) - GPIO12 Ctrl 1 */ + { 0x00001717, 0xf000 }, /* R5911 (0x1717) - GPIO12 Ctrl 2 */ + { 0x00001718, 0x2001 }, /* R5912 (0x1718) - GPIO13 Ctrl 1 */ + { 0x00001719, 0xf000 }, /* R5913 (0x1719) - GPIO13 Ctrl 2 */ + { 0x0000171a, 0x2001 }, /* R5914 (0x171a) - GPIO14 Ctrl 1 */ + { 0x0000171b, 0xf000 }, /* R5915 (0x171b) - GPIO14 Ctrl 2 */ + { 0x0000171c, 0x2001 }, /* R5916 (0x171c) - GPIO15 Ctrl 1 */ + { 0x0000171d, 0xf000 }, /* R5917 (0x171d) - GPIO15 Ctrl 2 */ + { 0x0000171e, 0x2001 }, /* R5918 (0x171e) - GPIO16 Ctrl 1 */ + { 0x0000171f, 0xf000 }, /* R5919 (0x171f) - GPIO16 Ctrl 2 */ + { 0x00001840, 0x1200 }, /* R6208 (0x1840) - IRQ1 Mask 1 */ + { 0x00001841, 0x77e0 }, /* R6209 (0x1841) - IRQ1 Mask 2 */ + { 0x00001842, 0xffff }, /* R6210 (0x1842) - IRQ1 Mask 3 */ + { 0x00001843, 0xffff }, /* R6211 (0x1843) - IRQ1 Mask 4 */ + { 0x00001844, 0xffff }, /* R6212 (0x1844) - IRQ1 Mask 5 */ + { 0x00001845, 0x0301 }, /* R6213 (0x1845) - IRQ1 Mask 6 */ + { 0x00001846, 0x0f3f }, /* R6214 (0x1846) - IRQ1 Mask 7 */ + { 0x00001847, 0xffff }, /* R6215 (0x1847) - IRQ1 Mask 8 */ + { 0x00001848, 0x031f }, /* R6216 (0x1848) - IRQ1 Mask 9 */ + { 0x00001849, 0x031f }, /* R6217 (0x1849) - IRQ1 Mask 10 */ + { 0x0000184a, 0xffff }, /* R6218 (0x184a) - IRQ1 Mask 11 */ + { 0x0000184b, 0x033f }, /* R6219 (0x184b) - IRQ1 Mask 12 */ + { 0x0000184c, 0x003f }, /* R6220 (0x184c) - IRQ1 Mask 13 */ + { 0x0000184d, 0x003f }, /* R6221 (0x184d) - IRQ1 Mask 14 */ + { 0x0000184e, 0x1000 }, /* R6222 (0x184e) - IRQ1 Mask 15 */ + { 0x0000184f, 0xffff }, /* R6223 (0x184f) - IRQ1 Mask 16 */ + { 0x00001850, 0xffff }, /* R6224 (0x1850) - IRQ1 Mask 17 */ + { 0x00001851, 0xffff }, /* R6225 (0x1851) - IRQ1 Mask 18 */ + { 0x00001852, 0xffff }, /* R6226 (0x1852) - IRQ1 Mask 19 */ + { 0x00001853, 0xffff }, /* R6227 (0x1853) - IRQ1 Mask 20 */ + { 0x00001854, 0x0001 }, /* R6228 (0x1854) - IRQ1 Mask 21 */ + { 0x00001855, 0x0001 }, /* R6229 (0x1855) - IRQ1 Mask 22 */ + { 0x00001856, 0x0001 }, /* R6230 (0x1856) - IRQ1 Mask 23 */ + { 0x00001857, 0x0001 }, /* R6231 (0x1857) - IRQ1 Mask 24 */ + { 0x00001858, 0x0001 }, /* R6232 (0x1858) - IRQ1 Mask 25 */ + { 0x00001859, 0xffff }, /* R6233 (0x1859) - IRQ1 Mask 26 */ + { 0x0000185a, 0x0001 }, /* R6234 (0x185a) - IRQ1 Mask 27 */ + { 0x0000185b, 0x0001 }, /* R6235 (0x185b) - IRQ1 Mask 28 */ + { 0x0000185c, 0xffff }, /* R6236 (0x185c) - IRQ1 Mask 29 */ + { 0x0000185d, 0x0001 }, /* R6237 (0x185d) - IRQ1 Mask 30 */ + { 0x0000185e, 0xffff }, /* R6238 (0x185e) - IRQ1 Mask 31 */ + { 0x0000185f, 0xffff }, /* R6239 (0x185f) - IRQ1 Mask 32 */ + { 0x00001860, 0x0001 }, /* R6240 (0x1860) - IRQ1 Mask 33 */ + { 0x00001948, 0x031f }, /* R6472 (0x1948) - IRQ2 Mask 9 */ + { 0x00001a06, 0x0000 }, /* R6662 (0x1a06) - Interrupt Debounce 7 */ + { 0x00001a80, 0x4400 }, /* R6784 (0x1a80) - IRQ1 Ctrl */ +}; + +static bool cs47l92_is_adsp_memory(unsigned int reg) +{ + switch (reg) { + case 0x080000 ... 0x082ffe: + case 0x0a0000 ... 0x0a1ffe: + case 0x0c0000 ... 0x0c1ffe: + case 0x0e0000 ... 0x0e1ffe: + return true; + default: + return false; + } +} + +static bool cs47l92_16bit_readable_register(struct device *dev, + unsigned int reg) +{ + switch (reg) { + case MADERA_SOFTWARE_RESET: + case MADERA_HARDWARE_REVISION: + case MADERA_WRITE_SEQUENCER_CTRL_0 ... MADERA_WRITE_SEQUENCER_CTRL_2: + case MADERA_TONE_GENERATOR_1 ... MADERA_TONE_GENERATOR_5: + case MADERA_PWM_DRIVE_1 ... MADERA_PWM_DRIVE_3: + case MADERA_SAMPLE_RATE_SEQUENCE_SELECT_1: + case MADERA_SAMPLE_RATE_SEQUENCE_SELECT_2: + case MADERA_SAMPLE_RATE_SEQUENCE_SELECT_3: + case MADERA_SAMPLE_RATE_SEQUENCE_SELECT_4: + case MADERA_HAPTICS_CONTROL_1 ... MADERA_HAPTICS_CONTROL_2: + case MADERA_HAPTICS_PHASE_1_INTENSITY: + case MADERA_HAPTICS_PHASE_1_DURATION: + case MADERA_HAPTICS_PHASE_2_INTENSITY: + case MADERA_HAPTICS_PHASE_2_DURATION: + case MADERA_HAPTICS_PHASE_3_INTENSITY: + case MADERA_HAPTICS_PHASE_3_DURATION: + case MADERA_HAPTICS_STATUS: + case MADERA_COMFORT_NOISE_GENERATOR: + case MADERA_CLOCK_32K_1: + case MADERA_SYSTEM_CLOCK_1: + case MADERA_SAMPLE_RATE_1 ... MADERA_SAMPLE_RATE_3: + case MADERA_SAMPLE_RATE_1_STATUS: + case MADERA_SAMPLE_RATE_2_STATUS: + case MADERA_SAMPLE_RATE_3_STATUS: + case MADERA_ASYNC_CLOCK_1: + case MADERA_ASYNC_SAMPLE_RATE_1: + case MADERA_ASYNC_SAMPLE_RATE_1_STATUS: + case MADERA_ASYNC_SAMPLE_RATE_2: + case MADERA_ASYNC_SAMPLE_RATE_2_STATUS: + case MADERA_DSP_CLOCK_1: + case MADERA_DSP_CLOCK_2: + case MADERA_OUTPUT_SYSTEM_CLOCK: + case MADERA_OUTPUT_ASYNC_CLOCK: + case MADERA_RATE_ESTIMATOR_1 ... MADERA_RATE_ESTIMATOR_5: + case MADERA_FLL1_CONTROL_1 ... MADERA_FLL1_CONTROL_6: + case CS47L92_FLL1_CONTROL_7 ... CS47L92_FLL1_CONTROL_10: + case MADERA_FLL1_CONTROL_11: + case MADERA_FLL1_DIGITAL_TEST_1: + case MADERA_FLL1_SYNCHRONISER_1 ... MADERA_FLL1_SYNCHRONISER_6: + case CS47L92_FLL1_GPIO_CLOCK: + case MADERA_FLL2_CONTROL_1 ... MADERA_FLL2_CONTROL_6: + case CS47L92_FLL2_CONTROL_7 ... CS47L92_FLL2_CONTROL_10: + case MADERA_FLL2_CONTROL_11: + case MADERA_FLL2_DIGITAL_TEST_1: + case MADERA_FLL2_SYNCHRONISER_1 ... MADERA_FLL2_SYNCHRONISER_6: + case CS47L92_FLL2_GPIO_CLOCK: + case MADERA_MIC_CHARGE_PUMP_1: + case MADERA_LDO2_CONTROL_1: + case MADERA_MIC_BIAS_CTRL_1: + case MADERA_MIC_BIAS_CTRL_2: + case MADERA_MIC_BIAS_CTRL_5: + case MADERA_MIC_BIAS_CTRL_6: + case MADERA_HP_CTRL_1L: + case MADERA_HP_CTRL_1R: + case MADERA_HP_CTRL_2L: + case MADERA_HP_CTRL_2R: + case MADERA_HP_CTRL_3L: + case MADERA_HP_CTRL_3R: + case MADERA_ACCESSORY_DETECT_MODE_1: + case MADERA_HEADPHONE_DETECT_0: + case MADERA_HEADPHONE_DETECT_1: + case MADERA_HEADPHONE_DETECT_2: + case MADERA_HEADPHONE_DETECT_3: + case MADERA_HEADPHONE_DETECT_5: + case MADERA_MICD_CLAMP_CONTROL: + case MADERA_MIC_DETECT_1_CONTROL_0: + case MADERA_MIC_DETECT_1_CONTROL_1: + case MADERA_MIC_DETECT_1_CONTROL_2: + case MADERA_MIC_DETECT_1_CONTROL_3: + case MADERA_MIC_DETECT_1_CONTROL_4: + case MADERA_MIC_DETECT_1_LEVEL_1 ... MADERA_MIC_DETECT_1_LEVEL_4: + case MADERA_MIC_DETECT_2_CONTROL_0: + case MADERA_MIC_DETECT_2_CONTROL_1: + case MADERA_MIC_DETECT_2_CONTROL_2: + case MADERA_MIC_DETECT_2_CONTROL_3: + case MADERA_MIC_DETECT_2_CONTROL_4: + case MADERA_MIC_DETECT_2_LEVEL_1 ... MADERA_MIC_DETECT_2_LEVEL_4: + case MADERA_GP_SWITCH_1: + case MADERA_JACK_DETECT_ANALOGUE: + case MADERA_INPUT_ENABLES: + case MADERA_INPUT_ENABLES_STATUS: + case MADERA_INPUT_RATE: + case MADERA_INPUT_VOLUME_RAMP: + case MADERA_HPF_CONTROL: + case MADERA_IN1L_CONTROL: + case MADERA_ADC_DIGITAL_VOLUME_1L: + case MADERA_DMIC1L_CONTROL: + case MADERA_IN1L_RATE_CONTROL: + case MADERA_IN1R_CONTROL: + case MADERA_ADC_DIGITAL_VOLUME_1R: + case MADERA_DMIC1R_CONTROL: + case MADERA_IN1R_RATE_CONTROL: + case MADERA_IN2L_CONTROL: + case MADERA_ADC_DIGITAL_VOLUME_2L: + case MADERA_DMIC2L_CONTROL: + case MADERA_IN2L_RATE_CONTROL: + case MADERA_IN2R_CONTROL: + case MADERA_ADC_DIGITAL_VOLUME_2R: + case MADERA_DMIC2R_CONTROL: + case MADERA_IN2R_RATE_CONTROL: + case MADERA_IN3L_CONTROL: + case MADERA_ADC_DIGITAL_VOLUME_3L: + case MADERA_DMIC3L_CONTROL: + case MADERA_IN3L_RATE_CONTROL: + case MADERA_IN3R_CONTROL: + case MADERA_ADC_DIGITAL_VOLUME_3R: + case MADERA_DMIC3R_CONTROL: + case MADERA_IN3R_RATE_CONTROL: + case MADERA_IN4L_CONTROL: + case MADERA_ADC_DIGITAL_VOLUME_4L: + case MADERA_DMIC4L_CONTROL: + case MADERA_IN4L_RATE_CONTROL: + case MADERA_IN4R_CONTROL: + case MADERA_ADC_DIGITAL_VOLUME_4R: + case MADERA_DMIC4R_CONTROL: + case MADERA_IN4R_RATE_CONTROL: + case MADERA_OUTPUT_ENABLES_1: + case MADERA_OUTPUT_STATUS_1: + case MADERA_RAW_OUTPUT_STATUS_1: + case MADERA_OUTPUT_RATE_1: + case MADERA_OUTPUT_VOLUME_RAMP: + case MADERA_OUTPUT_PATH_CONFIG_1L: + case MADERA_DAC_DIGITAL_VOLUME_1L: + case MADERA_OUTPUT_PATH_CONFIG_1: + case MADERA_NOISE_GATE_SELECT_1L: + case MADERA_OUTPUT_PATH_CONFIG_1R: + case MADERA_DAC_DIGITAL_VOLUME_1R: + case MADERA_NOISE_GATE_SELECT_1R: + case MADERA_OUTPUT_PATH_CONFIG_2L: + case MADERA_DAC_DIGITAL_VOLUME_2L: + case MADERA_OUTPUT_PATH_CONFIG_2: + case MADERA_NOISE_GATE_SELECT_2L: + case MADERA_OUTPUT_PATH_CONFIG_2R: + case MADERA_DAC_DIGITAL_VOLUME_2R: + case MADERA_NOISE_GATE_SELECT_2R: + case MADERA_OUTPUT_PATH_CONFIG_3L: + case MADERA_DAC_DIGITAL_VOLUME_3L: + case MADERA_OUTPUT_PATH_CONFIG_3: + case MADERA_NOISE_GATE_SELECT_3L: + case MADERA_OUTPUT_PATH_CONFIG_3R: + case MADERA_DAC_DIGITAL_VOLUME_3R: + case MADERA_NOISE_GATE_SELECT_3R: + case MADERA_OUTPUT_PATH_CONFIG_5L: + case MADERA_DAC_DIGITAL_VOLUME_5L: + case MADERA_NOISE_GATE_SELECT_5L: + case MADERA_OUTPUT_PATH_CONFIG_5R: + case MADERA_DAC_DIGITAL_VOLUME_5R: + case MADERA_NOISE_GATE_SELECT_5R: + case MADERA_DAC_AEC_CONTROL_1 ... MADERA_DAC_AEC_CONTROL_2: + case MADERA_NOISE_GATE_CONTROL: + case MADERA_PDM_SPK1_CTRL_1 ... MADERA_PDM_SPK1_CTRL_2: + case MADERA_HP1_SHORT_CIRCUIT_CTRL: + case MADERA_HP2_SHORT_CIRCUIT_CTRL: + case MADERA_HP3_SHORT_CIRCUIT_CTRL: + case MADERA_AIF1_BCLK_CTRL: + case MADERA_AIF1_TX_PIN_CTRL: + case MADERA_AIF1_RX_PIN_CTRL: + case MADERA_AIF1_RATE_CTRL: + case MADERA_AIF1_FORMAT: + case MADERA_AIF1_RX_BCLK_RATE: + case MADERA_AIF1_FRAME_CTRL_1 ... MADERA_AIF1_FRAME_CTRL_18: + case MADERA_AIF1_TX_ENABLES: + case MADERA_AIF1_RX_ENABLES: + case MADERA_AIF2_BCLK_CTRL: + case MADERA_AIF2_TX_PIN_CTRL: + case MADERA_AIF2_RX_PIN_CTRL: + case MADERA_AIF2_RATE_CTRL: + case MADERA_AIF2_FORMAT: + case MADERA_AIF2_RX_BCLK_RATE: + case MADERA_AIF2_FRAME_CTRL_1 ... MADERA_AIF2_FRAME_CTRL_18: + case MADERA_AIF2_TX_ENABLES: + case MADERA_AIF2_RX_ENABLES: + case MADERA_AIF3_BCLK_CTRL: + case MADERA_AIF3_TX_PIN_CTRL: + case MADERA_AIF3_RX_PIN_CTRL: + case MADERA_AIF3_RATE_CTRL: + case MADERA_AIF3_FORMAT: + case MADERA_AIF3_RX_BCLK_RATE: + case MADERA_AIF3_FRAME_CTRL_1 ... MADERA_AIF3_FRAME_CTRL_18: + case MADERA_AIF3_TX_ENABLES: + case MADERA_AIF3_RX_ENABLES: + case MADERA_SPD1_TX_CONTROL: + case MADERA_SPD1_TX_CHANNEL_STATUS_1: + case MADERA_SPD1_TX_CHANNEL_STATUS_2: + case MADERA_SPD1_TX_CHANNEL_STATUS_3: + case MADERA_SLIMBUS_FRAMER_REF_GEAR: + case MADERA_SLIMBUS_RATES_1 ... MADERA_SLIMBUS_RATES_8: + case MADERA_SLIMBUS_RX_CHANNEL_ENABLE: + case MADERA_SLIMBUS_TX_CHANNEL_ENABLE: + case MADERA_SLIMBUS_RX_PORT_STATUS: + case MADERA_SLIMBUS_TX_PORT_STATUS: + case MADERA_PWM1MIX_INPUT_1_SOURCE: + case MADERA_PWM1MIX_INPUT_1_VOLUME: + case MADERA_PWM1MIX_INPUT_2_SOURCE: + case MADERA_PWM1MIX_INPUT_2_VOLUME: + case MADERA_PWM1MIX_INPUT_3_SOURCE: + case MADERA_PWM1MIX_INPUT_3_VOLUME: + case MADERA_PWM1MIX_INPUT_4_SOURCE: + case MADERA_PWM1MIX_INPUT_4_VOLUME: + case MADERA_PWM2MIX_INPUT_1_SOURCE: + case MADERA_PWM2MIX_INPUT_1_VOLUME: + case MADERA_PWM2MIX_INPUT_2_SOURCE: + case MADERA_PWM2MIX_INPUT_2_VOLUME: + case MADERA_PWM2MIX_INPUT_3_SOURCE: + case MADERA_PWM2MIX_INPUT_3_VOLUME: + case MADERA_PWM2MIX_INPUT_4_SOURCE: + case MADERA_PWM2MIX_INPUT_4_VOLUME: + case MADERA_OUT1LMIX_INPUT_1_SOURCE: + case MADERA_OUT1LMIX_INPUT_1_VOLUME: + case MADERA_OUT1LMIX_INPUT_2_SOURCE: + case MADERA_OUT1LMIX_INPUT_2_VOLUME: + case MADERA_OUT1LMIX_INPUT_3_SOURCE: + case MADERA_OUT1LMIX_INPUT_3_VOLUME: + case MADERA_OUT1LMIX_INPUT_4_SOURCE: + case MADERA_OUT1LMIX_INPUT_4_VOLUME: + case MADERA_OUT1RMIX_INPUT_1_SOURCE: + case MADERA_OUT1RMIX_INPUT_1_VOLUME: + case MADERA_OUT1RMIX_INPUT_2_SOURCE: + case MADERA_OUT1RMIX_INPUT_2_VOLUME: + case MADERA_OUT1RMIX_INPUT_3_SOURCE: + case MADERA_OUT1RMIX_INPUT_3_VOLUME: + case MADERA_OUT1RMIX_INPUT_4_SOURCE: + case MADERA_OUT1RMIX_INPUT_4_VOLUME: + case MADERA_OUT2LMIX_INPUT_1_SOURCE: + case MADERA_OUT2LMIX_INPUT_1_VOLUME: + case MADERA_OUT2LMIX_INPUT_2_SOURCE: + case MADERA_OUT2LMIX_INPUT_2_VOLUME: + case MADERA_OUT2LMIX_INPUT_3_SOURCE: + case MADERA_OUT2LMIX_INPUT_3_VOLUME: + case MADERA_OUT2LMIX_INPUT_4_SOURCE: + case MADERA_OUT2LMIX_INPUT_4_VOLUME: + case MADERA_OUT2RMIX_INPUT_1_SOURCE: + case MADERA_OUT2RMIX_INPUT_1_VOLUME: + case MADERA_OUT2RMIX_INPUT_2_SOURCE: + case MADERA_OUT2RMIX_INPUT_2_VOLUME: + case MADERA_OUT2RMIX_INPUT_3_SOURCE: + case MADERA_OUT2RMIX_INPUT_3_VOLUME: + case MADERA_OUT2RMIX_INPUT_4_SOURCE: + case MADERA_OUT2RMIX_INPUT_4_VOLUME: + case MADERA_OUT3LMIX_INPUT_1_SOURCE: + case MADERA_OUT3LMIX_INPUT_1_VOLUME: + case MADERA_OUT3LMIX_INPUT_2_SOURCE: + case MADERA_OUT3LMIX_INPUT_2_VOLUME: + case MADERA_OUT3LMIX_INPUT_3_SOURCE: + case MADERA_OUT3LMIX_INPUT_3_VOLUME: + case MADERA_OUT3LMIX_INPUT_4_SOURCE: + case MADERA_OUT3LMIX_INPUT_4_VOLUME: + case MADERA_OUT3RMIX_INPUT_1_SOURCE: + case MADERA_OUT3RMIX_INPUT_1_VOLUME: + case MADERA_OUT3RMIX_INPUT_2_SOURCE: + case MADERA_OUT3RMIX_INPUT_2_VOLUME: + case MADERA_OUT3RMIX_INPUT_3_SOURCE: + case MADERA_OUT3RMIX_INPUT_3_VOLUME: + case MADERA_OUT3RMIX_INPUT_4_SOURCE: + case MADERA_OUT3RMIX_INPUT_4_VOLUME: + case MADERA_OUT5LMIX_INPUT_1_SOURCE: + case MADERA_OUT5LMIX_INPUT_1_VOLUME: + case MADERA_OUT5LMIX_INPUT_2_SOURCE: + case MADERA_OUT5LMIX_INPUT_2_VOLUME: + case MADERA_OUT5LMIX_INPUT_3_SOURCE: + case MADERA_OUT5LMIX_INPUT_3_VOLUME: + case MADERA_OUT5LMIX_INPUT_4_SOURCE: + case MADERA_OUT5LMIX_INPUT_4_VOLUME: + case MADERA_OUT5RMIX_INPUT_1_SOURCE: + case MADERA_OUT5RMIX_INPUT_1_VOLUME: + case MADERA_OUT5RMIX_INPUT_2_SOURCE: + case MADERA_OUT5RMIX_INPUT_2_VOLUME: + case MADERA_OUT5RMIX_INPUT_3_SOURCE: + case MADERA_OUT5RMIX_INPUT_3_VOLUME: + case MADERA_OUT5RMIX_INPUT_4_SOURCE: + case MADERA_OUT5RMIX_INPUT_4_VOLUME: + case MADERA_AIF1TX1MIX_INPUT_1_SOURCE: + case MADERA_AIF1TX1MIX_INPUT_1_VOLUME: + case MADERA_AIF1TX1MIX_INPUT_2_SOURCE: + case MADERA_AIF1TX1MIX_INPUT_2_VOLUME: + case MADERA_AIF1TX1MIX_INPUT_3_SOURCE: + case MADERA_AIF1TX1MIX_INPUT_3_VOLUME: + case MADERA_AIF1TX1MIX_INPUT_4_SOURCE: + case MADERA_AIF1TX1MIX_INPUT_4_VOLUME: + case MADERA_AIF1TX2MIX_INPUT_1_SOURCE: + case MADERA_AIF1TX2MIX_INPUT_1_VOLUME: + case MADERA_AIF1TX2MIX_INPUT_2_SOURCE: + case MADERA_AIF1TX2MIX_INPUT_2_VOLUME: + case MADERA_AIF1TX2MIX_INPUT_3_SOURCE: + case MADERA_AIF1TX2MIX_INPUT_3_VOLUME: + case MADERA_AIF1TX2MIX_INPUT_4_SOURCE: + case MADERA_AIF1TX2MIX_INPUT_4_VOLUME: + case MADERA_AIF1TX3MIX_INPUT_1_SOURCE: + case MADERA_AIF1TX3MIX_INPUT_1_VOLUME: + case MADERA_AIF1TX3MIX_INPUT_2_SOURCE: + case MADERA_AIF1TX3MIX_INPUT_2_VOLUME: + case MADERA_AIF1TX3MIX_INPUT_3_SOURCE: + case MADERA_AIF1TX3MIX_INPUT_3_VOLUME: + case MADERA_AIF1TX3MIX_INPUT_4_SOURCE: + case MADERA_AIF1TX3MIX_INPUT_4_VOLUME: + case MADERA_AIF1TX4MIX_INPUT_1_SOURCE: + case MADERA_AIF1TX4MIX_INPUT_1_VOLUME: + case MADERA_AIF1TX4MIX_INPUT_2_SOURCE: + case MADERA_AIF1TX4MIX_INPUT_2_VOLUME: + case MADERA_AIF1TX4MIX_INPUT_3_SOURCE: + case MADERA_AIF1TX4MIX_INPUT_3_VOLUME: + case MADERA_AIF1TX4MIX_INPUT_4_SOURCE: + case MADERA_AIF1TX4MIX_INPUT_4_VOLUME: + case MADERA_AIF1TX5MIX_INPUT_1_SOURCE: + case MADERA_AIF1TX5MIX_INPUT_1_VOLUME: + case MADERA_AIF1TX5MIX_INPUT_2_SOURCE: + case MADERA_AIF1TX5MIX_INPUT_2_VOLUME: + case MADERA_AIF1TX5MIX_INPUT_3_SOURCE: + case MADERA_AIF1TX5MIX_INPUT_3_VOLUME: + case MADERA_AIF1TX5MIX_INPUT_4_SOURCE: + case MADERA_AIF1TX5MIX_INPUT_4_VOLUME: + case MADERA_AIF1TX6MIX_INPUT_1_SOURCE: + case MADERA_AIF1TX6MIX_INPUT_1_VOLUME: + case MADERA_AIF1TX6MIX_INPUT_2_SOURCE: + case MADERA_AIF1TX6MIX_INPUT_2_VOLUME: + case MADERA_AIF1TX6MIX_INPUT_3_SOURCE: + case MADERA_AIF1TX6MIX_INPUT_3_VOLUME: + case MADERA_AIF1TX6MIX_INPUT_4_SOURCE: + case MADERA_AIF1TX6MIX_INPUT_4_VOLUME: + case MADERA_AIF1TX7MIX_INPUT_1_SOURCE: + case MADERA_AIF1TX7MIX_INPUT_1_VOLUME: + case MADERA_AIF1TX7MIX_INPUT_2_SOURCE: + case MADERA_AIF1TX7MIX_INPUT_2_VOLUME: + case MADERA_AIF1TX7MIX_INPUT_3_SOURCE: + case MADERA_AIF1TX7MIX_INPUT_3_VOLUME: + case MADERA_AIF1TX7MIX_INPUT_4_SOURCE: + case MADERA_AIF1TX7MIX_INPUT_4_VOLUME: + case MADERA_AIF1TX8MIX_INPUT_1_SOURCE: + case MADERA_AIF1TX8MIX_INPUT_1_VOLUME: + case MADERA_AIF1TX8MIX_INPUT_2_SOURCE: + case MADERA_AIF1TX8MIX_INPUT_2_VOLUME: + case MADERA_AIF1TX8MIX_INPUT_3_SOURCE: + case MADERA_AIF1TX8MIX_INPUT_3_VOLUME: + case MADERA_AIF1TX8MIX_INPUT_4_SOURCE: + case MADERA_AIF1TX8MIX_INPUT_4_VOLUME: + case MADERA_AIF2TX1MIX_INPUT_1_SOURCE: + case MADERA_AIF2TX1MIX_INPUT_1_VOLUME: + case MADERA_AIF2TX1MIX_INPUT_2_SOURCE: + case MADERA_AIF2TX1MIX_INPUT_2_VOLUME: + case MADERA_AIF2TX1MIX_INPUT_3_SOURCE: + case MADERA_AIF2TX1MIX_INPUT_3_VOLUME: + case MADERA_AIF2TX1MIX_INPUT_4_SOURCE: + case MADERA_AIF2TX1MIX_INPUT_4_VOLUME: + case MADERA_AIF2TX2MIX_INPUT_1_SOURCE: + case MADERA_AIF2TX2MIX_INPUT_1_VOLUME: + case MADERA_AIF2TX2MIX_INPUT_2_SOURCE: + case MADERA_AIF2TX2MIX_INPUT_2_VOLUME: + case MADERA_AIF2TX2MIX_INPUT_3_SOURCE: + case MADERA_AIF2TX2MIX_INPUT_3_VOLUME: + case MADERA_AIF2TX2MIX_INPUT_4_SOURCE: + case MADERA_AIF2TX2MIX_INPUT_4_VOLUME: + case MADERA_AIF2TX3MIX_INPUT_1_SOURCE: + case MADERA_AIF2TX3MIX_INPUT_1_VOLUME: + case MADERA_AIF2TX3MIX_INPUT_2_SOURCE: + case MADERA_AIF2TX3MIX_INPUT_2_VOLUME: + case MADERA_AIF2TX3MIX_INPUT_3_SOURCE: + case MADERA_AIF2TX3MIX_INPUT_3_VOLUME: + case MADERA_AIF2TX3MIX_INPUT_4_SOURCE: + case MADERA_AIF2TX3MIX_INPUT_4_VOLUME: + case MADERA_AIF2TX4MIX_INPUT_1_SOURCE: + case MADERA_AIF2TX4MIX_INPUT_1_VOLUME: + case MADERA_AIF2TX4MIX_INPUT_2_SOURCE: + case MADERA_AIF2TX4MIX_INPUT_2_VOLUME: + case MADERA_AIF2TX4MIX_INPUT_3_SOURCE: + case MADERA_AIF2TX4MIX_INPUT_3_VOLUME: + case MADERA_AIF2TX4MIX_INPUT_4_SOURCE: + case MADERA_AIF2TX4MIX_INPUT_4_VOLUME: + case MADERA_AIF2TX5MIX_INPUT_1_SOURCE: + case MADERA_AIF2TX5MIX_INPUT_1_VOLUME: + case MADERA_AIF2TX5MIX_INPUT_2_SOURCE: + case MADERA_AIF2TX5MIX_INPUT_2_VOLUME: + case MADERA_AIF2TX5MIX_INPUT_3_SOURCE: + case MADERA_AIF2TX5MIX_INPUT_3_VOLUME: + case MADERA_AIF2TX5MIX_INPUT_4_SOURCE: + case MADERA_AIF2TX5MIX_INPUT_4_VOLUME: + case MADERA_AIF2TX6MIX_INPUT_1_SOURCE: + case MADERA_AIF2TX6MIX_INPUT_1_VOLUME: + case MADERA_AIF2TX6MIX_INPUT_2_SOURCE: + case MADERA_AIF2TX6MIX_INPUT_2_VOLUME: + case MADERA_AIF2TX6MIX_INPUT_3_SOURCE: + case MADERA_AIF2TX6MIX_INPUT_3_VOLUME: + case MADERA_AIF2TX6MIX_INPUT_4_SOURCE: + case MADERA_AIF2TX6MIX_INPUT_4_VOLUME: + case MADERA_AIF2TX7MIX_INPUT_1_SOURCE: + case MADERA_AIF2TX7MIX_INPUT_1_VOLUME: + case MADERA_AIF2TX7MIX_INPUT_2_SOURCE: + case MADERA_AIF2TX7MIX_INPUT_2_VOLUME: + case MADERA_AIF2TX7MIX_INPUT_3_SOURCE: + case MADERA_AIF2TX7MIX_INPUT_3_VOLUME: + case MADERA_AIF2TX7MIX_INPUT_4_SOURCE: + case MADERA_AIF2TX7MIX_INPUT_4_VOLUME: + case MADERA_AIF2TX8MIX_INPUT_1_SOURCE: + case MADERA_AIF2TX8MIX_INPUT_1_VOLUME: + case MADERA_AIF2TX8MIX_INPUT_2_SOURCE: + case MADERA_AIF2TX8MIX_INPUT_2_VOLUME: + case MADERA_AIF2TX8MIX_INPUT_3_SOURCE: + case MADERA_AIF2TX8MIX_INPUT_3_VOLUME: + case MADERA_AIF2TX8MIX_INPUT_4_SOURCE: + case MADERA_AIF2TX8MIX_INPUT_4_VOLUME: + case MADERA_AIF3TX1MIX_INPUT_1_SOURCE: + case MADERA_AIF3TX1MIX_INPUT_1_VOLUME: + case MADERA_AIF3TX1MIX_INPUT_2_SOURCE: + case MADERA_AIF3TX1MIX_INPUT_2_VOLUME: + case MADERA_AIF3TX1MIX_INPUT_3_SOURCE: + case MADERA_AIF3TX1MIX_INPUT_3_VOLUME: + case MADERA_AIF3TX1MIX_INPUT_4_SOURCE: + case MADERA_AIF3TX1MIX_INPUT_4_VOLUME: + case MADERA_AIF3TX2MIX_INPUT_1_SOURCE: + case MADERA_AIF3TX2MIX_INPUT_1_VOLUME: + case MADERA_AIF3TX2MIX_INPUT_2_SOURCE: + case MADERA_AIF3TX2MIX_INPUT_2_VOLUME: + case MADERA_AIF3TX2MIX_INPUT_3_SOURCE: + case MADERA_AIF3TX2MIX_INPUT_3_VOLUME: + case MADERA_AIF3TX2MIX_INPUT_4_SOURCE: + case MADERA_AIF3TX2MIX_INPUT_4_VOLUME: + case MADERA_AIF3TX3MIX_INPUT_1_SOURCE: + case MADERA_AIF3TX3MIX_INPUT_1_VOLUME: + case MADERA_AIF3TX3MIX_INPUT_2_SOURCE: + case MADERA_AIF3TX3MIX_INPUT_2_VOLUME: + case MADERA_AIF3TX3MIX_INPUT_3_SOURCE: + case MADERA_AIF3TX3MIX_INPUT_3_VOLUME: + case MADERA_AIF3TX3MIX_INPUT_4_SOURCE: + case MADERA_AIF3TX3MIX_INPUT_4_VOLUME: + case MADERA_AIF3TX4MIX_INPUT_1_SOURCE: + case MADERA_AIF3TX4MIX_INPUT_1_VOLUME: + case MADERA_AIF3TX4MIX_INPUT_2_SOURCE: + case MADERA_AIF3TX4MIX_INPUT_2_VOLUME: + case MADERA_AIF3TX4MIX_INPUT_3_SOURCE: + case MADERA_AIF3TX4MIX_INPUT_3_VOLUME: + case MADERA_AIF3TX4MIX_INPUT_4_SOURCE: + case MADERA_AIF3TX4MIX_INPUT_4_VOLUME: + case CS47L92_AIF3TX5MIX_INPUT_1_SOURCE: + case CS47L92_AIF3TX5MIX_INPUT_1_VOLUME: + case CS47L92_AIF3TX5MIX_INPUT_2_SOURCE: + case CS47L92_AIF3TX5MIX_INPUT_2_VOLUME: + case CS47L92_AIF3TX5MIX_INPUT_3_SOURCE: + case CS47L92_AIF3TX5MIX_INPUT_3_VOLUME: + case CS47L92_AIF3TX5MIX_INPUT_4_SOURCE: + case CS47L92_AIF3TX5MIX_INPUT_4_VOLUME: + case CS47L92_AIF3TX6MIX_INPUT_1_SOURCE: + case CS47L92_AIF3TX6MIX_INPUT_1_VOLUME: + case CS47L92_AIF3TX6MIX_INPUT_2_SOURCE: + case CS47L92_AIF3TX6MIX_INPUT_2_VOLUME: + case CS47L92_AIF3TX6MIX_INPUT_3_SOURCE: + case CS47L92_AIF3TX6MIX_INPUT_3_VOLUME: + case CS47L92_AIF3TX6MIX_INPUT_4_SOURCE: + case CS47L92_AIF3TX6MIX_INPUT_4_VOLUME: + case CS47L92_AIF3TX7MIX_INPUT_1_SOURCE: + case CS47L92_AIF3TX7MIX_INPUT_1_VOLUME: + case CS47L92_AIF3TX7MIX_INPUT_2_SOURCE: + case CS47L92_AIF3TX7MIX_INPUT_2_VOLUME: + case CS47L92_AIF3TX7MIX_INPUT_3_SOURCE: + case CS47L92_AIF3TX7MIX_INPUT_3_VOLUME: + case CS47L92_AIF3TX7MIX_INPUT_4_SOURCE: + case CS47L92_AIF3TX7MIX_INPUT_4_VOLUME: + case CS47L92_AIF3TX8MIX_INPUT_1_SOURCE: + case CS47L92_AIF3TX8MIX_INPUT_1_VOLUME: + case CS47L92_AIF3TX8MIX_INPUT_2_SOURCE: + case CS47L92_AIF3TX8MIX_INPUT_2_VOLUME: + case CS47L92_AIF3TX8MIX_INPUT_3_SOURCE: + case CS47L92_AIF3TX8MIX_INPUT_3_VOLUME: + case CS47L92_AIF3TX8MIX_INPUT_4_SOURCE: + case CS47L92_AIF3TX8MIX_INPUT_4_VOLUME: + case MADERA_SLIMTX1MIX_INPUT_1_SOURCE: + case MADERA_SLIMTX1MIX_INPUT_1_VOLUME: + case MADERA_SLIMTX1MIX_INPUT_2_SOURCE: + case MADERA_SLIMTX1MIX_INPUT_2_VOLUME: + case MADERA_SLIMTX1MIX_INPUT_3_SOURCE: + case MADERA_SLIMTX1MIX_INPUT_3_VOLUME: + case MADERA_SLIMTX1MIX_INPUT_4_SOURCE: + case MADERA_SLIMTX1MIX_INPUT_4_VOLUME: + case MADERA_SLIMTX2MIX_INPUT_1_SOURCE: + case MADERA_SLIMTX2MIX_INPUT_1_VOLUME: + case MADERA_SLIMTX2MIX_INPUT_2_SOURCE: + case MADERA_SLIMTX2MIX_INPUT_2_VOLUME: + case MADERA_SLIMTX2MIX_INPUT_3_SOURCE: + case MADERA_SLIMTX2MIX_INPUT_3_VOLUME: + case MADERA_SLIMTX2MIX_INPUT_4_SOURCE: + case MADERA_SLIMTX2MIX_INPUT_4_VOLUME: + case MADERA_SLIMTX3MIX_INPUT_1_SOURCE: + case MADERA_SLIMTX3MIX_INPUT_1_VOLUME: + case MADERA_SLIMTX3MIX_INPUT_2_SOURCE: + case MADERA_SLIMTX3MIX_INPUT_2_VOLUME: + case MADERA_SLIMTX3MIX_INPUT_3_SOURCE: + case MADERA_SLIMTX3MIX_INPUT_3_VOLUME: + case MADERA_SLIMTX3MIX_INPUT_4_SOURCE: + case MADERA_SLIMTX3MIX_INPUT_4_VOLUME: + case MADERA_SLIMTX4MIX_INPUT_1_SOURCE: + case MADERA_SLIMTX4MIX_INPUT_1_VOLUME: + case MADERA_SLIMTX4MIX_INPUT_2_SOURCE: + case MADERA_SLIMTX4MIX_INPUT_2_VOLUME: + case MADERA_SLIMTX4MIX_INPUT_3_SOURCE: + case MADERA_SLIMTX4MIX_INPUT_3_VOLUME: + case MADERA_SLIMTX4MIX_INPUT_4_SOURCE: + case MADERA_SLIMTX4MIX_INPUT_4_VOLUME: + case MADERA_SLIMTX5MIX_INPUT_1_SOURCE: + case MADERA_SLIMTX5MIX_INPUT_1_VOLUME: + case MADERA_SLIMTX5MIX_INPUT_2_SOURCE: + case MADERA_SLIMTX5MIX_INPUT_2_VOLUME: + case MADERA_SLIMTX5MIX_INPUT_3_SOURCE: + case MADERA_SLIMTX5MIX_INPUT_3_VOLUME: + case MADERA_SLIMTX5MIX_INPUT_4_SOURCE: + case MADERA_SLIMTX5MIX_INPUT_4_VOLUME: + case MADERA_SLIMTX6MIX_INPUT_1_SOURCE: + case MADERA_SLIMTX6MIX_INPUT_1_VOLUME: + case MADERA_SLIMTX6MIX_INPUT_2_SOURCE: + case MADERA_SLIMTX6MIX_INPUT_2_VOLUME: + case MADERA_SLIMTX6MIX_INPUT_3_SOURCE: + case MADERA_SLIMTX6MIX_INPUT_3_VOLUME: + case MADERA_SLIMTX6MIX_INPUT_4_SOURCE: + case MADERA_SLIMTX6MIX_INPUT_4_VOLUME: + case MADERA_SLIMTX7MIX_INPUT_1_SOURCE: + case MADERA_SLIMTX7MIX_INPUT_1_VOLUME: + case MADERA_SLIMTX7MIX_INPUT_2_SOURCE: + case MADERA_SLIMTX7MIX_INPUT_2_VOLUME: + case MADERA_SLIMTX7MIX_INPUT_3_SOURCE: + case MADERA_SLIMTX7MIX_INPUT_3_VOLUME: + case MADERA_SLIMTX7MIX_INPUT_4_SOURCE: + case MADERA_SLIMTX7MIX_INPUT_4_VOLUME: + case MADERA_SLIMTX8MIX_INPUT_1_SOURCE: + case MADERA_SLIMTX8MIX_INPUT_1_VOLUME: + case MADERA_SLIMTX8MIX_INPUT_2_SOURCE: + case MADERA_SLIMTX8MIX_INPUT_2_VOLUME: + case MADERA_SLIMTX8MIX_INPUT_3_SOURCE: + case MADERA_SLIMTX8MIX_INPUT_3_VOLUME: + case MADERA_SLIMTX8MIX_INPUT_4_SOURCE: + case MADERA_SLIMTX8MIX_INPUT_4_VOLUME: + case MADERA_SPDIF1TX1MIX_INPUT_1_SOURCE: + case MADERA_SPDIF1TX1MIX_INPUT_1_VOLUME: + case MADERA_SPDIF1TX2MIX_INPUT_1_SOURCE: + case MADERA_SPDIF1TX2MIX_INPUT_1_VOLUME: + case MADERA_EQ1MIX_INPUT_1_SOURCE: + case MADERA_EQ1MIX_INPUT_1_VOLUME: + case MADERA_EQ1MIX_INPUT_2_SOURCE: + case MADERA_EQ1MIX_INPUT_2_VOLUME: + case MADERA_EQ1MIX_INPUT_3_SOURCE: + case MADERA_EQ1MIX_INPUT_3_VOLUME: + case MADERA_EQ1MIX_INPUT_4_SOURCE: + case MADERA_EQ1MIX_INPUT_4_VOLUME: + case MADERA_EQ2MIX_INPUT_1_SOURCE: + case MADERA_EQ2MIX_INPUT_1_VOLUME: + case MADERA_EQ2MIX_INPUT_2_SOURCE: + case MADERA_EQ2MIX_INPUT_2_VOLUME: + case MADERA_EQ2MIX_INPUT_3_SOURCE: + case MADERA_EQ2MIX_INPUT_3_VOLUME: + case MADERA_EQ2MIX_INPUT_4_SOURCE: + case MADERA_EQ2MIX_INPUT_4_VOLUME: + case MADERA_EQ3MIX_INPUT_1_SOURCE: + case MADERA_EQ3MIX_INPUT_1_VOLUME: + case MADERA_EQ3MIX_INPUT_2_SOURCE: + case MADERA_EQ3MIX_INPUT_2_VOLUME: + case MADERA_EQ3MIX_INPUT_3_SOURCE: + case MADERA_EQ3MIX_INPUT_3_VOLUME: + case MADERA_EQ3MIX_INPUT_4_SOURCE: + case MADERA_EQ3MIX_INPUT_4_VOLUME: + case MADERA_EQ4MIX_INPUT_1_SOURCE: + case MADERA_EQ4MIX_INPUT_1_VOLUME: + case MADERA_EQ4MIX_INPUT_2_SOURCE: + case MADERA_EQ4MIX_INPUT_2_VOLUME: + case MADERA_EQ4MIX_INPUT_3_SOURCE: + case MADERA_EQ4MIX_INPUT_3_VOLUME: + case MADERA_EQ4MIX_INPUT_4_SOURCE: + case MADERA_EQ4MIX_INPUT_4_VOLUME: + case MADERA_DRC1LMIX_INPUT_1_SOURCE: + case MADERA_DRC1LMIX_INPUT_1_VOLUME: + case MADERA_DRC1LMIX_INPUT_2_SOURCE: + case MADERA_DRC1LMIX_INPUT_2_VOLUME: + case MADERA_DRC1LMIX_INPUT_3_SOURCE: + case MADERA_DRC1LMIX_INPUT_3_VOLUME: + case MADERA_DRC1LMIX_INPUT_4_SOURCE: + case MADERA_DRC1LMIX_INPUT_4_VOLUME: + case MADERA_DRC1RMIX_INPUT_1_SOURCE: + case MADERA_DRC1RMIX_INPUT_1_VOLUME: + case MADERA_DRC1RMIX_INPUT_2_SOURCE: + case MADERA_DRC1RMIX_INPUT_2_VOLUME: + case MADERA_DRC1RMIX_INPUT_3_SOURCE: + case MADERA_DRC1RMIX_INPUT_3_VOLUME: + case MADERA_DRC1RMIX_INPUT_4_SOURCE: + case MADERA_DRC1RMIX_INPUT_4_VOLUME: + case MADERA_DRC2LMIX_INPUT_1_SOURCE: + case MADERA_DRC2LMIX_INPUT_1_VOLUME: + case MADERA_DRC2LMIX_INPUT_2_SOURCE: + case MADERA_DRC2LMIX_INPUT_2_VOLUME: + case MADERA_DRC2LMIX_INPUT_3_SOURCE: + case MADERA_DRC2LMIX_INPUT_3_VOLUME: + case MADERA_DRC2LMIX_INPUT_4_SOURCE: + case MADERA_DRC2LMIX_INPUT_4_VOLUME: + case MADERA_DRC2RMIX_INPUT_1_SOURCE: + case MADERA_DRC2RMIX_INPUT_1_VOLUME: + case MADERA_DRC2RMIX_INPUT_2_SOURCE: + case MADERA_DRC2RMIX_INPUT_2_VOLUME: + case MADERA_DRC2RMIX_INPUT_3_SOURCE: + case MADERA_DRC2RMIX_INPUT_3_VOLUME: + case MADERA_DRC2RMIX_INPUT_4_SOURCE: + case MADERA_DRC2RMIX_INPUT_4_VOLUME: + case MADERA_HPLP1MIX_INPUT_1_SOURCE: + case MADERA_HPLP1MIX_INPUT_1_VOLUME: + case MADERA_HPLP1MIX_INPUT_2_SOURCE: + case MADERA_HPLP1MIX_INPUT_2_VOLUME: + case MADERA_HPLP1MIX_INPUT_3_SOURCE: + case MADERA_HPLP1MIX_INPUT_3_VOLUME: + case MADERA_HPLP1MIX_INPUT_4_SOURCE: + case MADERA_HPLP1MIX_INPUT_4_VOLUME: + case MADERA_HPLP2MIX_INPUT_1_SOURCE: + case MADERA_HPLP2MIX_INPUT_1_VOLUME: + case MADERA_HPLP2MIX_INPUT_2_SOURCE: + case MADERA_HPLP2MIX_INPUT_2_VOLUME: + case MADERA_HPLP2MIX_INPUT_3_SOURCE: + case MADERA_HPLP2MIX_INPUT_3_VOLUME: + case MADERA_HPLP2MIX_INPUT_4_SOURCE: + case MADERA_HPLP2MIX_INPUT_4_VOLUME: + case MADERA_HPLP3MIX_INPUT_1_SOURCE: + case MADERA_HPLP3MIX_INPUT_1_VOLUME: + case MADERA_HPLP3MIX_INPUT_2_SOURCE: + case MADERA_HPLP3MIX_INPUT_2_VOLUME: + case MADERA_HPLP3MIX_INPUT_3_SOURCE: + case MADERA_HPLP3MIX_INPUT_3_VOLUME: + case MADERA_HPLP3MIX_INPUT_4_SOURCE: + case MADERA_HPLP3MIX_INPUT_4_VOLUME: + case MADERA_HPLP4MIX_INPUT_1_SOURCE: + case MADERA_HPLP4MIX_INPUT_1_VOLUME: + case MADERA_HPLP4MIX_INPUT_2_SOURCE: + case MADERA_HPLP4MIX_INPUT_2_VOLUME: + case MADERA_HPLP4MIX_INPUT_3_SOURCE: + case MADERA_HPLP4MIX_INPUT_3_VOLUME: + case MADERA_HPLP4MIX_INPUT_4_SOURCE: + case MADERA_HPLP4MIX_INPUT_4_VOLUME: + case MADERA_DSP1LMIX_INPUT_1_SOURCE: + case MADERA_DSP1LMIX_INPUT_1_VOLUME: + case MADERA_DSP1LMIX_INPUT_2_SOURCE: + case MADERA_DSP1LMIX_INPUT_2_VOLUME: + case MADERA_DSP1LMIX_INPUT_3_SOURCE: + case MADERA_DSP1LMIX_INPUT_3_VOLUME: + case MADERA_DSP1LMIX_INPUT_4_SOURCE: + case MADERA_DSP1LMIX_INPUT_4_VOLUME: + case MADERA_DSP1RMIX_INPUT_1_SOURCE: + case MADERA_DSP1RMIX_INPUT_1_VOLUME: + case MADERA_DSP1RMIX_INPUT_2_SOURCE: + case MADERA_DSP1RMIX_INPUT_2_VOLUME: + case MADERA_DSP1RMIX_INPUT_3_SOURCE: + case MADERA_DSP1RMIX_INPUT_3_VOLUME: + case MADERA_DSP1RMIX_INPUT_4_SOURCE: + case MADERA_DSP1RMIX_INPUT_4_VOLUME: + case MADERA_DSP1AUX1MIX_INPUT_1_SOURCE: + case MADERA_DSP1AUX2MIX_INPUT_1_SOURCE: + case MADERA_DSP1AUX3MIX_INPUT_1_SOURCE: + case MADERA_DSP1AUX4MIX_INPUT_1_SOURCE: + case MADERA_DSP1AUX5MIX_INPUT_1_SOURCE: + case MADERA_DSP1AUX6MIX_INPUT_1_SOURCE: + case MADERA_ASRC1_1LMIX_INPUT_1_SOURCE: + case MADERA_ASRC1_1RMIX_INPUT_1_SOURCE: + case MADERA_ASRC1_2LMIX_INPUT_1_SOURCE: + case MADERA_ASRC1_2RMIX_INPUT_1_SOURCE: + case MADERA_ISRC1DEC1MIX_INPUT_1_SOURCE: + case MADERA_ISRC1DEC2MIX_INPUT_1_SOURCE: + case MADERA_ISRC1INT1MIX_INPUT_1_SOURCE: + case MADERA_ISRC1INT2MIX_INPUT_1_SOURCE: + case MADERA_ISRC2DEC1MIX_INPUT_1_SOURCE: + case MADERA_ISRC2DEC2MIX_INPUT_1_SOURCE: + case MADERA_ISRC2INT1MIX_INPUT_1_SOURCE: + case MADERA_ISRC2INT2MIX_INPUT_1_SOURCE: + case MADERA_DFC1MIX_INPUT_1_SOURCE: + case MADERA_DFC2MIX_INPUT_1_SOURCE: + case MADERA_DFC3MIX_INPUT_1_SOURCE: + case MADERA_DFC4MIX_INPUT_1_SOURCE: + case MADERA_DFC5MIX_INPUT_1_SOURCE: + case MADERA_DFC6MIX_INPUT_1_SOURCE: + case MADERA_DFC7MIX_INPUT_1_SOURCE: + case MADERA_DFC8MIX_INPUT_1_SOURCE: + case MADERA_FX_CTRL1 ... MADERA_FX_CTRL2: + case MADERA_EQ1_1 ... MADERA_EQ1_21: + case MADERA_EQ2_1 ... MADERA_EQ2_21: + case MADERA_EQ3_1 ... MADERA_EQ3_21: + case MADERA_EQ4_1 ... MADERA_EQ4_21: + case MADERA_DRC1_CTRL1 ... MADERA_DRC1_CTRL5: + case MADERA_DRC2_CTRL1 ... MADERA_DRC2_CTRL5: + case MADERA_HPLPF1_1 ... MADERA_HPLPF1_2: + case MADERA_HPLPF2_1 ... MADERA_HPLPF2_2: + case MADERA_HPLPF3_1 ... MADERA_HPLPF3_2: + case MADERA_HPLPF4_1 ... MADERA_HPLPF4_2: + case MADERA_ASRC1_ENABLE: + case MADERA_ASRC1_STATUS: + case MADERA_ASRC1_RATE1 ... MADERA_ASRC1_RATE2: + case MADERA_ISRC_1_CTRL_1 ... MADERA_ISRC_1_CTRL_3: + case MADERA_ISRC_2_CTRL_1 ... MADERA_ISRC_2_CTRL_3: + case MADERA_AUXPDM1_CTRL_0 ... MADERA_AUXPDM1_CTRL_1: + case MADERA_DFC1_CTRL: + case MADERA_DFC1_RX: + case MADERA_DFC1_TX: + case MADERA_DFC2_CTRL: + case MADERA_DFC2_RX: + case MADERA_DFC2_TX: + case MADERA_DFC3_CTRL: + case MADERA_DFC3_RX: + case MADERA_DFC3_TX: + case MADERA_DFC4_CTRL: + case MADERA_DFC4_RX: + case MADERA_DFC4_TX: + case MADERA_DFC5_CTRL: + case MADERA_DFC5_RX: + case MADERA_DFC5_TX: + case MADERA_DFC6_CTRL: + case MADERA_DFC6_RX: + case MADERA_DFC6_TX: + case MADERA_DFC7_CTRL: + case MADERA_DFC7_RX: + case MADERA_DFC7_TX: + case MADERA_DFC8_CTRL: + case MADERA_DFC8_RX: + case MADERA_DFC8_TX: + case MADERA_DFC_STATUS: + case MADERA_GPIO1_CTRL_1 ... MADERA_GPIO16_CTRL_2: + case MADERA_IRQ1_STATUS_1 ... MADERA_IRQ1_STATUS_33: + case MADERA_IRQ1_MASK_1 ... MADERA_IRQ1_MASK_33: + case MADERA_IRQ1_RAW_STATUS_1 ... MADERA_IRQ1_RAW_STATUS_33: + case MADERA_INTERRUPT_DEBOUNCE_7: + case MADERA_IRQ1_CTRL: + return true; + default: + return false; + } +} + +static bool cs47l92_16bit_volatile_register(struct device *dev, + unsigned int reg) +{ + switch (reg) { + case MADERA_SOFTWARE_RESET: + case MADERA_HARDWARE_REVISION: + case MADERA_WRITE_SEQUENCER_CTRL_0 ... MADERA_WRITE_SEQUENCER_CTRL_2: + case MADERA_HAPTICS_STATUS: + case MADERA_SAMPLE_RATE_1_STATUS: + case MADERA_SAMPLE_RATE_2_STATUS: + case MADERA_SAMPLE_RATE_3_STATUS: + case MADERA_ASYNC_SAMPLE_RATE_1_STATUS: + case MADERA_ASYNC_SAMPLE_RATE_2_STATUS: + case MADERA_HP_CTRL_1L: + case MADERA_HP_CTRL_1R: + case MADERA_HP_CTRL_2L: + case MADERA_HP_CTRL_2R: + case MADERA_HP_CTRL_3L: + case MADERA_HP_CTRL_3R: + case MADERA_MIC_DETECT_1_CONTROL_3: + case MADERA_MIC_DETECT_1_CONTROL_4: + case MADERA_MIC_DETECT_2_CONTROL_3: + case MADERA_MIC_DETECT_2_CONTROL_4: + case MADERA_HEADPHONE_DETECT_2: + case MADERA_HEADPHONE_DETECT_3: + case MADERA_HEADPHONE_DETECT_5: + case MADERA_INPUT_ENABLES_STATUS: + case MADERA_OUTPUT_STATUS_1: + case MADERA_RAW_OUTPUT_STATUS_1: + case MADERA_SPD1_TX_CHANNEL_STATUS_1: + case MADERA_SPD1_TX_CHANNEL_STATUS_2: + case MADERA_SPD1_TX_CHANNEL_STATUS_3: + case MADERA_SLIMBUS_RX_PORT_STATUS: + case MADERA_SLIMBUS_TX_PORT_STATUS: + case MADERA_FX_CTRL2: + case MADERA_ASRC1_STATUS: + case MADERA_DFC_STATUS: + case MADERA_IRQ1_STATUS_1 ... MADERA_IRQ1_STATUS_33: + case MADERA_IRQ1_RAW_STATUS_1 ... MADERA_IRQ1_RAW_STATUS_33: + return true; + default: + return false; + } +} + +static bool cs47l92_32bit_readable_register(struct device *dev, + unsigned int reg) +{ + switch (reg) { + case MADERA_WSEQ_SEQUENCE_1 ... MADERA_WSEQ_SEQUENCE_508: + case MADERA_OTP_HPDET_CAL_1 ... MADERA_OTP_HPDET_CAL_2: + case MADERA_DSP1_CONFIG_1 ... MADERA_DSP1_PMEM_ERR_ADDR___XMEM_ERR_ADDR: + return true; + default: + return cs47l92_is_adsp_memory(reg); + } +} + +static bool cs47l92_32bit_volatile_register(struct device *dev, + unsigned int reg) +{ + switch (reg) { + case MADERA_WSEQ_SEQUENCE_1 ... MADERA_WSEQ_SEQUENCE_508: + case MADERA_OTP_HPDET_CAL_1 ... MADERA_OTP_HPDET_CAL_2: + case MADERA_DSP1_CONFIG_1 ... MADERA_DSP1_PMEM_ERR_ADDR___XMEM_ERR_ADDR: + return true; + default: + return cs47l92_is_adsp_memory(reg); + } +} + +const struct regmap_config cs47l92_16bit_spi_regmap = { + .name = "cs47l92_16bit", + .reg_bits = 32, + .pad_bits = 16, + .val_bits = 16, + .reg_format_endian = REGMAP_ENDIAN_BIG, + .val_format_endian = REGMAP_ENDIAN_BIG, + + .max_register = MADERA_INTERRUPT_RAW_STATUS_1, + .readable_reg = &cs47l92_16bit_readable_register, + .volatile_reg = &cs47l92_16bit_volatile_register, + + .cache_type = REGCACHE_RBTREE, + .reg_defaults = cs47l92_reg_default, + .num_reg_defaults = ARRAY_SIZE(cs47l92_reg_default), +}; +EXPORT_SYMBOL_GPL(cs47l92_16bit_spi_regmap); + +const struct regmap_config cs47l92_16bit_i2c_regmap = { + .name = "cs47l92_16bit", + .reg_bits = 32, + .val_bits = 16, + .reg_format_endian = REGMAP_ENDIAN_BIG, + .val_format_endian = REGMAP_ENDIAN_BIG, + + .max_register = MADERA_INTERRUPT_RAW_STATUS_1, + .readable_reg = &cs47l92_16bit_readable_register, + .volatile_reg = &cs47l92_16bit_volatile_register, + + .cache_type = REGCACHE_RBTREE, + .reg_defaults = cs47l92_reg_default, + .num_reg_defaults = ARRAY_SIZE(cs47l92_reg_default), +}; +EXPORT_SYMBOL_GPL(cs47l92_16bit_i2c_regmap); + +const struct regmap_config cs47l92_32bit_spi_regmap = { + .name = "cs47l92_32bit", + .reg_bits = 32, + .reg_stride = 2, + .pad_bits = 16, + .val_bits = 32, + .reg_format_endian = REGMAP_ENDIAN_BIG, + .val_format_endian = REGMAP_ENDIAN_BIG, + + .max_register = MADERA_DSP1_PMEM_ERR_ADDR___XMEM_ERR_ADDR, + .readable_reg = &cs47l92_32bit_readable_register, + .volatile_reg = &cs47l92_32bit_volatile_register, + + .cache_type = REGCACHE_RBTREE, +}; +EXPORT_SYMBOL_GPL(cs47l92_32bit_spi_regmap); + +const struct regmap_config cs47l92_32bit_i2c_regmap = { + .name = "cs47l92_32bit", + .reg_bits = 32, + .reg_stride = 2, + .val_bits = 32, + .reg_format_endian = REGMAP_ENDIAN_BIG, + .val_format_endian = REGMAP_ENDIAN_BIG, + + .max_register = MADERA_DSP1_PMEM_ERR_ADDR___XMEM_ERR_ADDR, + .readable_reg = &cs47l92_32bit_readable_register, + .volatile_reg = &cs47l92_32bit_volatile_register, + + .cache_type = REGCACHE_RBTREE, +}; +EXPORT_SYMBOL_GPL(cs47l92_32bit_i2c_regmap); diff --git a/drivers/mfd/madera-core.c b/drivers/mfd/madera-core.c index a354567ebc86..b9e9c169c6cc 100644 --- a/drivers/mfd/madera-core.c +++ b/drivers/mfd/madera-core.c @@ -35,6 +35,7 @@ #define CS47L35_SILICON_ID 0x6360 #define CS47L85_SILICON_ID 0x6338 #define CS47L90_SILICON_ID 0x6364 +#define CS47L92_SILICON_ID 0x6371 #define MADERA_32KZ_MCLK2 1 @@ -148,6 +149,29 @@ static const struct mfd_cell cs47l90_devs[] = { }, }; +static const char * const cs47l92_supplies[] = { + "MICVDD", + "CPVDD1", + "CPVDD2", +}; + +static const struct mfd_cell cs47l92_devs[] = { + { .name = "madera-pinctrl" }, + { .name = "madera-irq", }, + { .name = "madera-micsupp", }, + { .name = "madera-gpio" }, + { + .name = "madera-extcon", + .parent_supplies = cs47l92_supplies, + .num_parent_supplies = 1, /* We only need MICVDD */ + }, + { + .name = "cs47l92-codec", + .parent_supplies = cs47l92_supplies, + .num_parent_supplies = ARRAY_SIZE(cs47l92_supplies), + }, +}; + /* Used by madera-i2c and madera-spi drivers */ const char *madera_name_from_type(enum madera_type type) { @@ -162,6 +186,12 @@ const char *madera_name_from_type(enum madera_type type) return "CS47L90"; case CS47L91: return "CS47L91"; + case CS42L92: + return "CS42L92"; + case CS47L92: + return "CS47L92"; + case CS47L93: + return "CS47L93"; case WM1840: return "WM1840"; default: @@ -321,6 +351,9 @@ const struct of_device_id madera_of_match[] = { { .compatible = "cirrus,cs47l85", .data = (void *)CS47L85 }, { .compatible = "cirrus,cs47l90", .data = (void *)CS47L90 }, { .compatible = "cirrus,cs47l91", .data = (void *)CS47L91 }, + { .compatible = "cirrus,cs42l92", .data = (void *)CS42L92 }, + { .compatible = "cirrus,cs47l92", .data = (void *)CS47L92 }, + { .compatible = "cirrus,cs47l93", .data = (void *)CS47L93 }, { .compatible = "cirrus,wm1840", .data = (void *)WM1840 }, {} }; @@ -385,6 +418,13 @@ static void madera_set_micbias_info(struct madera *madera) madera->num_childbias[0] = 4; madera->num_childbias[1] = 4; return; + case CS42L92: + case CS47L92: + case CS47L93: + madera->num_micbias = 2; + madera->num_childbias[0] = 4; + madera->num_childbias[1] = 2; + return; default: return; } @@ -436,6 +476,9 @@ int madera_dev_init(struct madera *madera) case CS47L35: case CS47L90: case CS47L91: + case CS42L92: + case CS47L92: + case CS47L93: break; case CS47L85: case WM1840: @@ -556,6 +599,21 @@ int madera_dev_init(struct madera *madera) } } break; + case CS47L92_SILICON_ID: + if (IS_ENABLED(CONFIG_MFD_CS47L92)) { + switch (madera->type) { + case CS42L92: + case CS47L92: + case CS47L93: + patch_fn = cs47l92_patch; + mfd_devs = cs47l92_devs; + n_devs = ARRAY_SIZE(cs47l92_devs); + break; + default: + break; + } + } + break; default: dev_err(madera->dev, "Unknown device ID: %x\n", hwid); ret = -EINVAL; diff --git a/drivers/mfd/madera-i2c.c b/drivers/mfd/madera-i2c.c index bd868459cedb..3f4ab5dcf5c3 100644 --- a/drivers/mfd/madera-i2c.c +++ b/drivers/mfd/madera-i2c.c @@ -65,6 +65,14 @@ static int madera_i2c_probe(struct i2c_client *i2c, regmap_32bit_config = &cs47l90_32bit_i2c_regmap; } break; + case CS42L92: + case CS47L92: + case CS47L93: + if (IS_ENABLED(CONFIG_MFD_CS47L92)) { + regmap_16bit_config = &cs47l92_16bit_i2c_regmap; + regmap_32bit_config = &cs47l92_32bit_i2c_regmap; + } + break; default: dev_err(&i2c->dev, "Unknown Madera I2C device type %ld\n", type); @@ -124,6 +132,9 @@ static const struct i2c_device_id madera_i2c_id[] = { { "cs47l85", CS47L85 }, { "cs47l90", CS47L90 }, { "cs47l91", CS47L91 }, + { "cs42l92", CS42L92 }, + { "cs47l92", CS47L92 }, + { "cs47l93", CS47L93 }, { "wm1840", WM1840 }, { } }; diff --git a/drivers/mfd/madera-spi.c b/drivers/mfd/madera-spi.c index a36741b73c25..d76c7e7376d7 100644 --- a/drivers/mfd/madera-spi.c +++ b/drivers/mfd/madera-spi.c @@ -65,6 +65,14 @@ static int madera_spi_probe(struct spi_device *spi) regmap_32bit_config = &cs47l90_32bit_spi_regmap; } break; + case CS42L92: + case CS47L92: + case CS47L93: + if (IS_ENABLED(CONFIG_MFD_CS47L92)) { + regmap_16bit_config = &cs47l92_16bit_spi_regmap; + regmap_32bit_config = &cs47l92_32bit_spi_regmap; + } + break; default: dev_err(&spi->dev, "Unknown Madera SPI device type %ld\n", type); @@ -123,6 +131,9 @@ static const struct spi_device_id madera_spi_ids[] = { { "cs47l85", CS47L85 }, { "cs47l90", CS47L90 }, { "cs47l91", CS47L91 }, + { "cs42l92", CS42L92 }, + { "cs47l92", CS47L92 }, + { "cs47l93", CS47L93 }, { "wm1840", WM1840 }, { } }; diff --git a/drivers/mfd/madera.h b/drivers/mfd/madera.h index ccc16f2a1288..69a40aba7e69 100644 --- a/drivers/mfd/madera.h +++ b/drivers/mfd/madera.h @@ -47,4 +47,11 @@ extern const struct regmap_config cs47l90_32bit_spi_regmap; extern const struct regmap_config cs47l90_16bit_i2c_regmap; extern const struct regmap_config cs47l90_32bit_i2c_regmap; int cs47l90_patch(struct madera *madera); + +extern const struct regmap_config cs47l92_16bit_spi_regmap; +extern const struct regmap_config cs47l92_32bit_spi_regmap; +extern const struct regmap_config cs47l92_16bit_i2c_regmap; +extern const struct regmap_config cs47l92_32bit_i2c_regmap; +int cs47l92_patch(struct madera *madera); + #endif diff --git a/include/linux/mfd/madera/core.h b/include/linux/mfd/madera/core.h index 98dd3cb5e84d..7b87f9a02ecc 100644 --- a/include/linux/mfd/madera/core.h +++ b/include/linux/mfd/madera/core.h @@ -26,8 +26,11 @@ enum madera_type { CS47L85 = 2, CS47L90 = 3, CS47L91 = 4, + CS47L92 = 5, + CS47L93 = 6, WM1840 = 7, CS47L15 = 8, + CS42L92 = 9, }; #define MADERA_MAX_CORE_SUPPLIES 2 @@ -37,6 +40,7 @@ enum madera_type { #define CS47L35_NUM_GPIOS 16 #define CS47L85_NUM_GPIOS 40 #define CS47L90_NUM_GPIOS 38 +#define CS47L92_NUM_GPIOS 16 #define MADERA_MAX_MICBIAS 4 diff --git a/include/linux/mfd/madera/registers.h b/include/linux/mfd/madera/registers.h index 5b054d511c6a..6439c0282ac6 100644 --- a/include/linux/mfd/madera/registers.h +++ b/include/linux/mfd/madera/registers.h @@ -77,9 +77,15 @@ #define MADERA_FLL1_CONTROL_5 0x175 #define MADERA_FLL1_CONTROL_6 0x176 #define MADERA_FLL1_LOOP_FILTER_TEST_1 0x177 +#define CS47L92_FLL1_CONTROL_7 0x177 #define MADERA_FLL1_NCO_TEST_0 0x178 +#define CS47L92_FLL1_CONTROL_8 0x178 #define MADERA_FLL1_CONTROL_7 0x179 +#define CS47L92_FLL1_CONTROL_9 0x179 #define MADERA_FLL1_EFS_2 0x17A +#define CS47L92_FLL1_CONTROL_10 0x17A +#define MADERA_FLL1_CONTROL_11 0x17B +#define MADERA_FLL1_DIGITAL_TEST_1 0x17D #define CS47L35_FLL1_SYNCHRONISER_1 0x17F #define CS47L35_FLL1_SYNCHRONISER_2 0x180 #define CS47L35_FLL1_SYNCHRONISER_3 0x181 @@ -98,6 +104,7 @@ #define MADERA_FLL1_SYNCHRONISER_7 0x187 #define MADERA_FLL1_SPREAD_SPECTRUM 0x189 #define MADERA_FLL1_GPIO_CLOCK 0x18A +#define CS47L92_FLL1_GPIO_CLOCK 0x18E #define MADERA_FLL2_CONTROL_1 0x191 #define MADERA_FLL2_CONTROL_2 0x192 #define MADERA_FLL2_CONTROL_3 0x193 @@ -105,9 +112,15 @@ #define MADERA_FLL2_CONTROL_5 0x195 #define MADERA_FLL2_CONTROL_6 0x196 #define MADERA_FLL2_LOOP_FILTER_TEST_1 0x197 +#define CS47L92_FLL2_CONTROL_7 0x197 #define MADERA_FLL2_NCO_TEST_0 0x198 +#define CS47L92_FLL2_CONTROL_8 0x198 #define MADERA_FLL2_CONTROL_7 0x199 +#define CS47L92_FLL2_CONTROL_9 0x199 #define MADERA_FLL2_EFS_2 0x19A +#define CS47L92_FLL2_CONTROL_10 0x19A +#define MADERA_FLL2_CONTROL_11 0x19B +#define MADERA_FLL2_DIGITAL_TEST_1 0x19D #define MADERA_FLL2_SYNCHRONISER_1 0x1A1 #define MADERA_FLL2_SYNCHRONISER_2 0x1A2 #define MADERA_FLL2_SYNCHRONISER_3 0x1A3 @@ -117,6 +130,7 @@ #define MADERA_FLL2_SYNCHRONISER_7 0x1A7 #define MADERA_FLL2_SPREAD_SPECTRUM 0x1A9 #define MADERA_FLL2_GPIO_CLOCK 0x1AA +#define CS47L92_FLL2_GPIO_CLOCK 0x1AE #define MADERA_FLL3_CONTROL_1 0x1B1 #define MADERA_FLL3_CONTROL_2 0x1B2 #define MADERA_FLL3_CONTROL_3 0x1B3 @@ -267,6 +281,7 @@ #define MADERA_NOISE_GATE_SELECT_2R 0x41F #define MADERA_OUTPUT_PATH_CONFIG_3L 0x420 #define MADERA_DAC_DIGITAL_VOLUME_3L 0x421 +#define MADERA_OUTPUT_PATH_CONFIG_3 0x422 #define MADERA_NOISE_GATE_SELECT_3L 0x423 #define MADERA_OUTPUT_PATH_CONFIG_3R 0x424 #define MADERA_DAC_DIGITAL_VOLUME_3R 0x425 @@ -369,8 +384,20 @@ #define MADERA_AIF3_FRAME_CTRL_2 0x588 #define MADERA_AIF3_FRAME_CTRL_3 0x589 #define MADERA_AIF3_FRAME_CTRL_4 0x58A +#define MADERA_AIF3_FRAME_CTRL_5 0x58B +#define MADERA_AIF3_FRAME_CTRL_6 0x58C +#define MADERA_AIF3_FRAME_CTRL_7 0x58D +#define MADERA_AIF3_FRAME_CTRL_8 0x58E +#define MADERA_AIF3_FRAME_CTRL_9 0x58F +#define MADERA_AIF3_FRAME_CTRL_10 0x590 #define MADERA_AIF3_FRAME_CTRL_11 0x591 #define MADERA_AIF3_FRAME_CTRL_12 0x592 +#define MADERA_AIF3_FRAME_CTRL_13 0x593 +#define MADERA_AIF3_FRAME_CTRL_14 0x594 +#define MADERA_AIF3_FRAME_CTRL_15 0x595 +#define MADERA_AIF3_FRAME_CTRL_16 0x596 +#define MADERA_AIF3_FRAME_CTRL_17 0x597 +#define MADERA_AIF3_FRAME_CTRL_18 0x598 #define MADERA_AIF3_TX_ENABLES 0x599 #define MADERA_AIF3_RX_ENABLES 0x59A #define MADERA_AIF3_FORCE_WRITE 0x59B @@ -662,6 +689,54 @@ #define MADERA_AIF3TX2MIX_INPUT_3_VOLUME 0x78D #define MADERA_AIF3TX2MIX_INPUT_4_SOURCE 0x78E #define MADERA_AIF3TX2MIX_INPUT_4_VOLUME 0x78F +#define MADERA_AIF3TX3MIX_INPUT_1_SOURCE 0x790 +#define MADERA_AIF3TX3MIX_INPUT_1_VOLUME 0x791 +#define MADERA_AIF3TX3MIX_INPUT_2_SOURCE 0x792 +#define MADERA_AIF3TX3MIX_INPUT_2_VOLUME 0x793 +#define MADERA_AIF3TX3MIX_INPUT_3_SOURCE 0x794 +#define MADERA_AIF3TX3MIX_INPUT_3_VOLUME 0x795 +#define MADERA_AIF3TX3MIX_INPUT_4_SOURCE 0x796 +#define MADERA_AIF3TX3MIX_INPUT_4_VOLUME 0x797 +#define MADERA_AIF3TX4MIX_INPUT_1_SOURCE 0x798 +#define MADERA_AIF3TX4MIX_INPUT_1_VOLUME 0x799 +#define MADERA_AIF3TX4MIX_INPUT_2_SOURCE 0x79A +#define MADERA_AIF3TX4MIX_INPUT_2_VOLUME 0x79B +#define MADERA_AIF3TX4MIX_INPUT_3_SOURCE 0x79C +#define MADERA_AIF3TX4MIX_INPUT_3_VOLUME 0x79D +#define MADERA_AIF3TX4MIX_INPUT_4_SOURCE 0x79E +#define MADERA_AIF3TX4MIX_INPUT_4_VOLUME 0x79F +#define CS47L92_AIF3TX5MIX_INPUT_1_SOURCE 0x7A0 +#define CS47L92_AIF3TX5MIX_INPUT_1_VOLUME 0x7A1 +#define CS47L92_AIF3TX5MIX_INPUT_2_SOURCE 0x7A2 +#define CS47L92_AIF3TX5MIX_INPUT_2_VOLUME 0x7A3 +#define CS47L92_AIF3TX5MIX_INPUT_3_SOURCE 0x7A4 +#define CS47L92_AIF3TX5MIX_INPUT_3_VOLUME 0x7A5 +#define CS47L92_AIF3TX5MIX_INPUT_4_SOURCE 0x7A6 +#define CS47L92_AIF3TX5MIX_INPUT_4_VOLUME 0x7A7 +#define CS47L92_AIF3TX6MIX_INPUT_1_SOURCE 0x7A8 +#define CS47L92_AIF3TX6MIX_INPUT_1_VOLUME 0x7A9 +#define CS47L92_AIF3TX6MIX_INPUT_2_SOURCE 0x7AA +#define CS47L92_AIF3TX6MIX_INPUT_2_VOLUME 0x7AB +#define CS47L92_AIF3TX6MIX_INPUT_3_SOURCE 0x7AC +#define CS47L92_AIF3TX6MIX_INPUT_3_VOLUME 0x7AD +#define CS47L92_AIF3TX6MIX_INPUT_4_SOURCE 0x7AE +#define CS47L92_AIF3TX6MIX_INPUT_4_VOLUME 0x7AF +#define CS47L92_AIF3TX7MIX_INPUT_1_SOURCE 0x7B0 +#define CS47L92_AIF3TX7MIX_INPUT_1_VOLUME 0x7B1 +#define CS47L92_AIF3TX7MIX_INPUT_2_SOURCE 0x7B2 +#define CS47L92_AIF3TX7MIX_INPUT_2_VOLUME 0x7B3 +#define CS47L92_AIF3TX7MIX_INPUT_3_SOURCE 0x7B4 +#define CS47L92_AIF3TX7MIX_INPUT_3_VOLUME 0x7B5 +#define CS47L92_AIF3TX7MIX_INPUT_4_SOURCE 0x7B6 +#define CS47L92_AIF3TX7MIX_INPUT_4_VOLUME 0x7B7 +#define CS47L92_AIF3TX8MIX_INPUT_1_SOURCE 0x7B8 +#define CS47L92_AIF3TX8MIX_INPUT_1_VOLUME 0x7B9 +#define CS47L92_AIF3TX8MIX_INPUT_2_SOURCE 0x7BA +#define CS47L92_AIF3TX8MIX_INPUT_2_VOLUME 0x7BB +#define CS47L92_AIF3TX8MIX_INPUT_3_SOURCE 0x7BC +#define CS47L92_AIF3TX8MIX_INPUT_3_VOLUME 0x7BD +#define CS47L92_AIF3TX8MIX_INPUT_4_SOURCE 0x7BE +#define CS47L92_AIF3TX8MIX_INPUT_4_VOLUME 0x7BF #define MADERA_AIF4TX1MIX_INPUT_1_SOURCE 0x7A0 #define MADERA_AIF4TX1MIX_INPUT_1_VOLUME 0x7A1 #define MADERA_AIF4TX1MIX_INPUT_2_SOURCE 0x7A2 @@ -1105,6 +1180,8 @@ #define MADERA_FCR_ADC_REFORMATTER_CONTROL 0xF73 #define MADERA_FCR_COEFF_START 0xF74 #define MADERA_FCR_COEFF_END 0xFC5 +#define MADERA_AUXPDM1_CTRL_0 0x10C0 +#define MADERA_AUXPDM1_CTRL_1 0x10C1 #define MADERA_DAC_COMP_1 0x1300 #define MADERA_DAC_COMP_2 0x1302 #define MADERA_FRF_COEFFICIENT_1L_1 0x1380 @@ -1446,6 +1523,12 @@ #define MADERA_OPCLK_ASYNC_SEL_WIDTH 3 /* (0x0171) FLL1_Control_1 */ +#define CS47L92_FLL1_REFCLK_SRC_MASK 0xF000 +#define CS47L92_FLL1_REFCLK_SRC_SHIFT 12 +#define CS47L92_FLL1_REFCLK_SRC_WIDTH 4 +#define MADERA_FLL1_HOLD_MASK 0x0004 +#define MADERA_FLL1_HOLD_SHIFT 2 +#define MADERA_FLL1_HOLD_WIDTH 1 #define MADERA_FLL1_FREERUN 0x0002 #define MADERA_FLL1_FREERUN_MASK 0x0002 #define MADERA_FLL1_FREERUN_SHIFT 1 @@ -1478,6 +1561,9 @@ #define MADERA_FLL1_FRATIO_MASK 0x0F00 #define MADERA_FLL1_FRATIO_SHIFT 8 #define MADERA_FLL1_FRATIO_WIDTH 4 +#define MADERA_FLL1_FB_DIV_MASK 0x03FF +#define MADERA_FLL1_FB_DIV_SHIFT 0 +#define MADERA_FLL1_FB_DIV_WIDTH 10 /* (0x0176) FLL1_Control_6 */ #define MADERA_FLL1_REFCLK_DIV_MASK 0x00C0 @@ -1509,6 +1595,30 @@ #define MADERA_FLL1_PHASE_ENA_SHIFT 11 #define MADERA_FLL1_PHASE_ENA_WIDTH 1 +/* (0x017A) FLL1_Control_10 */ +#define MADERA_FLL1_HP_MASK 0xC000 +#define MADERA_FLL1_HP_SHIFT 14 +#define MADERA_FLL1_HP_WIDTH 2 +#define MADERA_FLL1_PHASEDET_ENA_MASK 0x1000 +#define MADERA_FLL1_PHASEDET_ENA_SHIFT 12 +#define MADERA_FLL1_PHASEDET_ENA_WIDTH 1 + +/* (0x017B) FLL1_Control_11 */ +#define MADERA_FLL1_LOCKDET_THR_MASK 0x001E +#define MADERA_FLL1_LOCKDET_THR_SHIFT 1 +#define MADERA_FLL1_LOCKDET_THR_WIDTH 4 +#define MADERA_FLL1_LOCKDET_MASK 0x0001 +#define MADERA_FLL1_LOCKDET_SHIFT 0 +#define MADERA_FLL1_LOCKDET_WIDTH 1 + +/* (0x017D) FLL1_Digital_Test_1 */ +#define MADERA_FLL1_SYNC_EFS_ENA_MASK 0x0100 +#define MADERA_FLL1_SYNC_EFS_ENA_SHIFT 8 +#define MADERA_FLL1_SYNC_EFS_ENA_WIDTH 1 +#define MADERA_FLL1_CLK_VCO_FAST_SRC_MASK 0x0003 +#define MADERA_FLL1_CLK_VCO_FAST_SRC_SHIFT 0 +#define MADERA_FLL1_CLK_VCO_FAST_SRC_WIDTH 2 + /* (0x0181) FLL1_Synchroniser_1 */ #define MADERA_FLL1_SYNC_ENA 0x0001 #define MADERA_FLL1_SYNC_ENA_MASK 0x0001 @@ -1630,6 +1740,13 @@ #define MADERA_LDO2_ENA_WIDTH 1 /* (0x0218) Mic_Bias_Ctrl_1 */ +#define MADERA_MICB1_EXT_CAP 0x8000 +#define MADERA_MICB1_EXT_CAP_MASK 0x8000 +#define MADERA_MICB1_EXT_CAP_SHIFT 15 +#define MADERA_MICB1_EXT_CAP_WIDTH 1 +#define MADERA_MICB1_LVL_MASK 0x01E0 +#define MADERA_MICB1_LVL_SHIFT 5 +#define MADERA_MICB1_LVL_WIDTH 4 #define MADERA_MICB1_ENA 0x0001 #define MADERA_MICB1_ENA_MASK 0x0001 #define MADERA_MICB1_ENA_SHIFT 0 @@ -2313,6 +2430,17 @@ #define MADERA_OUT1R_ENA_SHIFT 0 #define MADERA_OUT1R_ENA_WIDTH 1 +/* (0x0408) Output_Rate_1 */ +#define MADERA_CP_DAC_MODE_MASK 0x0040 +#define MADERA_CP_DAC_MODE_SHIFT 6 +#define MADERA_CP_DAC_MODE_WIDTH 1 +#define MADERA_OUT_EXT_CLK_DIV_MASK 0x0030 +#define MADERA_OUT_EXT_CLK_DIV_SHIFT 4 +#define MADERA_OUT_EXT_CLK_DIV_WIDTH 2 +#define MADERA_OUT_CLK_SRC_MASK 0x0007 +#define MADERA_OUT_CLK_SRC_SHIFT 0 +#define MADERA_OUT_CLK_SRC_WIDTH 3 + /* (0x0409) Output_Volume_Ramp */ #define MADERA_OUT_VD_RAMP_MASK 0x0070 #define MADERA_OUT_VD_RAMP_SHIFT 4 @@ -2834,6 +2962,30 @@ #define MADERA_AIF2RX1_ENA_WIDTH 1 /* (0x0599) AIF3_Tx_Enables */ +#define MADERA_AIF3TX8_ENA 0x0080 +#define MADERA_AIF3TX8_ENA_MASK 0x0080 +#define MADERA_AIF3TX8_ENA_SHIFT 7 +#define MADERA_AIF3TX8_ENA_WIDTH 1 +#define MADERA_AIF3TX7_ENA 0x0040 +#define MADERA_AIF3TX7_ENA_MASK 0x0040 +#define MADERA_AIF3TX7_ENA_SHIFT 6 +#define MADERA_AIF3TX7_ENA_WIDTH 1 +#define MADERA_AIF3TX6_ENA 0x0020 +#define MADERA_AIF3TX6_ENA_MASK 0x0020 +#define MADERA_AIF3TX6_ENA_SHIFT 5 +#define MADERA_AIF3TX6_ENA_WIDTH 1 +#define MADERA_AIF3TX5_ENA 0x0010 +#define MADERA_AIF3TX5_ENA_MASK 0x0010 +#define MADERA_AIF3TX5_ENA_SHIFT 4 +#define MADERA_AIF3TX5_ENA_WIDTH 1 +#define MADERA_AIF3TX4_ENA 0x0008 +#define MADERA_AIF3TX4_ENA_MASK 0x0008 +#define MADERA_AIF3TX4_ENA_SHIFT 3 +#define MADERA_AIF3TX4_ENA_WIDTH 1 +#define MADERA_AIF3TX3_ENA 0x0004 +#define MADERA_AIF3TX3_ENA_MASK 0x0004 +#define MADERA_AIF3TX3_ENA_SHIFT 2 +#define MADERA_AIF3TX3_ENA_WIDTH 1 #define MADERA_AIF3TX2_ENA 0x0002 #define MADERA_AIF3TX2_ENA_MASK 0x0002 #define MADERA_AIF3TX2_ENA_SHIFT 1 @@ -2844,6 +2996,30 @@ #define MADERA_AIF3TX1_ENA_WIDTH 1 /* (0x059A) AIF3_Rx_Enables */ +#define MADERA_AIF3RX8_ENA 0x0080 +#define MADERA_AIF3RX8_ENA_MASK 0x0080 +#define MADERA_AIF3RX8_ENA_SHIFT 7 +#define MADERA_AIF3RX8_ENA_WIDTH 1 +#define MADERA_AIF3RX7_ENA 0x0040 +#define MADERA_AIF3RX7_ENA_MASK 0x0040 +#define MADERA_AIF3RX7_ENA_SHIFT 6 +#define MADERA_AIF3RX7_ENA_WIDTH 1 +#define MADERA_AIF3RX6_ENA 0x0020 +#define MADERA_AIF3RX6_ENA_MASK 0x0020 +#define MADERA_AIF3RX6_ENA_SHIFT 5 +#define MADERA_AIF3RX6_ENA_WIDTH 1 +#define MADERA_AIF3RX5_ENA 0x0010 +#define MADERA_AIF3RX5_ENA_MASK 0x0010 +#define MADERA_AIF3RX5_ENA_SHIFT 4 +#define MADERA_AIF3RX5_ENA_WIDTH 1 +#define MADERA_AIF3RX4_ENA 0x0008 +#define MADERA_AIF3RX4_ENA_MASK 0x0008 +#define MADERA_AIF3RX4_ENA_SHIFT 3 +#define MADERA_AIF3RX4_ENA_WIDTH 1 +#define MADERA_AIF3RX3_ENA 0x0004 +#define MADERA_AIF3RX3_ENA_MASK 0x0004 +#define MADERA_AIF3RX3_ENA_SHIFT 2 +#define MADERA_AIF3RX3_ENA_WIDTH 1 #define MADERA_AIF3RX2_ENA 0x0002 #define MADERA_AIF3RX2_ENA_MASK 0x0002 #define MADERA_AIF3RX2_ENA_SHIFT 1 @@ -3458,6 +3634,25 @@ #define MADERA_FCR_MIC_MODE_SEL_SHIFT 2 #define MADERA_FCR_MIC_MODE_SEL_WIDTH 2 +/* (0x10C0) AUXPDM1_CTRL_0 */ +#define MADERA_AUXPDM1_SRC_MASK 0x0F00 +#define MADERA_AUXPDM1_SRC_SHIFT 8 +#define MADERA_AUXPDM1_SRC_WIDTH 4 +#define MADERA_AUXPDM1_TXEDGE_MASK 0x0010 +#define MADERA_AUXPDM1_TXEDGE_SHIFT 4 +#define MADERA_AUXPDM1_TXEDGE_WIDTH 1 +#define MADERA_AUXPDM1_MSTR_MASK 0x0008 +#define MADERA_AUXPDM1_MSTR_SHIFT 3 +#define MADERA_AUXPDM1_MSTR_WIDTH 1 +#define MADERA_AUXPDM1_ENABLE_MASK 0x0001 +#define MADERA_AUXPDM1_ENABLE_SHIFT 0 +#define MADERA_AUXPDM1_ENABLE_WIDTH 1 + +/* (0x10C1) AUXPDM1_CTRL_1 */ +#define MADERA_AUXPDM1_CLK_FREQ_MASK 0xC000 +#define MADERA_AUXPDM1_CLK_FREQ_SHIFT 14 +#define MADERA_AUXPDM1_CLK_FREQ_WIDTH 2 + /* (0x1480) DFC1_CTRL_W0 */ #define MADERA_DFC1_RATE_MASK 0x007C #define MADERA_DFC1_RATE_SHIFT 2 From c77cd342f9fd64a9f6ed3eb270fd527826ef92d3 Mon Sep 17 00:00:00 2001 From: Pi-Hsun Shih Date: Mon, 3 Jun 2019 11:45:10 +0800 Subject: [PATCH 32/45] dt-bindings: Add binding for cros-ec-rpmsg Add a DT binding documentation for ChromeOS EC driver over rpmsg. Signed-off-by: Pi-Hsun Shih Acked-by: Rob Herring Signed-off-by: Lee Jones --- Documentation/devicetree/bindings/mfd/cros-ec.txt | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/mfd/cros-ec.txt b/Documentation/devicetree/bindings/mfd/cros-ec.txt index 6245c9b1a68b..4860eabd0f72 100644 --- a/Documentation/devicetree/bindings/mfd/cros-ec.txt +++ b/Documentation/devicetree/bindings/mfd/cros-ec.txt @@ -3,7 +3,7 @@ ChromeOS Embedded Controller Google's ChromeOS EC is a Cortex-M device which talks to the AP and implements various function such as keyboard and battery charging. -The EC can be connect through various means (I2C, SPI, LPC) and the +The EC can be connect through various means (I2C, SPI, LPC, RPMSG) and the compatible string used depends on the interface. Each connection method has its own driver which connects to the top level interface-agnostic EC driver. Other Linux driver (such as cros-ec-keyb for the matrix keyboard) connect to @@ -17,6 +17,9 @@ Required properties (SPI): - compatible: "google,cros-ec-spi" - reg: SPI chip select +Required properties (RPMSG): +- compatible: "google,cros-ec-rpmsg" + Optional properties (SPI): - google,cros-ec-spi-pre-delay: Some implementations of the EC need a little time to wake up from sleep before they can receive SPI transfers at a high From 554e937ec8d75930bc711612208af27961e3dc61 Mon Sep 17 00:00:00 2001 From: Pi-Hsun Shih Date: Mon, 3 Jun 2019 11:45:11 +0800 Subject: [PATCH 33/45] mfd: cros_ec: differentiate SCP from EC by feature bit System Companion Processor (SCP) is Cortex M4 co-processor on some MediaTek platform that can run EC-style firmware. Since a SCP and EC would both exist on a system, and use the cros_ec_dev driver, we need to differentiate between them for the userspace, or they would both be registered at /dev/cros_ec, causing a conflict. Signed-off-by: Pi-Hsun Shih Acked-by: Enric Balletbo i Serra Signed-off-by: Lee Jones --- drivers/mfd/cros_ec_dev.c | 10 ++++++++++ include/linux/mfd/cros_ec.h | 1 + 2 files changed, 11 insertions(+) diff --git a/drivers/mfd/cros_ec_dev.c b/drivers/mfd/cros_ec_dev.c index d992365472b8..a47223d2baf4 100644 --- a/drivers/mfd/cros_ec_dev.c +++ b/drivers/mfd/cros_ec_dev.c @@ -459,6 +459,16 @@ static int ec_device_probe(struct platform_device *pdev) ec_platform->ec_name = CROS_EC_DEV_TP_NAME; } + /* Check whether this is actually a SCP rather than an EC. */ + if (cros_ec_check_features(ec, EC_FEATURE_SCP)) { + dev_info(dev, "CrOS SCP MCU detected.\n"); + /* + * Help userspace differentiating ECs from SCP, + * regardless of the probing order. + */ + ec_platform->ec_name = CROS_EC_DEV_SCP_NAME; + } + /* * Add the class device * Link to the character device for creating the /dev entry diff --git a/include/linux/mfd/cros_ec.h b/include/linux/mfd/cros_ec.h index cfa78bb4990f..751cb3756d49 100644 --- a/include/linux/mfd/cros_ec.h +++ b/include/linux/mfd/cros_ec.h @@ -27,6 +27,7 @@ #define CROS_EC_DEV_PD_NAME "cros_pd" #define CROS_EC_DEV_TP_NAME "cros_tp" #define CROS_EC_DEV_ISH_NAME "cros_ish" +#define CROS_EC_DEV_SCP_NAME "cros_scp" /* * The EC is unresponsive for a time after a reboot command. Add a From 76304994645028accc0cfe287652344b696f4470 Mon Sep 17 00:00:00 2001 From: Stefan Mavrodiev Date: Fri, 7 Jun 2019 15:42:25 +0300 Subject: [PATCH 34/45] mfd: rk808: Check pm_power_off pointer The function pointer pm_power_off may point to function from other module (PSCI for example). If rk808 is removed, pm_power_off is overwritten to NULL and the system cannot be powered off. This patch checks if pm_power_off points to a module function. Signed-off-by: Stefan Mavrodiev Signed-off-by: Lee Jones --- drivers/mfd/rk808.c | 17 +++++++++++------ include/linux/mfd/rk808.h | 1 + 2 files changed, 12 insertions(+), 6 deletions(-) diff --git a/drivers/mfd/rk808.c b/drivers/mfd/rk808.c index 6ee1c461a3bb..e234720fee02 100644 --- a/drivers/mfd/rk808.c +++ b/drivers/mfd/rk808.c @@ -562,7 +562,6 @@ static int rk808_probe(struct i2c_client *client, struct rk808 *rk808; const struct rk808_reg_data *pre_init_reg; const struct mfd_cell *cells; - void (*pm_pwroff_fn)(void) = NULL; int nr_pre_init_regs; int nr_cells; int pm_off = 0, msb, lsb; @@ -609,7 +608,7 @@ static int rk808_probe(struct i2c_client *client, nr_pre_init_regs = ARRAY_SIZE(rk805_pre_init_reg); cells = rk805s; nr_cells = ARRAY_SIZE(rk805s); - pm_pwroff_fn = rk805_device_shutdown; + rk808->pm_pwroff_fn = rk805_device_shutdown; break; case RK808_ID: rk808->regmap_cfg = &rk808_regmap_config; @@ -618,7 +617,7 @@ static int rk808_probe(struct i2c_client *client, nr_pre_init_regs = ARRAY_SIZE(rk808_pre_init_reg); cells = rk808s; nr_cells = ARRAY_SIZE(rk808s); - pm_pwroff_fn = rk808_device_shutdown; + rk808->pm_pwroff_fn = rk808_device_shutdown; break; case RK818_ID: rk808->regmap_cfg = &rk818_regmap_config; @@ -627,7 +626,7 @@ static int rk808_probe(struct i2c_client *client, nr_pre_init_regs = ARRAY_SIZE(rk818_pre_init_reg); cells = rk818s; nr_cells = ARRAY_SIZE(rk818s); - pm_pwroff_fn = rk818_device_shutdown; + rk808->pm_pwroff_fn = rk818_device_shutdown; break; case RK809_ID: case RK817_ID: @@ -692,7 +691,7 @@ static int rk808_probe(struct i2c_client *client, "rockchip,system-power-controller"); if (pm_off && !pm_power_off) { rk808_i2c_client = client; - pm_power_off = pm_pwroff_fn; + pm_power_off = rk808->pm_pwroff_fn; } return 0; @@ -707,7 +706,13 @@ static int rk808_remove(struct i2c_client *client) struct rk808 *rk808 = i2c_get_clientdata(client); regmap_del_irq_chip(client->irq, rk808->irq_data); - pm_power_off = NULL; + + /** + * pm_power_off may points to a function from another module. + * Check if the pointer is set by us and only then overwrite it. + */ + if (rk808->pm_pwroff_fn && pm_power_off == rk808->pm_pwroff_fn) + pm_power_off = NULL; return 0; } diff --git a/include/linux/mfd/rk808.h b/include/linux/mfd/rk808.h index 2a9cd01691b2..286316375636 100644 --- a/include/linux/mfd/rk808.h +++ b/include/linux/mfd/rk808.h @@ -628,5 +628,6 @@ struct rk808 { long variant; const struct regmap_config *regmap_cfg; const struct regmap_irq_chip *regmap_irq_chip; + void (*pm_pwroff_fn)(void); }; #endif /* __LINUX_REGULATOR_RK808_H */ From ac195d94280a783f030a01ee84998a198b779d99 Mon Sep 17 00:00:00 2001 From: Stefan Mavrodiev Date: Fri, 7 Jun 2019 15:42:26 +0300 Subject: [PATCH 35/45] mfd: rk808: Prepare rk805 for poweroff RK805 has SLEEP signal, which can put the device into SLEEP or OFF mode. The default is SLEEP mode. However, when the kernel performs power-off (actually the ATF) the device will not go fully off and this will result in higher power consumption and inability to wake the device with RTC alarm. The solution is to enable pm_power_off_prepare function, which will configure SLEEP pin for OFF function. Signed-off-by: Stefan Mavrodiev Signed-off-by: Lee Jones --- drivers/mfd/rk808.c | 50 +++++++++++++++++++++++++++------------ include/linux/mfd/rk808.h | 1 + 2 files changed, 36 insertions(+), 15 deletions(-) diff --git a/drivers/mfd/rk808.c b/drivers/mfd/rk808.c index e234720fee02..09fc8d3da541 100644 --- a/drivers/mfd/rk808.c +++ b/drivers/mfd/rk808.c @@ -474,17 +474,29 @@ static void rk805_device_shutdown(void) int ret; struct rk808 *rk808 = i2c_get_clientdata(rk808_i2c_client); - if (!rk808) { - dev_warn(&rk808_i2c_client->dev, - "have no rk805, so do nothing here\n"); + if (!rk808) return; - } ret = regmap_update_bits(rk808->regmap, RK805_DEV_CTRL_REG, DEV_OFF, DEV_OFF); if (ret) - dev_err(&rk808_i2c_client->dev, "power off error!\n"); + dev_err(&rk808_i2c_client->dev, "Failed to shutdown device!\n"); +} + +static void rk805_device_shutdown_prepare(void) +{ + int ret; + struct rk808 *rk808 = i2c_get_clientdata(rk808_i2c_client); + + if (!rk808) + return; + + ret = regmap_update_bits(rk808->regmap, + RK805_GPIO_IO_POL_REG, + SLP_SD_MSK, SHUTDOWN_FUN); + if (ret) + dev_err(&rk808_i2c_client->dev, "Failed to shutdown device!\n"); } static void rk808_device_shutdown(void) @@ -492,17 +504,14 @@ static void rk808_device_shutdown(void) int ret; struct rk808 *rk808 = i2c_get_clientdata(rk808_i2c_client); - if (!rk808) { - dev_warn(&rk808_i2c_client->dev, - "have no rk808, so do nothing here\n"); + if (!rk808) return; - } ret = regmap_update_bits(rk808->regmap, RK808_DEVCTRL_REG, DEV_OFF_RST, DEV_OFF_RST); if (ret) - dev_err(&rk808_i2c_client->dev, "power off error!\n"); + dev_err(&rk808_i2c_client->dev, "Failed to shutdown device!\n"); } static void rk818_device_shutdown(void) @@ -510,17 +519,14 @@ static void rk818_device_shutdown(void) int ret; struct rk808 *rk808 = i2c_get_clientdata(rk808_i2c_client); - if (!rk808) { - dev_warn(&rk808_i2c_client->dev, - "have no rk818, so do nothing here\n"); + if (!rk808) return; - } ret = regmap_update_bits(rk808->regmap, RK818_DEVCTRL_REG, DEV_OFF, DEV_OFF); if (ret) - dev_err(&rk808_i2c_client->dev, "power off error!\n"); + dev_err(&rk808_i2c_client->dev, "Failed to shutdown device!\n"); } static void rk8xx_syscore_shutdown(void) @@ -609,6 +615,7 @@ static int rk808_probe(struct i2c_client *client, cells = rk805s; nr_cells = ARRAY_SIZE(rk805s); rk808->pm_pwroff_fn = rk805_device_shutdown; + rk808->pm_pwroff_prep_fn = rk805_device_shutdown_prepare; break; case RK808_ID: rk808->regmap_cfg = &rk808_regmap_config; @@ -694,6 +701,12 @@ static int rk808_probe(struct i2c_client *client, pm_power_off = rk808->pm_pwroff_fn; } + if (pm_off && !pm_power_off_prepare) { + if (!rk808_i2c_client) + rk808_i2c_client = client; + pm_power_off_prepare = rk808->pm_pwroff_prep_fn; + } + return 0; err_irq: @@ -714,6 +727,13 @@ static int rk808_remove(struct i2c_client *client) if (rk808->pm_pwroff_fn && pm_power_off == rk808->pm_pwroff_fn) pm_power_off = NULL; + /** + * As above, check if the pointer is set by us before overwrite. + */ + if (rk808->pm_pwroff_prep_fn && + pm_power_off_prepare == rk808->pm_pwroff_prep_fn) + pm_power_off_prepare = NULL; + return 0; } diff --git a/include/linux/mfd/rk808.h b/include/linux/mfd/rk808.h index 286316375636..b264ac794c74 100644 --- a/include/linux/mfd/rk808.h +++ b/include/linux/mfd/rk808.h @@ -629,5 +629,6 @@ struct rk808 { const struct regmap_config *regmap_cfg; const struct regmap_irq_chip *regmap_irq_chip; void (*pm_pwroff_fn)(void); + void (*pm_pwroff_prep_fn)(void); }; #endif /* __LINUX_REGULATOR_RK808_H */ From ecc2ca47f3cd5b5851496d8261b1b14463d4a726 Mon Sep 17 00:00:00 2001 From: Gwendal Grignou Date: Tue, 11 Jun 2019 00:12:36 -0700 Subject: [PATCH 36/45] mfd: cros_ec_dev: Register cros_ec_accel_legacy driver as a subdevice With this patch, the cros_ec_ctl driver will register the legacy accelerometer driver (named cros_ec_accel_legacy) if it fails to register sensors through the usual path cros_ec_sensors_register(). This legacy device is present on Chromebook devices with older EC firmware only supporting deprecated EC commands: - Glimmer based devices [Intel SOC using LPC transport] - Veyron minnie devices [ARM SOC using SPI transport] Tested-by: Gwendal Grignou Signed-off-by: Enric Balletbo i Serra Reviewed-by: Andy Shevchenko Signed-off-by: Gwendal Grignou Signed-off-by: Lee Jones --- drivers/mfd/cros_ec_dev.c | 69 +++++++++++++++++++++++++++++++++++++++ 1 file changed, 69 insertions(+) diff --git a/drivers/mfd/cros_ec_dev.c b/drivers/mfd/cros_ec_dev.c index a47223d2baf4..eb77bf6406f3 100644 --- a/drivers/mfd/cros_ec_dev.c +++ b/drivers/mfd/cros_ec_dev.c @@ -383,6 +383,72 @@ static void cros_ec_sensors_register(struct cros_ec_dev *ec) kfree(msg); } +static struct cros_ec_sensor_platform sensor_platforms[] = { + { .sensor_num = 0 }, + { .sensor_num = 1 } +}; + +static const struct mfd_cell cros_ec_accel_legacy_cells[] = { + { + .name = "cros-ec-accel-legacy", + .platform_data = &sensor_platforms[0], + .pdata_size = sizeof(struct cros_ec_sensor_platform), + }, + { + .name = "cros-ec-accel-legacy", + .platform_data = &sensor_platforms[1], + .pdata_size = sizeof(struct cros_ec_sensor_platform), + } +}; + +static void cros_ec_accel_legacy_register(struct cros_ec_dev *ec) +{ + struct cros_ec_device *ec_dev = ec->ec_dev; + u8 status; + int ret; + + /* + * ECs that need legacy support are the main EC, directly connected to + * the AP. + */ + if (ec->cmd_offset != 0) + return; + + /* + * Check if EC supports direct memory reads and if EC has + * accelerometers. + */ + if (ec_dev->cmd_readmem) { + ret = ec_dev->cmd_readmem(ec_dev, EC_MEMMAP_ACC_STATUS, 1, + &status); + if (ret < 0) { + dev_warn(ec->dev, "EC direct read error.\n"); + return; + } + + /* Check if EC has accelerometers. */ + if (!(status & EC_MEMMAP_ACC_STATUS_PRESENCE_BIT)) { + dev_info(ec->dev, "EC does not have accelerometers.\n"); + return; + } + } + + /* + * The device may still support accelerometers: + * it would be an older ARM based device that do not suppor the + * EC_CMD_GET_FEATURES command. + * + * Register 2 accelerometers, we will fail in the IIO driver if there + * are no sensors. + */ + ret = mfd_add_devices(ec->dev, PLATFORM_DEVID_AUTO, + cros_ec_accel_legacy_cells, + ARRAY_SIZE(cros_ec_accel_legacy_cells), + NULL, 0, NULL); + if (ret) + dev_err(ec_dev->dev, "failed to add EC sensors\n"); +} + static const struct mfd_cell cros_ec_cec_cells[] = { { .name = "cros-ec-cec" } }; @@ -488,6 +554,9 @@ static int ec_device_probe(struct platform_device *pdev) /* check whether this EC is a sensor hub. */ if (cros_ec_check_features(ec, EC_FEATURE_MOTION_SENSE)) cros_ec_sensors_register(ec); + else + /* Workaroud for older EC firmware */ + cros_ec_accel_legacy_register(ec); /* Check whether this EC instance has CEC host command support */ if (cros_ec_check_features(ec, EC_FEATURE_CEC)) { From 90dab47c968f8cad7703c545da9c1be1ca035e56 Mon Sep 17 00:00:00 2001 From: Andy Shevchenko Date: Mon, 11 Feb 2019 12:57:10 +0200 Subject: [PATCH 37/45] MAINAINERS: Swap words in INTEL PMIC MULTIFUNCTION DEVICE DRIVERS Swap PMIC and MULTIFUNCTION words in the title to: - show that this is about Intel PMICs - keep MAINTAINERS properly sorted Signed-off-by: Andy Shevchenko Signed-off-by: Lee Jones --- MAINTAINERS | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/MAINTAINERS b/MAINTAINERS index 5cfbea4ce575..bf10f2fb20bc 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -8070,7 +8070,7 @@ T: git git://git.kernel.org/pub/scm/linux/kernel/git/andy/linux-gpio-intel.git F: drivers/gpio/gpio-*cove.c F: drivers/gpio/gpio-msic.c -INTEL MULTIFUNCTION PMIC DEVICE DRIVERS +INTEL PMIC MULTIFUNCTION DEVICE DRIVERS R: Andy Shevchenko S: Maintained F: drivers/mfd/intel_msic.c From 84bdde17c5d60dea93c1db60d87059c8ca772360 Mon Sep 17 00:00:00 2001 From: Matti Vaittinen Date: Thu, 13 Jun 2019 15:12:38 +0300 Subject: [PATCH 38/45] dt-bindings: mfd: Add link to ROHM BD71847 Datasheet ROHM BD71847 PMIC datasheet was published. Add datasheet link for BD71847 as well. Signed-off-by: Matti Vaittinen Signed-off-by: Lee Jones --- Documentation/devicetree/bindings/mfd/rohm,bd71837-pmic.txt | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/mfd/rohm,bd71837-pmic.txt b/Documentation/devicetree/bindings/mfd/rohm,bd71837-pmic.txt index 3649c1191432..f22d74c7a8db 100644 --- a/Documentation/devicetree/bindings/mfd/rohm,bd71837-pmic.txt +++ b/Documentation/devicetree/bindings/mfd/rohm,bd71837-pmic.txt @@ -8,6 +8,8 @@ and 6 LDOs. Datasheet for BD71837 is available at: https://www.rohm.com/datasheet/BD71837MWV/bd71837mwv-e +Datasheet for BD71847 is available at: +https://www.rohm.com/datasheet/BD71847AMWV/bd71847amwv-e Required properties: - compatible : Should be "rohm,bd71837" for bd71837 From b1c83bd84618e5a3ec6395845d11803047a3ef9a Mon Sep 17 00:00:00 2001 From: Nathan Chancellor Date: Fri, 10 May 2019 18:23:01 -0700 Subject: [PATCH 39/45] mfd: stmfx: Fix macro definition spelling Clang warns: In file included from drivers/mfd/stmfx.c:13: include/linux/mfd/stmfx.h:7:9: warning: 'MFD_STMFX_H' is used as a header guard here, followed by #define of a different macro [-Wheader-guard] Fixes: 06252ade9156 ("mfd: Add ST Multi-Function eXpander (STMFX) core driver") Link: https://github.com/ClangBuiltLinux/linux/issues/475 Signed-off-by: Nathan Chancellor Signed-off-by: Lee Jones --- include/linux/mfd/stmfx.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/linux/mfd/stmfx.h b/include/linux/mfd/stmfx.h index d890595b89b6..3c67983678ec 100644 --- a/include/linux/mfd/stmfx.h +++ b/include/linux/mfd/stmfx.h @@ -5,7 +5,7 @@ */ #ifndef MFD_STMFX_H -#define MFX_STMFX_H +#define MFD_STMFX_H #include From fd54d65dd4578320d1c3505acffa3e0154a9fe5d Mon Sep 17 00:00:00 2001 From: Lubomir Rintel Date: Thu, 20 Jun 2019 13:19:57 +0200 Subject: [PATCH 40/45] mfd: cs5535-mfd: Remove ifdef OLPC noise provides machine_is_olpc() stub for CONFIG_OLPC=n, compiler should just optimize the unneeded bits away. Signed-off-by: Lubomir Rintel Signed-off-by: Lee Jones --- drivers/mfd/cs5535-mfd.c | 24 +++++++----------------- 1 file changed, 7 insertions(+), 17 deletions(-) diff --git a/drivers/mfd/cs5535-mfd.c b/drivers/mfd/cs5535-mfd.c index f9d277ff4aaf..2e77b6147baa 100644 --- a/drivers/mfd/cs5535-mfd.c +++ b/drivers/mfd/cs5535-mfd.c @@ -112,22 +112,10 @@ static struct mfd_cell cs5535_mfd_cells[] = { }, }; -#ifdef CONFIG_OLPC -static void cs5535_clone_olpc_cells(void) -{ - static const char *acpi_clones[] = { - "olpc-xo1-pm-acpi", - "olpc-xo1-sci-acpi" - }; - - if (!machine_is_olpc()) - return; - - mfd_clone_cell("cs5535-acpi", acpi_clones, ARRAY_SIZE(acpi_clones)); -} -#else -static void cs5535_clone_olpc_cells(void) { } -#endif +static const char *olpc_acpi_clones[] = { + "olpc-xo1-pm-acpi", + "olpc-xo1-sci-acpi" +}; static int cs5535_mfd_probe(struct pci_dev *pdev, const struct pci_device_id *id) @@ -157,7 +145,9 @@ static int cs5535_mfd_probe(struct pci_dev *pdev, dev_err(&pdev->dev, "MFD add devices failed: %d\n", err); goto err_disable; } - cs5535_clone_olpc_cells(); + + if (machine_is_olpc()) + mfd_clone_cell("cs5535-acpi", olpc_acpi_clones, ARRAY_SIZE(olpc_acpi_clones)); dev_info(&pdev->dev, "%zu devices registered.\n", ARRAY_SIZE(cs5535_mfd_cells)); From 01e4ecee03aa81ec3565d70c80cd1282088fc5a6 Mon Sep 17 00:00:00 2001 From: Andy Shevchenko Date: Fri, 21 Jun 2019 15:58:07 +0300 Subject: [PATCH 41/45] mfd: intel-lpss: Add Intel Elkhart Lake PCH PCI IDs Intel Elkhart Lake has the same LPSS than Intel Broxton. Add the new IDs to the list of supported devices. Signed-off-by: Andy Shevchenko Signed-off-by: Lee Jones --- drivers/mfd/intel-lpss-pci.c | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/drivers/mfd/intel-lpss-pci.c b/drivers/mfd/intel-lpss-pci.c index 217a9be31c58..8485fe6721eb 100644 --- a/drivers/mfd/intel-lpss-pci.c +++ b/drivers/mfd/intel-lpss-pci.c @@ -203,6 +203,21 @@ static const struct pci_device_id intel_lpss_pci_ids[] = { { PCI_VDEVICE(INTEL, 0x34ea), (kernel_ulong_t)&bxt_i2c_info }, { PCI_VDEVICE(INTEL, 0x34eb), (kernel_ulong_t)&bxt_i2c_info }, { PCI_VDEVICE(INTEL, 0x34fb), (kernel_ulong_t)&spt_info }, + /* EHL */ + { PCI_VDEVICE(INTEL, 0x4b28), (kernel_ulong_t)&bxt_uart_info }, + { PCI_VDEVICE(INTEL, 0x4b29), (kernel_ulong_t)&bxt_uart_info }, + { PCI_VDEVICE(INTEL, 0x4b2a), (kernel_ulong_t)&bxt_info }, + { PCI_VDEVICE(INTEL, 0x4b2b), (kernel_ulong_t)&bxt_info }, + { PCI_VDEVICE(INTEL, 0x4b37), (kernel_ulong_t)&bxt_info }, + { PCI_VDEVICE(INTEL, 0x4b44), (kernel_ulong_t)&bxt_i2c_info }, + { PCI_VDEVICE(INTEL, 0x4b45), (kernel_ulong_t)&bxt_i2c_info }, + { PCI_VDEVICE(INTEL, 0x4b4b), (kernel_ulong_t)&bxt_i2c_info }, + { PCI_VDEVICE(INTEL, 0x4b4c), (kernel_ulong_t)&bxt_i2c_info }, + { PCI_VDEVICE(INTEL, 0x4b4d), (kernel_ulong_t)&bxt_uart_info }, + { PCI_VDEVICE(INTEL, 0x4b78), (kernel_ulong_t)&bxt_i2c_info }, + { PCI_VDEVICE(INTEL, 0x4b79), (kernel_ulong_t)&bxt_i2c_info }, + { PCI_VDEVICE(INTEL, 0x4b7a), (kernel_ulong_t)&bxt_i2c_info }, + { PCI_VDEVICE(INTEL, 0x4b7b), (kernel_ulong_t)&bxt_i2c_info }, /* APL */ { PCI_VDEVICE(INTEL, 0x5aac), (kernel_ulong_t)&apl_i2c_info }, { PCI_VDEVICE(INTEL, 0x5aae), (kernel_ulong_t)&apl_i2c_info }, From 02f36911c1b41fcd8779fa0c135aab0554333fa5 Mon Sep 17 00:00:00 2001 From: Andy Shevchenko Date: Fri, 21 Jun 2019 15:56:31 +0300 Subject: [PATCH 42/45] mfd: intel-lpss: Release IDA resources ida instances allocate some internal memory for ->free_bitmap in addition to the base 'struct ida'. Use ida_destroy() to release that memory at module_exit(). Fixes: 4b45efe85263 ("mfd: Add support for Intel Sunrisepoint LPSS devices") Signed-off-by: Andy Shevchenko Signed-off-by: Lee Jones --- drivers/mfd/intel-lpss.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/mfd/intel-lpss.c b/drivers/mfd/intel-lpss.c index fc6aa4c50144..2ba6df9d83af 100644 --- a/drivers/mfd/intel-lpss.c +++ b/drivers/mfd/intel-lpss.c @@ -546,6 +546,7 @@ module_init(intel_lpss_init); static void __exit intel_lpss_exit(void) { + ida_destroy(&intel_lpss_devid_ida); debugfs_remove(intel_lpss_debugfs); } module_exit(intel_lpss_exit); From 0772a34bb8a12fcc245074e0f76e96cba2c9a434 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Wed, 26 Jun 2019 14:33:35 +0100 Subject: [PATCH 43/45] mfd: madera: Remove some unused registers and fix some defaults Signed-off-by: Charles Keepax Signed-off-by: Lee Jones --- drivers/mfd/cs47l15-tables.c | 2 - drivers/mfd/cs47l35-tables.c | 54 +----------- drivers/mfd/cs47l85-tables.c | 122 ++------------------------- drivers/mfd/cs47l90-tables.c | 76 ----------------- drivers/mfd/cs47l92-tables.c | 1 - include/linux/mfd/madera/registers.h | 80 ------------------ 6 files changed, 6 insertions(+), 329 deletions(-) diff --git a/drivers/mfd/cs47l15-tables.c b/drivers/mfd/cs47l15-tables.c index 1b4f6f79eac2..73db8d03b531 100644 --- a/drivers/mfd/cs47l15-tables.c +++ b/drivers/mfd/cs47l15-tables.c @@ -88,7 +88,6 @@ static const struct reg_default cs47l15_reg_default[] = { { 0x00000174, 0x007d }, /* R372 (0x174) - FLL1 Control 4 */ { 0x00000175, 0x0000 }, /* R373 (0x175) - FLL1 Control 5 */ { 0x00000176, 0x0000 }, /* R374 (0x176) - FLL1 Control 6 */ - { 0x00000177, 0x0281 }, /* R375 (0x177) - FLL1 Loop Filter Test 1 */ { 0x00000179, 0x0000 }, /* R377 (0x179) - FLL1 Control 7 */ { 0x0000017a, 0x2906 }, /* R378 (0x17A) - FLL1 EFS 2 */ { 0x00000181, 0x0000 }, /* R385 (0x181) - FLL1 Synchroniser 1 */ @@ -746,7 +745,6 @@ static bool cs47l15_16bit_readable_register(struct device *dev, case MADERA_FLL1_CONTROL_1 ... MADERA_FLL1_CONTROL_6: case MADERA_FLL1_CONTROL_7: case MADERA_FLL1_EFS_2: - case MADERA_FLL1_LOOP_FILTER_TEST_1: case MADERA_FLL1_SYNCHRONISER_1 ... MADERA_FLL1_SYNCHRONISER_7: case MADERA_FLL1_SPREAD_SPECTRUM: case MADERA_FLL1_GPIO_CLOCK: diff --git a/drivers/mfd/cs47l35-tables.c b/drivers/mfd/cs47l35-tables.c index 338b825127f1..fe838cbc2a7e 100644 --- a/drivers/mfd/cs47l35-tables.c +++ b/drivers/mfd/cs47l35-tables.c @@ -109,9 +109,8 @@ static const struct reg_default cs47l35_reg_default[] = { { 0x00000174, 0x007d }, /* R372 (0x174) - FLL1 Control 4 */ { 0x00000175, 0x0000 }, /* R373 (0x175) - FLL1 Control 5 */ { 0x00000176, 0x0000 }, /* R374 (0x176) - FLL1 Control 6 */ - { 0x00000177, 0x0281 }, /* R375 (0x177) - FLL1 Loop Filter Test 1 */ { 0x00000179, 0x0000 }, /* R377 (0x179) - FLL1 Control 7 */ - { 0x0000017a, 0x0b06 }, /* R378 (0x17a) - FLL1 EFS2 */ + { 0x0000017a, 0x2906 }, /* R378 (0x17a) - FLL1 EFS2 */ { 0x0000017f, 0x0000 }, /* R383 (0x17f) - FLL1 Synchroniser 1 */ { 0x00000180, 0x0000 }, /* R384 (0x180) - FLL1 Synchroniser 2 */ { 0x00000181, 0x0000 }, /* R385 (0x181) - FLL1 Synchroniser 3 */ @@ -174,9 +173,6 @@ static const struct reg_default cs47l35_reg_default[] = { { 0x00000434, 0x0000 }, /* R1076 (0x434) - Output Path Config 5R */ { 0x00000435, 0x0180 }, /* R1077 (0x435) - DAC Digital Volume 5R */ { 0x00000437, 0x0200 }, /* R1079 (0x437) - Noise Gate Select 5R */ - { 0x00000440, 0x0003 }, /* R1088 (0x440) - DRE Enable */ - { 0x00000448, 0x0a83 }, /* R1096 (0x448) - eDRE Enable */ - { 0x0000044a, 0x0000 }, /* R1098 (0x44a) - eDRE Manual */ { 0x00000450, 0x0000 }, /* R1104 (0x450) - DAC AEC Control 1 */ { 0x00000451, 0x0000 }, /* R1105 (0x451) - DAC AEC Control 2 */ { 0x00000458, 0x0000 }, /* R1112 (0x458) - Noise Gate Control */ @@ -720,28 +716,6 @@ static const struct reg_default cs47l35_reg_default[] = { { 0x00000ef3, 0x0000 }, /* R3827 (0xef3) - ISRC 2 CTRL 1 */ { 0x00000ef4, 0x0001 }, /* R3828 (0xef4) - ISRC 2 CTRL 2 */ { 0x00000ef5, 0x0000 }, /* R3829 (0xef5) - ISRC 2 CTRL 3 */ - { 0x00001300, 0x0000 }, /* R4864 (0x1300) - DAC Comp 1 */ - { 0x00001302, 0x0000 }, /* R4866 (0x1302) - DAC Comp 2 */ - { 0x00001380, 0x0000 }, /* R4992 (0x1380) - FRF Coefficient 1L 1 */ - { 0x00001381, 0x0000 }, /* R4993 (0x1381) - FRF Coefficient 1L 2 */ - { 0x00001382, 0x0000 }, /* R4994 (0x1382) - FRF Coefficient 1L 3 */ - { 0x00001383, 0x0000 }, /* R4995 (0x1383) - FRF Coefficient 1L 4 */ - { 0x00001390, 0x0000 }, /* R5008 (0x1390) - FRF Coefficient 1R 1 */ - { 0x00001391, 0x0000 }, /* R5009 (0x1391) - FRF Coefficient 1R 2 */ - { 0x00001392, 0x0000 }, /* R5010 (0x1392) - FRF Coefficient 1R 3 */ - { 0x00001393, 0x0000 }, /* R5011 (0x1393) - FRF Coefficient 1R 4 */ - { 0x000013a0, 0x0000 }, /* R5024 (0x13a0) - FRF Coefficient 4L 1 */ - { 0x000013a1, 0x0000 }, /* R5025 (0x13a1) - FRF Coefficient 4L 2 */ - { 0x000013a2, 0x0000 }, /* R5026 (0x13a2) - FRF Coefficient 4L 3 */ - { 0x000013a3, 0x0000 }, /* R5027 (0x13a3) - FRF Coefficient 4L 4 */ - { 0x000013b0, 0x0000 }, /* R5040 (0x13b0) - FRF Coefficient 5L 1 */ - { 0x000013b1, 0x0000 }, /* R5041 (0x13b1) - FRF Coefficient 5L 2 */ - { 0x000013b2, 0x0000 }, /* R5042 (0x13b2) - FRF Coefficient 5L 3 */ - { 0x000013b3, 0x0000 }, /* R5043 (0x13b3) - FRF Coefficient 5L 4 */ - { 0x000013c0, 0x0000 }, /* R5040 (0x13c0) - FRF Coefficient 5R 1 */ - { 0x000013c1, 0x0000 }, /* R5041 (0x13c1) - FRF Coefficient 5R 2 */ - { 0x000013c2, 0x0000 }, /* R5042 (0x13c2) - FRF Coefficient 5R 3 */ - { 0x000013c3, 0x0000 }, /* R5043 (0x13c3) - FRF Coefficient 5R 4 */ { 0x00001700, 0x2001 }, /* R5888 (0x1700) - GPIO1 Control 1 */ { 0x00001701, 0xf000 }, /* R5889 (0x1701) - GPIO1 Control 2 */ { 0x00001702, 0x2001 }, /* R5890 (0x1702) - GPIO2 Control 1 */ @@ -892,7 +866,6 @@ static bool cs47l35_16bit_readable_register(struct device *dev, case MADERA_FLL1_CONTROL_6: case MADERA_FLL1_CONTROL_7: case MADERA_FLL1_EFS_2: - case MADERA_FLL1_LOOP_FILTER_TEST_1: case CS47L35_FLL1_SYNCHRONISER_1: case CS47L35_FLL1_SYNCHRONISER_2: case CS47L35_FLL1_SYNCHRONISER_3: @@ -967,9 +940,6 @@ static bool cs47l35_16bit_readable_register(struct device *dev, case MADERA_OUTPUT_PATH_CONFIG_5R: case MADERA_DAC_DIGITAL_VOLUME_5R: case MADERA_NOISE_GATE_SELECT_5R: - case MADERA_DRE_ENABLE: - case MADERA_EDRE_ENABLE: - case MADERA_EDRE_MANUAL: case MADERA_DAC_AEC_CONTROL_1: case MADERA_DAC_AEC_CONTROL_2: case MADERA_NOISE_GATE_CONTROL: @@ -1439,28 +1409,6 @@ static bool cs47l35_16bit_readable_register(struct device *dev, case MADERA_ISRC_2_CTRL_1: case MADERA_ISRC_2_CTRL_2: case MADERA_ISRC_2_CTRL_3: - case MADERA_DAC_COMP_1: - case MADERA_DAC_COMP_2: - case MADERA_FRF_COEFFICIENT_1L_1: - case MADERA_FRF_COEFFICIENT_1L_2: - case MADERA_FRF_COEFFICIENT_1L_3: - case MADERA_FRF_COEFFICIENT_1L_4: - case MADERA_FRF_COEFFICIENT_1R_1: - case MADERA_FRF_COEFFICIENT_1R_2: - case MADERA_FRF_COEFFICIENT_1R_3: - case MADERA_FRF_COEFFICIENT_1R_4: - case CS47L35_FRF_COEFFICIENT_4L_1: - case CS47L35_FRF_COEFFICIENT_4L_2: - case CS47L35_FRF_COEFFICIENT_4L_3: - case CS47L35_FRF_COEFFICIENT_4L_4: - case CS47L35_FRF_COEFFICIENT_5L_1: - case CS47L35_FRF_COEFFICIENT_5L_2: - case CS47L35_FRF_COEFFICIENT_5L_3: - case CS47L35_FRF_COEFFICIENT_5L_4: - case CS47L35_FRF_COEFFICIENT_5R_1: - case CS47L35_FRF_COEFFICIENT_5R_2: - case CS47L35_FRF_COEFFICIENT_5R_3: - case CS47L35_FRF_COEFFICIENT_5R_4: case MADERA_GPIO1_CTRL_1 ... MADERA_GPIO16_CTRL_2: case MADERA_IRQ1_STATUS_1 ... MADERA_IRQ1_STATUS_33: case MADERA_IRQ1_MASK_1 ... MADERA_IRQ1_MASK_33: diff --git a/drivers/mfd/cs47l85-tables.c b/drivers/mfd/cs47l85-tables.c index 43803145d8e5..d0198b5e86ba 100644 --- a/drivers/mfd/cs47l85-tables.c +++ b/drivers/mfd/cs47l85-tables.c @@ -402,7 +402,6 @@ static const struct reg_default cs47l85_reg_default[] = { { 0x00000174, 0x007d }, /* R372 (0x174) - FLL1 Control 4 */ { 0x00000175, 0x0000 }, /* R373 (0x175) - FLL1 Control 5 */ { 0x00000176, 0x0000 }, /* R374 (0x176) - FLL1 Control 6 */ - { 0x00000177, 0x0281 }, /* R375 (0x177) - FLL1 Loop Filter Test 1 */ { 0x00000179, 0x0000 }, /* R377 (0x179) - FLL1 Control 7 */ { 0x00000181, 0x0000 }, /* R385 (0x181) - FLL1 Synchroniser 1 */ { 0x00000182, 0x0000 }, /* R386 (0x182) - FLL1 Synchroniser 2 */ @@ -419,7 +418,6 @@ static const struct reg_default cs47l85_reg_default[] = { { 0x00000194, 0x007d }, /* R404 (0x194) - FLL2 Control 4 */ { 0x00000195, 0x0000 }, /* R405 (0x195) - FLL2 Control 5 */ { 0x00000196, 0x0000 }, /* R406 (0x196) - FLL2 Control 6 */ - { 0x00000197, 0x0281 }, /* R407 (0x197) - FLL2 Loop Filter Test 1 */ { 0x00000199, 0x0000 }, /* R409 (0x199) - FLL2 Control 7 */ { 0x000001a1, 0x0000 }, /* R417 (0x1a1) - FLL2 Synchroniser 1 */ { 0x000001a2, 0x0000 }, /* R418 (0x1a2) - FLL2 Synchroniser 2 */ @@ -436,7 +434,6 @@ static const struct reg_default cs47l85_reg_default[] = { { 0x000001b4, 0x007d }, /* R436 (0x1b4) - FLL3 Control 4 */ { 0x000001b5, 0x0000 }, /* R437 (0x1b5) - FLL3 Control 5 */ { 0x000001b6, 0x0000 }, /* R438 (0x1b6) - FLL3 Control 6 */ - { 0x000001b7, 0x0281 }, /* R439 (0x1b7) - FLL3 Loop Filter Test 1 */ { 0x000001b9, 0x0000 }, /* R441 (0x1b9) - FLL3 Control 7 */ { 0x000001c1, 0x0000 }, /* R449 (0x1c1) - FLL3 Synchroniser 1 */ { 0x000001c2, 0x0000 }, /* R450 (0x1c2) - FLL3 Synchroniser 2 */ @@ -546,9 +543,6 @@ static const struct reg_default cs47l85_reg_default[] = { { 0x0000043c, 0x0000 }, /* R1084 (0x43c) - Output Path Config 6R */ { 0x0000043d, 0x0180 }, /* R1085 (0x43d) - DAC Digital Volume 6R */ { 0x0000043f, 0x0800 }, /* R1087 (0x43f) - Noise Gate Select 6R */ - { 0x00000440, 0x003f }, /* R1088 (0x440) - DRE Enable */ - { 0x00000448, 0x003f }, /* R1096 (0x448) - EDRE Enable */ - { 0x0000044a, 0x0000 }, /* R1098 (0x44a) - EDRE Manual */ { 0x00000450, 0x0000 }, /* R1104 (0x450) - DAC AEC Control 1 */ { 0x00000451, 0x0000 }, /* R1105 (0x451) - DAC AEC Control 2 */ { 0x00000458, 0x0000 }, /* R1112 (0x458) - Noise Gate Control */ @@ -556,7 +550,7 @@ static const struct reg_default cs47l85_reg_default[] = { { 0x00000491, 0x0000 }, /* R1169 (0x491) - PDM SPK1 CTRL 2 */ { 0x00000492, 0x0069 }, /* R1170 (0x492) - PDM SPK2 CTRL 1 */ { 0x00000493, 0x0000 }, /* R1171 (0x493) - PDM SPK2 CTRL 2 */ - { 0x000004a0, 0x3210 }, /* R1184 (0x4a0) - HP1 Short Circuit Ctrl */ + { 0x000004a0, 0x3280 }, /* R1184 (0x4a0) - HP1 Short Circuit Ctrl */ { 0x000004a1, 0x3200 }, /* R1185 (0x4a1) - HP2 Short Circuit Ctrl */ { 0x000004a2, 0x3200 }, /* R1186 (0x4a2) - HP3 Short Circuit Ctrl */ { 0x000004a8, 0x7020 }, /* R1192 (0x4a8) - HP Test Ctrl 5 */ @@ -1365,11 +1359,11 @@ static const struct reg_default cs47l85_reg_default[] = { { 0x00000e82, 0x0018 }, /* R3714 (0xe82) - DRC1 ctrl3 */ { 0x00000e83, 0x0000 }, /* R3715 (0xe83) - DRC1 ctrl4 */ { 0x00000e84, 0x0000 }, /* R3716 (0xe84) - DRC1 ctrl5 */ - { 0x00000e88, 0x0933 }, /* R3720 (0xe88) - DRC2 ctrl1 */ - { 0x00000e89, 0x0018 }, /* R3721 (0xe89) - DRC2 ctrl2 */ - { 0x00000e8a, 0x0000 }, /* R3722 (0xe8a) - DRC2 ctrl3 */ + { 0x00000e88, 0x0018 }, /* R3720 (0xe88) - DRC2 ctrl1 */ + { 0x00000e89, 0x0933 }, /* R3721 (0xe89) - DRC2 ctrl2 */ + { 0x00000e8a, 0x0018 }, /* R3722 (0xe8a) - DRC2 ctrl3 */ { 0x00000e8b, 0x0000 }, /* R3723 (0xe8b) - DRC2 ctrl4 */ - { 0x00000e8c, 0x0040 }, /* R3724 (0xe8c) - DRC2 ctrl5 */ + { 0x00000e8c, 0x0000 }, /* R3724 (0xe8c) - DRC2 ctrl5 */ { 0x00000ec0, 0x0000 }, /* R3776 (0xec0) - HPLPF1_1 */ { 0x00000ec1, 0x0000 }, /* R3777 (0xec1) - HPLPF1_2 */ { 0x00000ec4, 0x0000 }, /* R3780 (0xec4) - HPLPF2_1 */ @@ -1577,56 +1571,6 @@ static const struct reg_default cs47l85_reg_default[] = { { 0x00000fc3, 0x0000 }, /* R4035 (0xfc3) - ANC Coefficient */ { 0x00000fc4, 0x0000 }, /* R4036 (0xfc4) - ANC Coefficient */ { 0x00000fc5, 0x0000 }, /* R4037 (0xfc5) - ANC Coefficient */ - { 0x00001300, 0x0000 }, /* R4864 (0x1300) - DAC Comp 1 */ - { 0x00001302, 0x0000 }, /* R4866 (0x1302) - DAC Comp 2 */ - { 0x00001380, 0x0000 }, /* R4992 (0x1380) - FRF Coefficient 1L 1 */ - { 0x00001381, 0x0000 }, /* R4993 (0x1381) - FRF Coefficient 1L 2 */ - { 0x00001382, 0x0000 }, /* R4994 (0x1382) - FRF Coefficient 1L 3 */ - { 0x00001383, 0x0000 }, /* R4995 (0x1383) - FRF Coefficient 1L 4 */ - { 0x00001390, 0x0000 }, /* R5008 (0x1390) - FRF Coefficient 1R 1 */ - { 0x00001391, 0x0000 }, /* R5009 (0x1391) - FRF Coefficient 1R 2 */ - { 0x00001392, 0x0000 }, /* R5010 (0x1392) - FRF Coefficient 1R 3 */ - { 0x00001393, 0x0000 }, /* R5011 (0x1393) - FRF Coefficient 1R 4 */ - { 0x000013a0, 0x0000 }, /* R5024 (0x13a0) - FRF Coefficient 2L 1 */ - { 0x000013a1, 0x0000 }, /* R5025 (0x13a1) - FRF Coefficient 2L 2 */ - { 0x000013a2, 0x0000 }, /* R5026 (0x13a2) - FRF Coefficient 2L 3 */ - { 0x000013a3, 0x0000 }, /* R5027 (0x13a3) - FRF Coefficient 2L 4 */ - { 0x000013b0, 0x0000 }, /* R5040 (0x13b0) - FRF Coefficient 2R 1 */ - { 0x000013b1, 0x0000 }, /* R5041 (0x13b1) - FRF Coefficient 2R 2 */ - { 0x000013b2, 0x0000 }, /* R5042 (0x13b2) - FRF Coefficient 2R 3 */ - { 0x000013b3, 0x0000 }, /* R5043 (0x13b3) - FRF Coefficient 2R 4 */ - { 0x000013c0, 0x0000 }, /* R5040 (0x13c0) - FRF Coefficient 3L 1 */ - { 0x000013c1, 0x0000 }, /* R5041 (0x13c1) - FRF Coefficient 3L 2 */ - { 0x000013c2, 0x0000 }, /* R5042 (0x13c2) - FRF Coefficient 3L 3 */ - { 0x000013c3, 0x0000 }, /* R5043 (0x13c3) - FRF Coefficient 3L 4 */ - { 0x000013d0, 0x0000 }, /* R5072 (0x13d0) - FRF Coefficient 3R 1 */ - { 0x000013d1, 0x0000 }, /* R5073 (0x13d1) - FRF Coefficient 3R 2 */ - { 0x000013d2, 0x0000 }, /* R5074 (0x13d2) - FRF Coefficient 3R 3 */ - { 0x000013d3, 0x0000 }, /* R5075 (0x13d3) - FRF Coefficient 3R 4 */ - { 0x000013e0, 0x0000 }, /* R5088 (0x13e0) - FRF Coefficient 4L 1 */ - { 0x000013e1, 0x0000 }, /* R5089 (0x13e1) - FRF Coefficient 4L 2 */ - { 0x000013e2, 0x0000 }, /* R5090 (0x13e2) - FRF Coefficient 4L 3 */ - { 0x000013e3, 0x0000 }, /* R5091 (0x13e3) - FRF Coefficient 4L 4 */ - { 0x000013f0, 0x0000 }, /* R5104 (0x13f0) - FRF Coefficient 4R 1 */ - { 0x000013f1, 0x0000 }, /* R5105 (0x13f1) - FRF Coefficient 4R 2 */ - { 0x000013f2, 0x0000 }, /* R5106 (0x13f2) - FRF Coefficient 4R 3 */ - { 0x000013f3, 0x0000 }, /* R5107 (0x13f3) - FRF Coefficient 4R 4 */ - { 0x00001400, 0x0000 }, /* R5120 (0x1400) - FRF Coefficient 5L 1 */ - { 0x00001401, 0x0000 }, /* R5121 (0x1401) - FRF Coefficient 5L 2 */ - { 0x00001402, 0x0000 }, /* R5122 (0x1402) - FRF Coefficient 5L 3 */ - { 0x00001403, 0x0000 }, /* R5123 (0x1403) - FRF Coefficient 5L 4 */ - { 0x00001410, 0x0000 }, /* R5136 (0x1410) - FRF Coefficient 5R 1 */ - { 0x00001411, 0x0000 }, /* R5137 (0x1411) - FRF Coefficient 5R 2 */ - { 0x00001412, 0x0000 }, /* R5138 (0x1412) - FRF Coefficient 5R 3 */ - { 0x00001413, 0x0000 }, /* R5139 (0x1413) - FRF Coefficient 5R 4 */ - { 0x00001420, 0x0000 }, /* R5152 (0x1420) - FRF Coefficient 6L 1 */ - { 0x00001421, 0x0000 }, /* R5153 (0x1421) - FRF Coefficient 6L 2 */ - { 0x00001422, 0x0000 }, /* R5154 (0x1422) - FRF Coefficient 6L 3 */ - { 0x00001423, 0x0000 }, /* R5155 (0x1423) - FRF Coefficient 6L 4 */ - { 0x00001430, 0x0000 }, /* R5168 (0x1430) - FRF Coefficient 6R 1 */ - { 0x00001431, 0x0000 }, /* R5169 (0x1431) - FRF Coefficient 6R 2 */ - { 0x00001432, 0x0000 }, /* R5170 (0x1432) - FRF Coefficient 6R 3 */ - { 0x00001433, 0x0000 }, /* R5171 (0x1433) - FRF Coefficient 6R 4 */ { 0x00001700, 0x2001 }, /* R5888 (0x1700) - GPIO1 Control 1 */ { 0x00001701, 0xe000 }, /* R5889 (0x1701) - GPIO1 Control 2 */ { 0x00001702, 0x2001 }, /* R5890 (0x1702) - GPIO2 Control 1 */ @@ -1845,7 +1789,6 @@ static bool cs47l85_16bit_readable_register(struct device *dev, case MADERA_FLL1_CONTROL_5: case MADERA_FLL1_CONTROL_6: case MADERA_FLL1_CONTROL_7: - case MADERA_FLL1_LOOP_FILTER_TEST_1: case MADERA_FLL1_SYNCHRONISER_1: case MADERA_FLL1_SYNCHRONISER_2: case MADERA_FLL1_SYNCHRONISER_3: @@ -1862,7 +1805,6 @@ static bool cs47l85_16bit_readable_register(struct device *dev, case MADERA_FLL2_CONTROL_5: case MADERA_FLL2_CONTROL_6: case MADERA_FLL2_CONTROL_7: - case MADERA_FLL2_LOOP_FILTER_TEST_1: case MADERA_FLL2_SYNCHRONISER_1: case MADERA_FLL2_SYNCHRONISER_2: case MADERA_FLL2_SYNCHRONISER_3: @@ -1879,7 +1821,6 @@ static bool cs47l85_16bit_readable_register(struct device *dev, case MADERA_FLL3_CONTROL_5: case MADERA_FLL3_CONTROL_6: case MADERA_FLL3_CONTROL_7: - case MADERA_FLL3_LOOP_FILTER_TEST_1: case MADERA_FLL3_SYNCHRONISER_1: case MADERA_FLL3_SYNCHRONISER_2: case MADERA_FLL3_SYNCHRONISER_3: @@ -2004,9 +1945,6 @@ static bool cs47l85_16bit_readable_register(struct device *dev, case MADERA_OUTPUT_PATH_CONFIG_6R: case MADERA_DAC_DIGITAL_VOLUME_6R: case MADERA_NOISE_GATE_SELECT_6R: - case MADERA_DRE_ENABLE: - case MADERA_EDRE_ENABLE: - case MADERA_EDRE_MANUAL: case MADERA_DAC_AEC_CONTROL_1: case MADERA_DAC_AEC_CONTROL_2: case MADERA_NOISE_GATE_CONTROL: @@ -2792,56 +2730,6 @@ static bool cs47l85_16bit_readable_register(struct device *dev, case MADERA_FCR_FILTER_CONTROL: case MADERA_FCR_ADC_REFORMATTER_CONTROL: case MADERA_FCR_COEFF_START ... MADERA_FCR_COEFF_END: - case MADERA_DAC_COMP_1: - case MADERA_DAC_COMP_2: - case MADERA_FRF_COEFFICIENT_1L_1: - case MADERA_FRF_COEFFICIENT_1L_2: - case MADERA_FRF_COEFFICIENT_1L_3: - case MADERA_FRF_COEFFICIENT_1L_4: - case MADERA_FRF_COEFFICIENT_1R_1: - case MADERA_FRF_COEFFICIENT_1R_2: - case MADERA_FRF_COEFFICIENT_1R_3: - case MADERA_FRF_COEFFICIENT_1R_4: - case MADERA_FRF_COEFFICIENT_2L_1: - case MADERA_FRF_COEFFICIENT_2L_2: - case MADERA_FRF_COEFFICIENT_2L_3: - case MADERA_FRF_COEFFICIENT_2L_4: - case MADERA_FRF_COEFFICIENT_2R_1: - case MADERA_FRF_COEFFICIENT_2R_2: - case MADERA_FRF_COEFFICIENT_2R_3: - case MADERA_FRF_COEFFICIENT_2R_4: - case MADERA_FRF_COEFFICIENT_3L_1: - case MADERA_FRF_COEFFICIENT_3L_2: - case MADERA_FRF_COEFFICIENT_3L_3: - case MADERA_FRF_COEFFICIENT_3L_4: - case MADERA_FRF_COEFFICIENT_3R_1: - case MADERA_FRF_COEFFICIENT_3R_2: - case MADERA_FRF_COEFFICIENT_3R_3: - case MADERA_FRF_COEFFICIENT_3R_4: - case MADERA_FRF_COEFFICIENT_4L_1: - case MADERA_FRF_COEFFICIENT_4L_2: - case MADERA_FRF_COEFFICIENT_4L_3: - case MADERA_FRF_COEFFICIENT_4L_4: - case MADERA_FRF_COEFFICIENT_4R_1: - case MADERA_FRF_COEFFICIENT_4R_2: - case MADERA_FRF_COEFFICIENT_4R_3: - case MADERA_FRF_COEFFICIENT_4R_4: - case MADERA_FRF_COEFFICIENT_5L_1: - case MADERA_FRF_COEFFICIENT_5L_2: - case MADERA_FRF_COEFFICIENT_5L_3: - case MADERA_FRF_COEFFICIENT_5L_4: - case MADERA_FRF_COEFFICIENT_5R_1: - case MADERA_FRF_COEFFICIENT_5R_2: - case MADERA_FRF_COEFFICIENT_5R_3: - case MADERA_FRF_COEFFICIENT_5R_4: - case MADERA_FRF_COEFFICIENT_6L_1: - case MADERA_FRF_COEFFICIENT_6L_2: - case MADERA_FRF_COEFFICIENT_6L_3: - case MADERA_FRF_COEFFICIENT_6L_4: - case MADERA_FRF_COEFFICIENT_6R_1: - case MADERA_FRF_COEFFICIENT_6R_2: - case MADERA_FRF_COEFFICIENT_6R_3: - case MADERA_FRF_COEFFICIENT_6R_4: case MADERA_GPIO1_CTRL_1 ... MADERA_GPIO40_CTRL_2: case MADERA_IRQ1_STATUS_1 ... MADERA_IRQ1_STATUS_33: case MADERA_IRQ1_MASK_1 ... MADERA_IRQ1_MASK_33: diff --git a/drivers/mfd/cs47l90-tables.c b/drivers/mfd/cs47l90-tables.c index c040d3d7232a..2c761fc241f3 100644 --- a/drivers/mfd/cs47l90-tables.c +++ b/drivers/mfd/cs47l90-tables.c @@ -119,7 +119,6 @@ static const struct reg_default cs47l90_reg_default[] = { { 0x00000174, 0x007d }, /* R372 (0x174) - FLL1 Control 4 */ { 0x00000175, 0x0000 }, /* R373 (0x175) - FLL1 Control 5 */ { 0x00000176, 0x0000 }, /* R374 (0x176) - FLL1 Control 6 */ - { 0x00000177, 0x0281 }, /* R375 (0x177) - FLL1 Loop Filter Test 1 */ { 0x00000179, 0x0000 }, /* R377 (0x179) - FLL1 Control 7 */ { 0x0000017a, 0x2906 }, /* R377 (0x17a) - FLL1 Efs 2 */ { 0x00000181, 0x0000 }, /* R385 (0x181) - FLL1 Synchroniser 1 */ @@ -137,7 +136,6 @@ static const struct reg_default cs47l90_reg_default[] = { { 0x00000194, 0x007d }, /* R404 (0x194) - FLL2 Control 4 */ { 0x00000195, 0x0000 }, /* R405 (0x195) - FLL2 Control 5 */ { 0x00000196, 0x0000 }, /* R406 (0x196) - FLL2 Control 6 */ - { 0x00000197, 0x0281 }, /* R407 (0x197) - FLL2 Loop Filter Test 1 */ { 0x00000199, 0x0000 }, /* R409 (0x199) - FLL2 Control 7 */ { 0x0000019a, 0x2906 }, /* R410 (0x19a) - FLL2 Efs 2 */ { 0x000001a1, 0x0000 }, /* R417 (0x1a1) - FLL2 Synchroniser 1 */ @@ -260,8 +258,6 @@ static const struct reg_default cs47l90_reg_default[] = { { 0x00000434, 0x0000 }, /* R1076 (0x434) - Output Path Config 5R */ { 0x00000435, 0x0180 }, /* R1077 (0x435) - DAC Digital Volume 5R */ { 0x00000437, 0x0200 }, /* R1079 (0x437) - Noise Gate Select 5R */ - { 0x00000440, 0x003f }, /* R1088 (0x440) - DRE Enable */ - { 0x00000448, 0x003f }, /* R1096 (0x448) - eDRE Enable */ { 0x00000450, 0x0000 }, /* R1104 (0x450) - DAC AEC Control 1 */ { 0x00000451, 0x0000 }, /* R1104 (0x450) - DAC AEC Control 2 */ { 0x00000458, 0x0000 }, /* R1112 (0x458) - Noise Gate Control */ @@ -1262,40 +1258,6 @@ static const struct reg_default cs47l90_reg_default[] = { { 0x00000fc3, 0x0000 }, /* R4035 (0xfc3) - ANC Coefficient */ { 0x00000fc4, 0x0000 }, /* R4036 (0xfc4) - ANC Coefficient */ { 0x00000fc5, 0x0000 }, /* R4037 (0xfc5) - ANC Coefficient */ - { 0x00001300, 0x050E }, /* R4864 (0x1300) - DAC Comp 1 */ - { 0x00001302, 0x0101 }, /* R4866 (0x1302) - DAC Comp 2 */ - { 0x00001380, 0x0425 }, /* R4992 (0x1380) - FRF Coefficient 1L 1 */ - { 0x00001381, 0xF6D8 }, /* R4993 (0x1381) - FRF Coefficient 1L 2 */ - { 0x00001382, 0x0632 }, /* R4994 (0x1382) - FRF Coefficient 1L 3 */ - { 0x00001383, 0xFEC8 }, /* R4995 (0x1383) - FRF Coefficient 1L 4 */ - { 0x00001390, 0x042F }, /* R5008 (0x1390) - FRF Coefficient 1R 1 */ - { 0x00001391, 0xF6CA }, /* R5009 (0x1391) - FRF Coefficient 1R 2 */ - { 0x00001392, 0x0637 }, /* R5010 (0x1392) - FRF Coefficient 1R 3 */ - { 0x00001393, 0xFEC8 }, /* R5011 (0x1393) - FRF Coefficient 1R 4 */ - { 0x000013a0, 0x0000 }, /* R5024 (0x13a0) - FRF Coefficient 2L 1 */ - { 0x000013a1, 0x0000 }, /* R5025 (0x13a1) - FRF Coefficient 2L 2 */ - { 0x000013a2, 0x0000 }, /* R5026 (0x13a2) - FRF Coefficient 2L 3 */ - { 0x000013a3, 0x0000 }, /* R5027 (0x13a3) - FRF Coefficient 2L 4 */ - { 0x000013b0, 0x0000 }, /* R5040 (0x13b0) - FRF Coefficient 2R 1 */ - { 0x000013b1, 0x0000 }, /* R5041 (0x13b1) - FRF Coefficient 2R 2 */ - { 0x000013b2, 0x0000 }, /* R5042 (0x13b2) - FRF Coefficient 2R 3 */ - { 0x000013b3, 0x0000 }, /* R5043 (0x13b3) - FRF Coefficient 2R 4 */ - { 0x000013c0, 0x0000 }, /* R5040 (0x13c0) - FRF Coefficient 3L 1 */ - { 0x000013c1, 0x0000 }, /* R5041 (0x13c1) - FRF Coefficient 3L 2 */ - { 0x000013c2, 0x0000 }, /* R5042 (0x13c2) - FRF Coefficient 3L 3 */ - { 0x000013c3, 0x0000 }, /* R5043 (0x13c3) - FRF Coefficient 3L 4 */ - { 0x000013d0, 0x0000 }, /* R5072 (0x13d0) - FRF Coefficient 3R 1 */ - { 0x000013d1, 0x0000 }, /* R5073 (0x13d1) - FRF Coefficient 3R 2 */ - { 0x000013d2, 0x0000 }, /* R5074 (0x13d2) - FRF Coefficient 3R 3 */ - { 0x000013d3, 0x0000 }, /* R5075 (0x13d3) - FRF Coefficient 3R 4 */ - { 0x00001400, 0x0000 }, /* R5120 (0x1400) - FRF Coefficient 5L 1 */ - { 0x00001401, 0x0000 }, /* R5121 (0x1401) - FRF Coefficient 5L 2 */ - { 0x00001402, 0x0000 }, /* R5122 (0x1402) - FRF Coefficient 5L 3 */ - { 0x00001403, 0x0000 }, /* R5123 (0x1403) - FRF Coefficient 5L 4 */ - { 0x00001410, 0x0000 }, /* R5136 (0x1410) - FRF Coefficient 5R 1 */ - { 0x00001411, 0x0000 }, /* R5137 (0x1411) - FRF Coefficient 5R 2 */ - { 0x00001412, 0x0000 }, /* R5138 (0x1412) - FRF Coefficient 5R 3 */ - { 0x00001413, 0x0000 }, /* R5139 (0x1413) - FRF Coefficient 5R 4 */ { 0x00001480, 0x0000 }, /* R5248 (0x1480) - DFC1_CTRL */ { 0x00001482, 0x1f00 }, /* R5250 (0x1482) - DFC1_RX */ { 0x00001484, 0x1f00 }, /* R5252 (0x1486) - DFC1_TX */ @@ -1535,7 +1497,6 @@ static bool cs47l90_16bit_readable_register(struct device *dev, case MADERA_FLL1_CONTROL_6: case MADERA_FLL1_CONTROL_7: case MADERA_FLL1_EFS_2: - case MADERA_FLL1_LOOP_FILTER_TEST_1: case MADERA_FLL1_SYNCHRONISER_1: case MADERA_FLL1_SYNCHRONISER_2: case MADERA_FLL1_SYNCHRONISER_3: @@ -1553,7 +1514,6 @@ static bool cs47l90_16bit_readable_register(struct device *dev, case MADERA_FLL2_CONTROL_6: case MADERA_FLL2_CONTROL_7: case MADERA_FLL2_EFS_2: - case MADERA_FLL2_LOOP_FILTER_TEST_1: case MADERA_FLL2_SYNCHRONISER_1: case MADERA_FLL2_SYNCHRONISER_2: case MADERA_FLL2_SYNCHRONISER_3: @@ -1690,8 +1650,6 @@ static bool cs47l90_16bit_readable_register(struct device *dev, case MADERA_OUTPUT_PATH_CONFIG_5R: case MADERA_DAC_DIGITAL_VOLUME_5R: case MADERA_NOISE_GATE_SELECT_5R: - case MADERA_DRE_ENABLE: - case MADERA_EDRE_ENABLE: case MADERA_DAC_AEC_CONTROL_1: case MADERA_DAC_AEC_CONTROL_2: case MADERA_NOISE_GATE_CONTROL: @@ -2449,40 +2407,6 @@ static bool cs47l90_16bit_readable_register(struct device *dev, case MADERA_FCR_FILTER_CONTROL: case MADERA_FCR_ADC_REFORMATTER_CONTROL: case MADERA_FCR_COEFF_START ... MADERA_FCR_COEFF_END: - case MADERA_DAC_COMP_1: - case MADERA_DAC_COMP_2: - case MADERA_FRF_COEFFICIENT_1L_1: - case MADERA_FRF_COEFFICIENT_1L_2: - case MADERA_FRF_COEFFICIENT_1L_3: - case MADERA_FRF_COEFFICIENT_1L_4: - case MADERA_FRF_COEFFICIENT_1R_1: - case MADERA_FRF_COEFFICIENT_1R_2: - case MADERA_FRF_COEFFICIENT_1R_3: - case MADERA_FRF_COEFFICIENT_1R_4: - case MADERA_FRF_COEFFICIENT_2L_1: - case MADERA_FRF_COEFFICIENT_2L_2: - case MADERA_FRF_COEFFICIENT_2L_3: - case MADERA_FRF_COEFFICIENT_2L_4: - case MADERA_FRF_COEFFICIENT_2R_1: - case MADERA_FRF_COEFFICIENT_2R_2: - case MADERA_FRF_COEFFICIENT_2R_3: - case MADERA_FRF_COEFFICIENT_2R_4: - case MADERA_FRF_COEFFICIENT_3L_1: - case MADERA_FRF_COEFFICIENT_3L_2: - case MADERA_FRF_COEFFICIENT_3L_3: - case MADERA_FRF_COEFFICIENT_3L_4: - case MADERA_FRF_COEFFICIENT_3R_1: - case MADERA_FRF_COEFFICIENT_3R_2: - case MADERA_FRF_COEFFICIENT_3R_3: - case MADERA_FRF_COEFFICIENT_3R_4: - case MADERA_FRF_COEFFICIENT_5L_1: - case MADERA_FRF_COEFFICIENT_5L_2: - case MADERA_FRF_COEFFICIENT_5L_3: - case MADERA_FRF_COEFFICIENT_5L_4: - case MADERA_FRF_COEFFICIENT_5R_1: - case MADERA_FRF_COEFFICIENT_5R_2: - case MADERA_FRF_COEFFICIENT_5R_3: - case MADERA_FRF_COEFFICIENT_5R_4: case MADERA_DFC1_CTRL: case MADERA_DFC1_RX: case MADERA_DFC1_TX: diff --git a/drivers/mfd/cs47l92-tables.c b/drivers/mfd/cs47l92-tables.c index 3dc1fefe68f5..c8a234381350 100644 --- a/drivers/mfd/cs47l92-tables.c +++ b/drivers/mfd/cs47l92-tables.c @@ -1063,7 +1063,6 @@ static const struct reg_default cs47l92_reg_default[] = { { 0x0000185e, 0xffff }, /* R6238 (0x185e) - IRQ1 Mask 31 */ { 0x0000185f, 0xffff }, /* R6239 (0x185f) - IRQ1 Mask 32 */ { 0x00001860, 0x0001 }, /* R6240 (0x1860) - IRQ1 Mask 33 */ - { 0x00001948, 0x031f }, /* R6472 (0x1948) - IRQ2 Mask 9 */ { 0x00001a06, 0x0000 }, /* R6662 (0x1a06) - Interrupt Debounce 7 */ { 0x00001a80, 0x4400 }, /* R6784 (0x1a80) - IRQ1 Ctrl */ }; diff --git a/include/linux/mfd/madera/registers.h b/include/linux/mfd/madera/registers.h index 6439c0282ac6..53c2377b54b2 100644 --- a/include/linux/mfd/madera/registers.h +++ b/include/linux/mfd/madera/registers.h @@ -76,9 +76,7 @@ #define MADERA_FLL1_CONTROL_4 0x174 #define MADERA_FLL1_CONTROL_5 0x175 #define MADERA_FLL1_CONTROL_6 0x176 -#define MADERA_FLL1_LOOP_FILTER_TEST_1 0x177 #define CS47L92_FLL1_CONTROL_7 0x177 -#define MADERA_FLL1_NCO_TEST_0 0x178 #define CS47L92_FLL1_CONTROL_8 0x178 #define MADERA_FLL1_CONTROL_7 0x179 #define CS47L92_FLL1_CONTROL_9 0x179 @@ -111,9 +109,7 @@ #define MADERA_FLL2_CONTROL_4 0x194 #define MADERA_FLL2_CONTROL_5 0x195 #define MADERA_FLL2_CONTROL_6 0x196 -#define MADERA_FLL2_LOOP_FILTER_TEST_1 0x197 #define CS47L92_FLL2_CONTROL_7 0x197 -#define MADERA_FLL2_NCO_TEST_0 0x198 #define CS47L92_FLL2_CONTROL_8 0x198 #define MADERA_FLL2_CONTROL_7 0x199 #define CS47L92_FLL2_CONTROL_9 0x199 @@ -137,8 +133,6 @@ #define MADERA_FLL3_CONTROL_4 0x1B4 #define MADERA_FLL3_CONTROL_5 0x1B5 #define MADERA_FLL3_CONTROL_6 0x1B6 -#define MADERA_FLL3_LOOP_FILTER_TEST_1 0x1B7 -#define MADERA_FLL3_NCO_TEST_0 0x1B8 #define MADERA_FLL3_CONTROL_7 0x1B9 #define MADERA_FLL3_SYNCHRONISER_1 0x1C1 #define MADERA_FLL3_SYNCHRONISER_2 0x1C2 @@ -304,9 +298,6 @@ #define MADERA_OUTPUT_PATH_CONFIG_6R 0x43C #define MADERA_DAC_DIGITAL_VOLUME_6R 0x43D #define MADERA_NOISE_GATE_SELECT_6R 0x43F -#define MADERA_DRE_ENABLE 0x440 -#define MADERA_EDRE_ENABLE 0x448 -#define MADERA_EDRE_MANUAL 0x44A #define MADERA_DAC_AEC_CONTROL_1 0x450 #define MADERA_DAC_AEC_CONTROL_2 0x451 #define MADERA_NOISE_GATE_CONTROL 0x458 @@ -1182,68 +1173,6 @@ #define MADERA_FCR_COEFF_END 0xFC5 #define MADERA_AUXPDM1_CTRL_0 0x10C0 #define MADERA_AUXPDM1_CTRL_1 0x10C1 -#define MADERA_DAC_COMP_1 0x1300 -#define MADERA_DAC_COMP_2 0x1302 -#define MADERA_FRF_COEFFICIENT_1L_1 0x1380 -#define MADERA_FRF_COEFFICIENT_1L_2 0x1381 -#define MADERA_FRF_COEFFICIENT_1L_3 0x1382 -#define MADERA_FRF_COEFFICIENT_1L_4 0x1383 -#define MADERA_FRF_COEFFICIENT_1R_1 0x1390 -#define MADERA_FRF_COEFFICIENT_1R_2 0x1391 -#define MADERA_FRF_COEFFICIENT_1R_3 0x1392 -#define MADERA_FRF_COEFFICIENT_1R_4 0x1393 -#define MADERA_FRF_COEFFICIENT_2L_1 0x13A0 -#define MADERA_FRF_COEFFICIENT_2L_2 0x13A1 -#define MADERA_FRF_COEFFICIENT_2L_3 0x13A2 -#define MADERA_FRF_COEFFICIENT_2L_4 0x13A3 -#define MADERA_FRF_COEFFICIENT_2R_1 0x13B0 -#define MADERA_FRF_COEFFICIENT_2R_2 0x13B1 -#define MADERA_FRF_COEFFICIENT_2R_3 0x13B2 -#define MADERA_FRF_COEFFICIENT_2R_4 0x13B3 -#define MADERA_FRF_COEFFICIENT_3L_1 0x13C0 -#define MADERA_FRF_COEFFICIENT_3L_2 0x13C1 -#define MADERA_FRF_COEFFICIENT_3L_3 0x13C2 -#define MADERA_FRF_COEFFICIENT_3L_4 0x13C3 -#define MADERA_FRF_COEFFICIENT_3R_1 0x13D0 -#define MADERA_FRF_COEFFICIENT_3R_2 0x13D1 -#define MADERA_FRF_COEFFICIENT_3R_3 0x13D2 -#define MADERA_FRF_COEFFICIENT_3R_4 0x13D3 -#define MADERA_FRF_COEFFICIENT_4L_1 0x13E0 -#define MADERA_FRF_COEFFICIENT_4L_2 0x13E1 -#define MADERA_FRF_COEFFICIENT_4L_3 0x13E2 -#define MADERA_FRF_COEFFICIENT_4L_4 0x13E3 -#define MADERA_FRF_COEFFICIENT_4R_1 0x13F0 -#define MADERA_FRF_COEFFICIENT_4R_2 0x13F1 -#define MADERA_FRF_COEFFICIENT_4R_3 0x13F2 -#define MADERA_FRF_COEFFICIENT_4R_4 0x13F3 -#define CS47L35_FRF_COEFFICIENT_4L_1 0x13A0 -#define CS47L35_FRF_COEFFICIENT_4L_2 0x13A1 -#define CS47L35_FRF_COEFFICIENT_4L_3 0x13A2 -#define CS47L35_FRF_COEFFICIENT_4L_4 0x13A3 -#define CS47L35_FRF_COEFFICIENT_5L_1 0x13B0 -#define CS47L35_FRF_COEFFICIENT_5L_2 0x13B1 -#define CS47L35_FRF_COEFFICIENT_5L_3 0x13B2 -#define CS47L35_FRF_COEFFICIENT_5L_4 0x13B3 -#define CS47L35_FRF_COEFFICIENT_5R_1 0x13C0 -#define CS47L35_FRF_COEFFICIENT_5R_2 0x13C1 -#define CS47L35_FRF_COEFFICIENT_5R_3 0x13C2 -#define CS47L35_FRF_COEFFICIENT_5R_4 0x13C3 -#define MADERA_FRF_COEFFICIENT_5L_1 0x1400 -#define MADERA_FRF_COEFFICIENT_5L_2 0x1401 -#define MADERA_FRF_COEFFICIENT_5L_3 0x1402 -#define MADERA_FRF_COEFFICIENT_5L_4 0x1403 -#define MADERA_FRF_COEFFICIENT_5R_1 0x1410 -#define MADERA_FRF_COEFFICIENT_5R_2 0x1411 -#define MADERA_FRF_COEFFICIENT_5R_3 0x1412 -#define MADERA_FRF_COEFFICIENT_5R_4 0x1413 -#define MADERA_FRF_COEFFICIENT_6L_1 0x1420 -#define MADERA_FRF_COEFFICIENT_6L_2 0x1421 -#define MADERA_FRF_COEFFICIENT_6L_3 0x1422 -#define MADERA_FRF_COEFFICIENT_6L_4 0x1423 -#define MADERA_FRF_COEFFICIENT_6R_1 0x1430 -#define MADERA_FRF_COEFFICIENT_6R_2 0x1431 -#define MADERA_FRF_COEFFICIENT_6R_3 0x1432 -#define MADERA_FRF_COEFFICIENT_6R_4 0x1433 #define MADERA_DFC1_CTRL 0x1480 #define MADERA_DFC1_RX 0x1482 #define MADERA_DFC1_TX 0x1484 @@ -1573,15 +1502,6 @@ #define MADERA_FLL1_REFCLK_SRC_SHIFT 0 #define MADERA_FLL1_REFCLK_SRC_WIDTH 4 -/* (0x0177) FLL1_Loop_Filter_Test_1 */ -#define MADERA_FLL1_FRC_INTEG_UPD 0x8000 -#define MADERA_FLL1_FRC_INTEG_UPD_MASK 0x8000 -#define MADERA_FLL1_FRC_INTEG_UPD_SHIFT 15 -#define MADERA_FLL1_FRC_INTEG_UPD_WIDTH 1 -#define MADERA_FLL1_FRC_INTEG_VAL_MASK 0x0FFF -#define MADERA_FLL1_FRC_INTEG_VAL_SHIFT 0 -#define MADERA_FLL1_FRC_INTEG_VAL_WIDTH 12 - /* (0x0179) FLL1_Control_7 */ #define MADERA_FLL1_GAIN_MASK 0x003c #define MADERA_FLL1_GAIN_SHIFT 2 From d6871a73387d51dfdde6ad1479aea54d3eafcc89 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Wed, 26 Jun 2019 14:33:36 +0100 Subject: [PATCH 44/45] mfd: madera: Fixup SPDX headers GPL-2.0-only is the preferred way of expressing v2 of the GPL, so switch to that. Remove some redundant copyright notices and correct some instances where the wrong comment type has been used in header files. Signed-off-by: Charles Keepax Signed-off-by: Lee Jones --- drivers/mfd/cs47l15-tables.c | 2 +- drivers/mfd/cs47l35-tables.c | 6 +----- drivers/mfd/cs47l85-tables.c | 6 +----- drivers/mfd/cs47l90-tables.c | 6 +----- drivers/mfd/cs47l92-tables.c | 2 +- drivers/mfd/madera-core.c | 6 +----- drivers/mfd/madera-i2c.c | 6 +----- drivers/mfd/madera-spi.c | 6 +----- include/linux/mfd/madera/core.h | 6 +----- include/linux/mfd/madera/pdata.h | 6 +----- include/linux/mfd/madera/registers.h | 6 +----- 11 files changed, 11 insertions(+), 47 deletions(-) diff --git a/drivers/mfd/cs47l15-tables.c b/drivers/mfd/cs47l15-tables.c index 73db8d03b531..f81b45336690 100644 --- a/drivers/mfd/cs47l15-tables.c +++ b/drivers/mfd/cs47l15-tables.c @@ -1,4 +1,4 @@ -// SPDX-License-Identifier: GPL-2.0 +// SPDX-License-Identifier: GPL-2.0-only /* * Regmap tables for CS47L15 codec * diff --git a/drivers/mfd/cs47l35-tables.c b/drivers/mfd/cs47l35-tables.c index fe838cbc2a7e..a0bc6c5100d6 100644 --- a/drivers/mfd/cs47l35-tables.c +++ b/drivers/mfd/cs47l35-tables.c @@ -1,12 +1,8 @@ -// SPDX-License-Identifier: GPL-2.0 +// SPDX-License-Identifier: GPL-2.0-only /* * Regmap tables for CS47L35 codec * * Copyright (C) 2015-2017 Cirrus Logic - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by the - * Free Software Foundation; version 2. */ #include diff --git a/drivers/mfd/cs47l85-tables.c b/drivers/mfd/cs47l85-tables.c index d0198b5e86ba..270d8eda3f5f 100644 --- a/drivers/mfd/cs47l85-tables.c +++ b/drivers/mfd/cs47l85-tables.c @@ -1,12 +1,8 @@ -// SPDX-License-Identifier: GPL-2.0 +// SPDX-License-Identifier: GPL-2.0-only /* * Regmap tables for CS47L85 codec * * Copyright (C) 2015-2017 Cirrus Logic - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by the - * Free Software Foundation; version 2. */ #include diff --git a/drivers/mfd/cs47l90-tables.c b/drivers/mfd/cs47l90-tables.c index 2c761fc241f3..7345fc09c0bb 100644 --- a/drivers/mfd/cs47l90-tables.c +++ b/drivers/mfd/cs47l90-tables.c @@ -1,12 +1,8 @@ -// SPDX-License-Identifier: GPL-2.0 +// SPDX-License-Identifier: GPL-2.0-only /* * Regmap tables for CS47L90 codec * * Copyright (C) 2015-2017 Cirrus Logic - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by the - * Free Software Foundation; version 2. */ #include diff --git a/drivers/mfd/cs47l92-tables.c b/drivers/mfd/cs47l92-tables.c index c8a234381350..f296e355df4d 100644 --- a/drivers/mfd/cs47l92-tables.c +++ b/drivers/mfd/cs47l92-tables.c @@ -1,4 +1,4 @@ -// SPDX-License-Identifier: GPL-2.0 +// SPDX-License-Identifier: GPL-2.0-only /* * Regmap tables for CS47L92 codec * diff --git a/drivers/mfd/madera-core.c b/drivers/mfd/madera-core.c index b9e9c169c6cc..29540cbf7593 100644 --- a/drivers/mfd/madera-core.c +++ b/drivers/mfd/madera-core.c @@ -1,12 +1,8 @@ -// SPDX-License-Identifier: GPL-2.0 +// SPDX-License-Identifier: GPL-2.0-only /* * Core MFD support for Cirrus Logic Madera codecs * * Copyright (C) 2015-2018 Cirrus Logic - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by the - * Free Software Foundation; version 2. */ #include diff --git a/drivers/mfd/madera-i2c.c b/drivers/mfd/madera-i2c.c index 3f4ab5dcf5c3..6b965eb034b6 100644 --- a/drivers/mfd/madera-i2c.c +++ b/drivers/mfd/madera-i2c.c @@ -1,12 +1,8 @@ -// SPDX-License-Identifier: GPL-2.0 +// SPDX-License-Identifier: GPL-2.0-only /* * I2C bus interface to Cirrus Logic Madera codecs * * Copyright (C) 2015-2018 Cirrus Logic - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by the - * Free Software Foundation; version 2. */ #include diff --git a/drivers/mfd/madera-spi.c b/drivers/mfd/madera-spi.c index d76c7e7376d7..e860f5ff0933 100644 --- a/drivers/mfd/madera-spi.c +++ b/drivers/mfd/madera-spi.c @@ -1,12 +1,8 @@ -// SPDX-License-Identifier: GPL-2.0 +// SPDX-License-Identifier: GPL-2.0-only /* * SPI bus interface to Cirrus Logic Madera codecs * * Copyright (C) 2015-2018 Cirrus Logic - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by the - * Free Software Foundation; version 2. */ #include diff --git a/include/linux/mfd/madera/core.h b/include/linux/mfd/madera/core.h index 7b87f9a02ecc..7ffa696cce7c 100644 --- a/include/linux/mfd/madera/core.h +++ b/include/linux/mfd/madera/core.h @@ -1,12 +1,8 @@ -// SPDX-License-Identifier: GPL-2.0 +/* SPDX-License-Identifier: GPL-2.0-only */ /* * MFD internals for Cirrus Logic Madera codecs * * Copyright (C) 2015-2018 Cirrus Logic - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by the - * Free Software Foundation; version 2. */ #ifndef MADERA_CORE_H diff --git a/include/linux/mfd/madera/pdata.h b/include/linux/mfd/madera/pdata.h index dd00ab824e5b..ec0711bcad50 100644 --- a/include/linux/mfd/madera/pdata.h +++ b/include/linux/mfd/madera/pdata.h @@ -1,12 +1,8 @@ -// SPDX-License-Identifier: GPL-2.0 +/* SPDX-License-Identifier: GPL-2.0-only */ /* * Platform data for Cirrus Logic Madera codecs * * Copyright (C) 2015-2018 Cirrus Logic - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by the - * Free Software Foundation; version 2. */ #ifndef MADERA_PDATA_H diff --git a/include/linux/mfd/madera/registers.h b/include/linux/mfd/madera/registers.h index 53c2377b54b2..fe909d177762 100644 --- a/include/linux/mfd/madera/registers.h +++ b/include/linux/mfd/madera/registers.h @@ -1,12 +1,8 @@ -// SPDX-License-Identifier: GPL-2.0 +/* SPDX-License-Identifier: GPL-2.0-only */ /* * Madera register definitions * * Copyright (C) 2015-2018 Cirrus Logic - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by the - * Free Software Foundation; version 2. */ #ifndef MADERA_REGISTERS_H From 7efd105c27fd2323789b41b64763a0e33ed79c08 Mon Sep 17 00:00:00 2001 From: Axel Lin Date: Wed, 26 Jun 2019 21:30:07 +0800 Subject: [PATCH 45/45] mfd: hi655x-pmic: Fix missing return value check for devm_regmap_init_mmio_clk Since devm_regmap_init_mmio_clk can fail, add return value checking. Signed-off-by: Axel Lin Acked-by: Chen Feng Signed-off-by: Lee Jones --- drivers/mfd/hi655x-pmic.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/mfd/hi655x-pmic.c b/drivers/mfd/hi655x-pmic.c index 96c07fa1802a..6693f74aa6ab 100644 --- a/drivers/mfd/hi655x-pmic.c +++ b/drivers/mfd/hi655x-pmic.c @@ -112,6 +112,8 @@ static int hi655x_pmic_probe(struct platform_device *pdev) pmic->regmap = devm_regmap_init_mmio_clk(dev, NULL, base, &hi655x_regmap_config); + if (IS_ERR(pmic->regmap)) + return PTR_ERR(pmic->regmap); regmap_read(pmic->regmap, HI655X_BUS_ADDR(HI655X_VER_REG), &pmic->ver); if ((pmic->ver < PMU_VER_START) || (pmic->ver > PMU_VER_END)) {