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ASoC: Fixes for v6.9
A bunch of fixes that came in during the merge window, probably the most substantial thing is the DPCM locking fix for compressed audio which has been lurking for a while. -----BEGIN PGP SIGNATURE----- iQEzBAABCgAdFiEEreZoqmdXGLWf4p/qJNaLcl1Uh9AFAmX8GaoACgkQJNaLcl1U h9Bbhgf8Dd66lvQDLnc6xJ5wznNrrlqgSGdMddIBmEUDz+dgw/ODMZXDG3mKmQSo eE4eJ/fYeg/Kz4wrdaC+K5zZAZ+o61erXSKYmwyyE5YYnQLXd086Q6h8B0zKBA8e vLChyVfoQE6lbIiGGedCQ+W2nP8k7HURkafTasBpq/PD/ZZgsQ8IbcQTf2EPQpw8 x9eRZFwswUvhaVckabJR23zIjkC/dlraAt0LAqWnjzetq0ZUL/7Um/SiKy+yF7f5 0w+QqzizbNee4kscadywAOB5u5S2P8F37cqH9cT6q0bvFYgwri0/CXtHd3m5164o j/NQbxbFz/mlI4CFoXg5BCss5fd0zA== =GHC9 -----END PGP SIGNATURE----- Merge tag 'asoc-fix-v6.9-merge-window' of https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound into for-linus ASoC: Fixes for v6.9 A bunch of fixes that came in during the merge window, probably the most substantial thing is the DPCM locking fix for compressed audio which has been lurking for a while.
This commit is contained in:
Takashi Iwai
commit
9f2347842b
7
.mailmap
7
.mailmap
@ -325,6 +325,7 @@ Kenneth W Chen <kenneth.w.chen@intel.com>
|
||||
Kenneth Westfield <quic_kwestfie@quicinc.com> <kwestfie@codeaurora.org>
|
||||
Kiran Gunda <quic_kgunda@quicinc.com> <kgunda@codeaurora.org>
|
||||
Kirill Tkhai <tkhai@ya.ru> <ktkhai@virtuozzo.com>
|
||||
Kishon Vijay Abraham I <kishon@kernel.org> <kishon@ti.com>
|
||||
Konstantin Khlebnikov <koct9i@gmail.com> <khlebnikov@yandex-team.ru>
|
||||
Konstantin Khlebnikov <koct9i@gmail.com> <k.khlebnikov@samsung.com>
|
||||
Koushik <raghavendra.koushik@neterion.com>
|
||||
@ -553,6 +554,7 @@ Senthilkumar N L <quic_snlakshm@quicinc.com> <snlakshm@codeaurora.org>
|
||||
Serge Hallyn <sergeh@kernel.org> <serge.hallyn@canonical.com>
|
||||
Serge Hallyn <sergeh@kernel.org> <serue@us.ibm.com>
|
||||
Seth Forshee <sforshee@kernel.org> <seth.forshee@canonical.com>
|
||||
Shakeel Butt <shakeel.butt@linux.dev> <shakeelb@google.com>
|
||||
Shannon Nelson <shannon.nelson@amd.com> <snelson@pensando.io>
|
||||
Shannon Nelson <shannon.nelson@amd.com> <shannon.nelson@intel.com>
|
||||
Shannon Nelson <shannon.nelson@amd.com> <shannon.nelson@oracle.com>
|
||||
@ -608,6 +610,11 @@ TripleX Chung <xxx.phy@gmail.com> <triplex@zh-kernel.org>
|
||||
TripleX Chung <xxx.phy@gmail.com> <zhongyu@18mail.cn>
|
||||
Tsuneo Yoshioka <Tsuneo.Yoshioka@f-secure.com>
|
||||
Tudor Ambarus <tudor.ambarus@linaro.org> <tudor.ambarus@microchip.com>
|
||||
Tvrtko Ursulin <tursulin@ursulin.net> <tvrtko.ursulin@intel.com>
|
||||
Tvrtko Ursulin <tursulin@ursulin.net> <tvrtko.ursulin@linux.intel.com>
|
||||
Tvrtko Ursulin <tursulin@ursulin.net> <tvrtko.ursulin@sophos.com>
|
||||
Tvrtko Ursulin <tursulin@ursulin.net> <tvrtko.ursulin@onelan.co.uk>
|
||||
Tvrtko Ursulin <tursulin@ursulin.net> <tvrtko@ursulin.net>
|
||||
Tycho Andersen <tycho@tycho.pizza> <tycho@tycho.ws>
|
||||
Tzung-Bi Shih <tzungbi@kernel.org> <tzungbi@google.com>
|
||||
Uwe Kleine-König <ukleinek@informatik.uni-freiburg.de>
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||||
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@ -95,6 +95,9 @@ The kernel provides a function to invoke the buffer clearing:
|
||||
|
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mds_clear_cpu_buffers()
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||||
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Also macro CLEAR_CPU_BUFFERS can be used in ASM late in exit-to-user path.
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Other than CFLAGS.ZF, this macro doesn't clobber any registers.
|
||||
|
||||
The mitigation is invoked on kernel/userspace, hypervisor/guest and C-state
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(idle) transitions.
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|
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@ -138,17 +141,30 @@ Mitigation points
|
||||
|
||||
When transitioning from kernel to user space the CPU buffers are flushed
|
||||
on affected CPUs when the mitigation is not disabled on the kernel
|
||||
command line. The migitation is enabled through the static key
|
||||
mds_user_clear.
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||||
command line. The mitigation is enabled through the feature flag
|
||||
X86_FEATURE_CLEAR_CPU_BUF.
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|
||||
The mitigation is invoked in prepare_exit_to_usermode() which covers
|
||||
all but one of the kernel to user space transitions. The exception
|
||||
is when we return from a Non Maskable Interrupt (NMI), which is
|
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handled directly in do_nmi().
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||||
The mitigation is invoked just before transitioning to userspace after
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user registers are restored. This is done to minimize the window in
|
||||
which kernel data could be accessed after VERW e.g. via an NMI after
|
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VERW.
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||||
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(The reason that NMI is special is that prepare_exit_to_usermode() can
|
||||
enable IRQs. In NMI context, NMIs are blocked, and we don't want to
|
||||
enable IRQs with NMIs blocked.)
|
||||
**Corner case not handled**
|
||||
Interrupts returning to kernel don't clear CPUs buffers since the
|
||||
exit-to-user path is expected to do that anyways. But, there could be
|
||||
a case when an NMI is generated in kernel after the exit-to-user path
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has cleared the buffers. This case is not handled and NMI returning to
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kernel don't clear CPU buffers because:
|
||||
|
||||
1. It is rare to get an NMI after VERW, but before returning to userspace.
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2. For an unprivileged user, there is no known way to make that NMI
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||||
less rare or target it.
|
||||
3. It would take a large number of these precisely-timed NMIs to mount
|
||||
an actual attack. There's presumably not enough bandwidth.
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4. The NMI in question occurs after a VERW, i.e. when user state is
|
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restored and most interesting data is already scrubbed. Whats left
|
||||
is only the data that NMI touches, and that may or may not be of
|
||||
any interest.
|
||||
|
||||
|
||||
2. C-State transition
|
||||
|
||||
@ -388,6 +388,12 @@ latex_elements = {
|
||||
verbatimhintsturnover=false,
|
||||
''',
|
||||
|
||||
#
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||||
# Some of our authors are fond of deep nesting; tell latex to
|
||||
# cope.
|
||||
#
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||||
'maxlistdepth': '10',
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||||
|
||||
# For CJK One-half spacing, need to be in front of hyperref
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||||
'extrapackages': r'\usepackage{setspace}',
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||||
|
||||
|
||||
@ -85,8 +85,8 @@ allOf:
|
||||
|
||||
clock-names:
|
||||
items:
|
||||
- const: dout_cmu_misc_bus
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||||
- const: dout_cmu_misc_sss
|
||||
- const: bus
|
||||
- const: sss
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
|
||||
@ -65,9 +65,11 @@ properties:
|
||||
|
||||
rx-internal-delay-ps:
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||||
enum: [0, 1800]
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||||
default: 0
|
||||
|
||||
tx-internal-delay-ps:
|
||||
enum: [0, 2000]
|
||||
default: 0
|
||||
|
||||
'#address-cells':
|
||||
const: 1
|
||||
|
||||
@ -185,11 +185,12 @@ properties:
|
||||
|
||||
gpio-ranges:
|
||||
items:
|
||||
- description: A phandle to the CODEC pinctrl node
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||||
minimum: 0
|
||||
- const: 0
|
||||
- const: 0
|
||||
- const: 3
|
||||
- items:
|
||||
- description: A phandle to the CODEC pinctrl node
|
||||
minimum: 0
|
||||
- const: 0
|
||||
- const: 0
|
||||
- const: 3
|
||||
|
||||
patternProperties:
|
||||
"-state$":
|
||||
|
||||
@ -545,7 +545,7 @@ In such scenario, dpll device input signal shall be also configurable
|
||||
to drive dpll with signal recovered from the PHY netdevice.
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||||
This is done by exposing a pin to the netdevice - attaching pin to the
|
||||
netdevice itself with
|
||||
``netdev_dpll_pin_set(struct net_device *dev, struct dpll_pin *dpll_pin)``.
|
||||
``dpll_netdev_pin_set(struct net_device *dev, struct dpll_pin *dpll_pin)``.
|
||||
Exposed pin id handle ``DPLL_A_PIN_ID`` is then identifiable by the user
|
||||
as it is attached to rtnetlink respond to get ``RTM_NEWLINK`` command in
|
||||
nested attribute ``IFLA_DPLL_PIN``.
|
||||
|
||||
@ -1,9 +1,9 @@
|
||||
.. SPDX-License-Identifier: GPL-2.0
|
||||
.. Copyright (C) 2023 Google LLC
|
||||
|
||||
=====================================================
|
||||
inet_connection_sock struct fast path usage breakdown
|
||||
=====================================================
|
||||
==========================================
|
||||
inet_sock struct fast path usage breakdown
|
||||
==========================================
|
||||
|
||||
Type Name fastpath_tx_access fastpath_rx_access comment
|
||||
..struct ..inet_sock
|
||||
|
||||
@ -431,7 +431,7 @@ patchwork checks
|
||||
Checks in patchwork are mostly simple wrappers around existing kernel
|
||||
scripts, the sources are available at:
|
||||
|
||||
https://github.com/kuba-moo/nipa/tree/master/tests
|
||||
https://github.com/linux-netdev/nipa/tree/master/tests
|
||||
|
||||
**Do not** post your patches just to run them through the checks.
|
||||
You must ensure that your patches are ready by testing them locally
|
||||
|
||||
@ -29,10 +29,7 @@ all_languages = {
|
||||
}
|
||||
|
||||
class LanguagesNode(nodes.Element):
|
||||
def __init__(self, current_language, *args, **kwargs):
|
||||
super().__init__(*args, **kwargs)
|
||||
|
||||
self.current_language = current_language
|
||||
pass
|
||||
|
||||
class TranslationsTransform(Transform):
|
||||
default_priority = 900
|
||||
@ -49,7 +46,8 @@ class TranslationsTransform(Transform):
|
||||
# normalize docname to be the untranslated one
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||||
docname = os.path.join(*components[2:])
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||||
|
||||
new_nodes = LanguagesNode(all_languages[this_lang_code])
|
||||
new_nodes = LanguagesNode()
|
||||
new_nodes['current_language'] = all_languages[this_lang_code]
|
||||
|
||||
for lang_code, lang_name in all_languages.items():
|
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if lang_code == this_lang_code:
|
||||
@ -84,7 +82,7 @@ def process_languages(app, doctree, docname):
|
||||
|
||||
html_content = app.builder.templates.render('translations.html',
|
||||
context={
|
||||
'current_language': node.current_language,
|
||||
'current_language': node['current_language'],
|
||||
'languages': languages,
|
||||
})
|
||||
|
||||
|
||||
@ -10,3 +10,4 @@ Hyper-V Enlightenments
|
||||
overview
|
||||
vmbus
|
||||
clocks
|
||||
vpci
|
||||
|
||||
316
Documentation/virt/hyperv/vpci.rst
Normal file
316
Documentation/virt/hyperv/vpci.rst
Normal file
@ -0,0 +1,316 @@
|
||||
.. SPDX-License-Identifier: GPL-2.0
|
||||
|
||||
PCI pass-thru devices
|
||||
=========================
|
||||
In a Hyper-V guest VM, PCI pass-thru devices (also called
|
||||
virtual PCI devices, or vPCI devices) are physical PCI devices
|
||||
that are mapped directly into the VM's physical address space.
|
||||
Guest device drivers can interact directly with the hardware
|
||||
without intermediation by the host hypervisor. This approach
|
||||
provides higher bandwidth access to the device with lower
|
||||
latency, compared with devices that are virtualized by the
|
||||
hypervisor. The device should appear to the guest just as it
|
||||
would when running on bare metal, so no changes are required
|
||||
to the Linux device drivers for the device.
|
||||
|
||||
Hyper-V terminology for vPCI devices is "Discrete Device
|
||||
Assignment" (DDA). Public documentation for Hyper-V DDA is
|
||||
available here: `DDA`_
|
||||
|
||||
.. _DDA: https://learn.microsoft.com/en-us/windows-server/virtualization/hyper-v/plan/plan-for-deploying-devices-using-discrete-device-assignment
|
||||
|
||||
DDA is typically used for storage controllers, such as NVMe,
|
||||
and for GPUs. A similar mechanism for NICs is called SR-IOV
|
||||
and produces the same benefits by allowing a guest device
|
||||
driver to interact directly with the hardware. See Hyper-V
|
||||
public documentation here: `SR-IOV`_
|
||||
|
||||
.. _SR-IOV: https://learn.microsoft.com/en-us/windows-hardware/drivers/network/overview-of-single-root-i-o-virtualization--sr-iov-
|
||||
|
||||
This discussion of vPCI devices includes DDA and SR-IOV
|
||||
devices.
|
||||
|
||||
Device Presentation
|
||||
-------------------
|
||||
Hyper-V provides full PCI functionality for a vPCI device when
|
||||
it is operating, so the Linux device driver for the device can
|
||||
be used unchanged, provided it uses the correct Linux kernel
|
||||
APIs for accessing PCI config space and for other integration
|
||||
with Linux. But the initial detection of the PCI device and
|
||||
its integration with the Linux PCI subsystem must use Hyper-V
|
||||
specific mechanisms. Consequently, vPCI devices on Hyper-V
|
||||
have a dual identity. They are initially presented to Linux
|
||||
guests as VMBus devices via the standard VMBus "offer"
|
||||
mechanism, so they have a VMBus identity and appear under
|
||||
/sys/bus/vmbus/devices. The VMBus vPCI driver in Linux at
|
||||
drivers/pci/controller/pci-hyperv.c handles a newly introduced
|
||||
vPCI device by fabricating a PCI bus topology and creating all
|
||||
the normal PCI device data structures in Linux that would
|
||||
exist if the PCI device were discovered via ACPI on a bare-
|
||||
metal system. Once those data structures are set up, the
|
||||
device also has a normal PCI identity in Linux, and the normal
|
||||
Linux device driver for the vPCI device can function as if it
|
||||
were running in Linux on bare-metal. Because vPCI devices are
|
||||
presented dynamically through the VMBus offer mechanism, they
|
||||
do not appear in the Linux guest's ACPI tables. vPCI devices
|
||||
may be added to a VM or removed from a VM at any time during
|
||||
the life of the VM, and not just during initial boot.
|
||||
|
||||
With this approach, the vPCI device is a VMBus device and a
|
||||
PCI device at the same time. In response to the VMBus offer
|
||||
message, the hv_pci_probe() function runs and establishes a
|
||||
VMBus connection to the vPCI VSP on the Hyper-V host. That
|
||||
connection has a single VMBus channel. The channel is used to
|
||||
exchange messages with the vPCI VSP for the purpose of setting
|
||||
up and configuring the vPCI device in Linux. Once the device
|
||||
is fully configured in Linux as a PCI device, the VMBus
|
||||
channel is used only if Linux changes the vCPU to be interrupted
|
||||
in the guest, or if the vPCI device is removed from
|
||||
the VM while the VM is running. The ongoing operation of the
|
||||
device happens directly between the Linux device driver for
|
||||
the device and the hardware, with VMBus and the VMBus channel
|
||||
playing no role.
|
||||
|
||||
PCI Device Setup
|
||||
----------------
|
||||
PCI device setup follows a sequence that Hyper-V originally
|
||||
created for Windows guests, and that can be ill-suited for
|
||||
Linux guests due to differences in the overall structure of
|
||||
the Linux PCI subsystem compared with Windows. Nonetheless,
|
||||
with a bit of hackery in the Hyper-V virtual PCI driver for
|
||||
Linux, the virtual PCI device is setup in Linux so that
|
||||
generic Linux PCI subsystem code and the Linux driver for the
|
||||
device "just work".
|
||||
|
||||
Each vPCI device is set up in Linux to be in its own PCI
|
||||
domain with a host bridge. The PCI domainID is derived from
|
||||
bytes 4 and 5 of the instance GUID assigned to the VMBus vPCI
|
||||
device. The Hyper-V host does not guarantee that these bytes
|
||||
are unique, so hv_pci_probe() has an algorithm to resolve
|
||||
collisions. The collision resolution is intended to be stable
|
||||
across reboots of the same VM so that the PCI domainIDs don't
|
||||
change, as the domainID appears in the user space
|
||||
configuration of some devices.
|
||||
|
||||
hv_pci_probe() allocates a guest MMIO range to be used as PCI
|
||||
config space for the device. This MMIO range is communicated
|
||||
to the Hyper-V host over the VMBus channel as part of telling
|
||||
the host that the device is ready to enter d0. See
|
||||
hv_pci_enter_d0(). When the guest subsequently accesses this
|
||||
MMIO range, the Hyper-V host intercepts the accesses and maps
|
||||
them to the physical device PCI config space.
|
||||
|
||||
hv_pci_probe() also gets BAR information for the device from
|
||||
the Hyper-V host, and uses this information to allocate MMIO
|
||||
space for the BARs. That MMIO space is then setup to be
|
||||
associated with the host bridge so that it works when generic
|
||||
PCI subsystem code in Linux processes the BARs.
|
||||
|
||||
Finally, hv_pci_probe() creates the root PCI bus. At this
|
||||
point the Hyper-V virtual PCI driver hackery is done, and the
|
||||
normal Linux PCI machinery for scanning the root bus works to
|
||||
detect the device, to perform driver matching, and to
|
||||
initialize the driver and device.
|
||||
|
||||
PCI Device Removal
|
||||
------------------
|
||||
A Hyper-V host may initiate removal of a vPCI device from a
|
||||
guest VM at any time during the life of the VM. The removal
|
||||
is instigated by an admin action taken on the Hyper-V host and
|
||||
is not under the control of the guest OS.
|
||||
|
||||
A guest VM is notified of the removal by an unsolicited
|
||||
"Eject" message sent from the host to the guest over the VMBus
|
||||
channel associated with the vPCI device. Upon receipt of such
|
||||
a message, the Hyper-V virtual PCI driver in Linux
|
||||
asynchronously invokes Linux kernel PCI subsystem calls to
|
||||
shutdown and remove the device. When those calls are
|
||||
complete, an "Ejection Complete" message is sent back to
|
||||
Hyper-V over the VMBus channel indicating that the device has
|
||||
been removed. At this point, Hyper-V sends a VMBus rescind
|
||||
message to the Linux guest, which the VMBus driver in Linux
|
||||
processes by removing the VMBus identity for the device. Once
|
||||
that processing is complete, all vestiges of the device having
|
||||
been present are gone from the Linux kernel. The rescind
|
||||
message also indicates to the guest that Hyper-V has stopped
|
||||
providing support for the vPCI device in the guest. If the
|
||||
guest were to attempt to access that device's MMIO space, it
|
||||
would be an invalid reference. Hypercalls affecting the device
|
||||
return errors, and any further messages sent in the VMBus
|
||||
channel are ignored.
|
||||
|
||||
After sending the Eject message, Hyper-V allows the guest VM
|
||||
60 seconds to cleanly shutdown the device and respond with
|
||||
Ejection Complete before sending the VMBus rescind
|
||||
message. If for any reason the Eject steps don't complete
|
||||
within the allowed 60 seconds, the Hyper-V host forcibly
|
||||
performs the rescind steps, which will likely result in
|
||||
cascading errors in the guest because the device is now no
|
||||
longer present from the guest standpoint and accessing the
|
||||
device MMIO space will fail.
|
||||
|
||||
Because ejection is asynchronous and can happen at any point
|
||||
during the guest VM lifecycle, proper synchronization in the
|
||||
Hyper-V virtual PCI driver is very tricky. Ejection has been
|
||||
observed even before a newly offered vPCI device has been
|
||||
fully setup. The Hyper-V virtual PCI driver has been updated
|
||||
several times over the years to fix race conditions when
|
||||
ejections happen at inopportune times. Care must be taken when
|
||||
modifying this code to prevent re-introducing such problems.
|
||||
See comments in the code.
|
||||
|
||||
Interrupt Assignment
|
||||
--------------------
|
||||
The Hyper-V virtual PCI driver supports vPCI devices using
|
||||
MSI, multi-MSI, or MSI-X. Assigning the guest vCPU that will
|
||||
receive the interrupt for a particular MSI or MSI-X message is
|
||||
complex because of the way the Linux setup of IRQs maps onto
|
||||
the Hyper-V interfaces. For the single-MSI and MSI-X cases,
|
||||
Linux calls hv_compse_msi_msg() twice, with the first call
|
||||
containing a dummy vCPU and the second call containing the
|
||||
real vCPU. Furthermore, hv_irq_unmask() is finally called
|
||||
(on x86) or the GICD registers are set (on arm64) to specify
|
||||
the real vCPU again. Each of these three calls interact
|
||||
with Hyper-V, which must decide which physical CPU should
|
||||
receive the interrupt before it is forwarded to the guest VM.
|
||||
Unfortunately, the Hyper-V decision-making process is a bit
|
||||
limited, and can result in concentrating the physical
|
||||
interrupts on a single CPU, causing a performance bottleneck.
|
||||
See details about how this is resolved in the extensive
|
||||
comment above the function hv_compose_msi_req_get_cpu().
|
||||
|
||||
The Hyper-V virtual PCI driver implements the
|
||||
irq_chip.irq_compose_msi_msg function as hv_compose_msi_msg().
|
||||
Unfortunately, on Hyper-V the implementation requires sending
|
||||
a VMBus message to the Hyper-V host and awaiting an interrupt
|
||||
indicating receipt of a reply message. Since
|
||||
irq_chip.irq_compose_msi_msg can be called with IRQ locks
|
||||
held, it doesn't work to do the normal sleep until awakened by
|
||||
the interrupt. Instead hv_compose_msi_msg() must send the
|
||||
VMBus message, and then poll for the completion message. As
|
||||
further complexity, the vPCI device could be ejected/rescinded
|
||||
while the polling is in progress, so this scenario must be
|
||||
detected as well. See comments in the code regarding this
|
||||
very tricky area.
|
||||
|
||||
Most of the code in the Hyper-V virtual PCI driver (pci-
|
||||
hyperv.c) applies to Hyper-V and Linux guests running on x86
|
||||
and on arm64 architectures. But there are differences in how
|
||||
interrupt assignments are managed. On x86, the Hyper-V
|
||||
virtual PCI driver in the guest must make a hypercall to tell
|
||||
Hyper-V which guest vCPU should be interrupted by each
|
||||
MSI/MSI-X interrupt, and the x86 interrupt vector number that
|
||||
the x86_vector IRQ domain has picked for the interrupt. This
|
||||
hypercall is made by hv_arch_irq_unmask(). On arm64, the
|
||||
Hyper-V virtual PCI driver manages the allocation of an SPI
|
||||
for each MSI/MSI-X interrupt. The Hyper-V virtual PCI driver
|
||||
stores the allocated SPI in the architectural GICD registers,
|
||||
which Hyper-V emulates, so no hypercall is necessary as with
|
||||
x86. Hyper-V does not support using LPIs for vPCI devices in
|
||||
arm64 guest VMs because it does not emulate a GICv3 ITS.
|
||||
|
||||
The Hyper-V virtual PCI driver in Linux supports vPCI devices
|
||||
whose drivers create managed or unmanaged Linux IRQs. If the
|
||||
smp_affinity for an unmanaged IRQ is updated via the /proc/irq
|
||||
interface, the Hyper-V virtual PCI driver is called to tell
|
||||
the Hyper-V host to change the interrupt targeting and
|
||||
everything works properly. However, on x86 if the x86_vector
|
||||
IRQ domain needs to reassign an interrupt vector due to
|
||||
running out of vectors on a CPU, there's no path to inform the
|
||||
Hyper-V host of the change, and things break. Fortunately,
|
||||
guest VMs operate in a constrained device environment where
|
||||
using all the vectors on a CPU doesn't happen. Since such a
|
||||
problem is only a theoretical concern rather than a practical
|
||||
concern, it has been left unaddressed.
|
||||
|
||||
DMA
|
||||
---
|
||||
By default, Hyper-V pins all guest VM memory in the host
|
||||
when the VM is created, and programs the physical IOMMU to
|
||||
allow the VM to have DMA access to all its memory. Hence
|
||||
it is safe to assign PCI devices to the VM, and allow the
|
||||
guest operating system to program the DMA transfers. The
|
||||
physical IOMMU prevents a malicious guest from initiating
|
||||
DMA to memory belonging to the host or to other VMs on the
|
||||
host. From the Linux guest standpoint, such DMA transfers
|
||||
are in "direct" mode since Hyper-V does not provide a virtual
|
||||
IOMMU in the guest.
|
||||
|
||||
Hyper-V assumes that physical PCI devices always perform
|
||||
cache-coherent DMA. When running on x86, this behavior is
|
||||
required by the architecture. When running on arm64, the
|
||||
architecture allows for both cache-coherent and
|
||||
non-cache-coherent devices, with the behavior of each device
|
||||
specified in the ACPI DSDT. But when a PCI device is assigned
|
||||
to a guest VM, that device does not appear in the DSDT, so the
|
||||
Hyper-V VMBus driver propagates cache-coherency information
|
||||
from the VMBus node in the ACPI DSDT to all VMBus devices,
|
||||
including vPCI devices (since they have a dual identity as a VMBus
|
||||
device and as a PCI device). See vmbus_dma_configure().
|
||||
Current Hyper-V versions always indicate that the VMBus is
|
||||
cache coherent, so vPCI devices on arm64 always get marked as
|
||||
cache coherent and the CPU does not perform any sync
|
||||
operations as part of dma_map/unmap_*() calls.
|
||||
|
||||
vPCI protocol versions
|
||||
----------------------
|
||||
As previously described, during vPCI device setup and teardown
|
||||
messages are passed over a VMBus channel between the Hyper-V
|
||||
host and the Hyper-v vPCI driver in the Linux guest. Some
|
||||
messages have been revised in newer versions of Hyper-V, so
|
||||
the guest and host must agree on the vPCI protocol version to
|
||||
be used. The version is negotiated when communication over
|
||||
the VMBus channel is first established. See
|
||||
hv_pci_protocol_negotiation(). Newer versions of the protocol
|
||||
extend support to VMs with more than 64 vCPUs, and provide
|
||||
additional information about the vPCI device, such as the
|
||||
guest virtual NUMA node to which it is most closely affined in
|
||||
the underlying hardware.
|
||||
|
||||
Guest NUMA node affinity
|
||||
------------------------
|
||||
When the vPCI protocol version provides it, the guest NUMA
|
||||
node affinity of the vPCI device is stored as part of the Linux
|
||||
device information for subsequent use by the Linux driver. See
|
||||
hv_pci_assign_numa_node(). If the negotiated protocol version
|
||||
does not support the host providing NUMA affinity information,
|
||||
the Linux guest defaults the device NUMA node to 0. But even
|
||||
when the negotiated protocol version includes NUMA affinity
|
||||
information, the ability of the host to provide such
|
||||
information depends on certain host configuration options. If
|
||||
the guest receives NUMA node value "0", it could mean NUMA
|
||||
node 0, or it could mean "no information is available".
|
||||
Unfortunately it is not possible to distinguish the two cases
|
||||
from the guest side.
|
||||
|
||||
PCI config space access in a CoCo VM
|
||||
------------------------------------
|
||||
Linux PCI device drivers access PCI config space using a
|
||||
standard set of functions provided by the Linux PCI subsystem.
|
||||
In Hyper-V guests these standard functions map to functions
|
||||
hv_pcifront_read_config() and hv_pcifront_write_config()
|
||||
in the Hyper-V virtual PCI driver. In normal VMs,
|
||||
these hv_pcifront_*() functions directly access the PCI config
|
||||
space, and the accesses trap to Hyper-V to be handled.
|
||||
But in CoCo VMs, memory encryption prevents Hyper-V
|
||||
from reading the guest instruction stream to emulate the
|
||||
access, so the hv_pcifront_*() functions must invoke
|
||||
hypercalls with explicit arguments describing the access to be
|
||||
made.
|
||||
|
||||
Config Block back-channel
|
||||
-------------------------
|
||||
The Hyper-V host and Hyper-V virtual PCI driver in Linux
|
||||
together implement a non-standard back-channel communication
|
||||
path between the host and guest. The back-channel path uses
|
||||
messages sent over the VMBus channel associated with the vPCI
|
||||
device. The functions hyperv_read_cfg_blk() and
|
||||
hyperv_write_cfg_blk() are the primary interfaces provided to
|
||||
other parts of the Linux kernel. As of this writing, these
|
||||
interfaces are used only by the Mellanox mlx5 driver to pass
|
||||
diagnostic data to a Hyper-V host running in the Azure public
|
||||
cloud. The functions hyperv_read_cfg_blk() and
|
||||
hyperv_write_cfg_blk() are implemented in a separate module
|
||||
(pci-hyperv-intf.c, under CONFIG_PCI_HYPERV_INTERFACE) that
|
||||
effectively stubs them out when running in non-Hyper-V
|
||||
environments.
|
||||
@ -8791,6 +8791,11 @@ means the VM type with value @n is supported. Possible values of @n are::
|
||||
#define KVM_X86_DEFAULT_VM 0
|
||||
#define KVM_X86_SW_PROTECTED_VM 1
|
||||
|
||||
Note, KVM_X86_SW_PROTECTED_VM is currently only for development and testing.
|
||||
Do not use KVM_X86_SW_PROTECTED_VM for "real" VMs, and especially not in
|
||||
production. The behavior and effective ABI for software-protected VMs is
|
||||
unstable.
|
||||
|
||||
9. Known KVM API problems
|
||||
=========================
|
||||
|
||||
|
||||
82
MAINTAINERS
82
MAINTAINERS
@ -1395,6 +1395,7 @@ F: drivers/hwmon/max31760.c
|
||||
|
||||
ANALOGBITS PLL LIBRARIES
|
||||
M: Paul Walmsley <paul.walmsley@sifive.com>
|
||||
M: Samuel Holland <samuel.holland@sifive.com>
|
||||
S: Supported
|
||||
F: drivers/clk/analogbits/*
|
||||
F: include/linux/clk/analogbits*
|
||||
@ -2156,7 +2157,7 @@ M: Shawn Guo <shawnguo@kernel.org>
|
||||
M: Sascha Hauer <s.hauer@pengutronix.de>
|
||||
R: Pengutronix Kernel Team <kernel@pengutronix.de>
|
||||
R: Fabio Estevam <festevam@gmail.com>
|
||||
R: NXP Linux Team <linux-imx@nxp.com>
|
||||
L: imx@lists.linux.dev
|
||||
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
|
||||
S: Maintained
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux.git
|
||||
@ -5379,7 +5380,7 @@ CONTROL GROUP - MEMORY RESOURCE CONTROLLER (MEMCG)
|
||||
M: Johannes Weiner <hannes@cmpxchg.org>
|
||||
M: Michal Hocko <mhocko@kernel.org>
|
||||
M: Roman Gushchin <roman.gushchin@linux.dev>
|
||||
M: Shakeel Butt <shakeelb@google.com>
|
||||
M: Shakeel Butt <shakeel.butt@linux.dev>
|
||||
R: Muchun Song <muchun.song@linux.dev>
|
||||
L: cgroups@vger.kernel.org
|
||||
L: linux-mm@kvack.org
|
||||
@ -8496,7 +8497,7 @@ FREESCALE IMX / MXC FEC DRIVER
|
||||
M: Wei Fang <wei.fang@nxp.com>
|
||||
R: Shenwei Wang <shenwei.wang@nxp.com>
|
||||
R: Clark Wang <xiaoning.wang@nxp.com>
|
||||
R: NXP Linux Team <linux-imx@nxp.com>
|
||||
L: imx@lists.linux.dev
|
||||
L: netdev@vger.kernel.org
|
||||
S: Maintained
|
||||
F: Documentation/devicetree/bindings/net/fsl,fec.yaml
|
||||
@ -8531,7 +8532,7 @@ F: drivers/i2c/busses/i2c-imx.c
|
||||
FREESCALE IMX LPI2C DRIVER
|
||||
M: Dong Aisheng <aisheng.dong@nxp.com>
|
||||
L: linux-i2c@vger.kernel.org
|
||||
L: linux-imx@nxp.com
|
||||
L: imx@lists.linux.dev
|
||||
S: Maintained
|
||||
F: Documentation/devicetree/bindings/i2c/i2c-imx-lpi2c.yaml
|
||||
F: drivers/i2c/busses/i2c-imx-lpi2c.c
|
||||
@ -10735,7 +10736,7 @@ INTEL DRM I915 DRIVER (Meteor Lake, DG2 and older excluding Poulsbo, Moorestown
|
||||
M: Jani Nikula <jani.nikula@linux.intel.com>
|
||||
M: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
|
||||
M: Rodrigo Vivi <rodrigo.vivi@intel.com>
|
||||
M: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
|
||||
M: Tvrtko Ursulin <tursulin@ursulin.net>
|
||||
L: intel-gfx@lists.freedesktop.org
|
||||
S: Supported
|
||||
W: https://drm.pages.freedesktop.org/intel-docs/
|
||||
@ -14112,6 +14113,17 @@ F: mm/
|
||||
F: tools/mm/
|
||||
F: tools/testing/selftests/mm/
|
||||
|
||||
MEMORY MAPPING
|
||||
M: Andrew Morton <akpm@linux-foundation.org>
|
||||
R: Liam R. Howlett <Liam.Howlett@oracle.com>
|
||||
R: Vlastimil Babka <vbabka@suse.cz>
|
||||
R: Lorenzo Stoakes <lstoakes@gmail.com>
|
||||
L: linux-mm@kvack.org
|
||||
S: Maintained
|
||||
W: http://www.linux-mm.org
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/akpm/mm
|
||||
F: mm/mmap.c
|
||||
|
||||
MEMORY TECHNOLOGY DEVICES (MTD)
|
||||
M: Miquel Raynal <miquel.raynal@bootlin.com>
|
||||
M: Richard Weinberger <richard@nod.at>
|
||||
@ -14370,7 +14382,7 @@ MICROCHIP MCP16502 PMIC DRIVER
|
||||
M: Claudiu Beznea <claudiu.beznea@tuxon.dev>
|
||||
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
|
||||
S: Supported
|
||||
F: Documentation/devicetree/bindings/regulator/mcp16502-regulator.txt
|
||||
F: Documentation/devicetree/bindings/regulator/microchip,mcp16502.yaml
|
||||
F: drivers/regulator/mcp16502.c
|
||||
|
||||
MICROCHIP MCP3564 ADC DRIVER
|
||||
@ -15243,6 +15255,8 @@ F: Documentation/networking/
|
||||
F: Documentation/networking/net_cachelines/
|
||||
F: Documentation/process/maintainer-netdev.rst
|
||||
F: Documentation/userspace-api/netlink/
|
||||
F: include/linux/framer/framer-provider.h
|
||||
F: include/linux/framer/framer.h
|
||||
F: include/linux/in.h
|
||||
F: include/linux/indirect_call_wrapper.h
|
||||
F: include/linux/net.h
|
||||
@ -15715,7 +15729,7 @@ F: drivers/iio/gyro/fxas21002c_spi.c
|
||||
NXP i.MX 7D/6SX/6UL/93 AND VF610 ADC DRIVER
|
||||
M: Haibo Chen <haibo.chen@nxp.com>
|
||||
L: linux-iio@vger.kernel.org
|
||||
L: linux-imx@nxp.com
|
||||
L: imx@lists.linux.dev
|
||||
S: Maintained
|
||||
F: Documentation/devicetree/bindings/iio/adc/fsl,imx7d-adc.yaml
|
||||
F: Documentation/devicetree/bindings/iio/adc/fsl,vf610-adc.yaml
|
||||
@ -15752,7 +15766,7 @@ F: drivers/gpu/drm/imx/dcss/
|
||||
NXP i.MX 8QXP ADC DRIVER
|
||||
M: Cai Huoqing <cai.huoqing@linux.dev>
|
||||
M: Haibo Chen <haibo.chen@nxp.com>
|
||||
L: linux-imx@nxp.com
|
||||
L: imx@lists.linux.dev
|
||||
L: linux-iio@vger.kernel.org
|
||||
S: Maintained
|
||||
F: Documentation/devicetree/bindings/iio/adc/nxp,imx8qxp-adc.yaml
|
||||
@ -15760,7 +15774,7 @@ F: drivers/iio/adc/imx8qxp-adc.c
|
||||
|
||||
NXP i.MX 8QXP/8QM JPEG V4L2 DRIVER
|
||||
M: Mirela Rabulea <mirela.rabulea@nxp.com>
|
||||
R: NXP Linux Team <linux-imx@nxp.com>
|
||||
L: imx@lists.linux.dev
|
||||
L: linux-media@vger.kernel.org
|
||||
S: Maintained
|
||||
F: Documentation/devicetree/bindings/media/nxp,imx8-jpeg.yaml
|
||||
@ -15770,7 +15784,7 @@ NXP i.MX CLOCK DRIVERS
|
||||
M: Abel Vesa <abelvesa@kernel.org>
|
||||
R: Peng Fan <peng.fan@nxp.com>
|
||||
L: linux-clk@vger.kernel.org
|
||||
L: linux-imx@nxp.com
|
||||
L: imx@lists.linux.dev
|
||||
S: Maintained
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/abelvesa/linux.git clk/imx
|
||||
F: Documentation/devicetree/bindings/clock/imx*
|
||||
@ -16731,6 +16745,7 @@ F: drivers/pci/controller/dwc/*layerscape*
|
||||
PCI DRIVER FOR FU740
|
||||
M: Paul Walmsley <paul.walmsley@sifive.com>
|
||||
M: Greentime Hu <greentime.hu@sifive.com>
|
||||
M: Samuel Holland <samuel.holland@sifive.com>
|
||||
L: linux-pci@vger.kernel.org
|
||||
S: Maintained
|
||||
F: Documentation/devicetree/bindings/pci/sifive,fu740-pcie.yaml
|
||||
@ -17983,33 +17998,34 @@ F: drivers/media/tuners/qt1010*
|
||||
|
||||
QUALCOMM ATH12K WIRELESS DRIVER
|
||||
M: Kalle Valo <kvalo@kernel.org>
|
||||
M: Jeff Johnson <quic_jjohnson@quicinc.com>
|
||||
M: Jeff Johnson <jjohnson@kernel.org>
|
||||
L: ath12k@lists.infradead.org
|
||||
S: Supported
|
||||
W: https://wireless.wiki.kernel.org/en/users/Drivers/ath12k
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/kvalo/ath.git
|
||||
F: drivers/net/wireless/ath/ath12k/
|
||||
N: ath12k
|
||||
|
||||
QUALCOMM ATHEROS ATH10K WIRELESS DRIVER
|
||||
M: Kalle Valo <kvalo@kernel.org>
|
||||
M: Jeff Johnson <quic_jjohnson@quicinc.com>
|
||||
M: Jeff Johnson <jjohnson@kernel.org>
|
||||
L: ath10k@lists.infradead.org
|
||||
S: Supported
|
||||
W: https://wireless.wiki.kernel.org/en/users/Drivers/ath10k
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/kvalo/ath.git
|
||||
F: Documentation/devicetree/bindings/net/wireless/qcom,ath10k.yaml
|
||||
F: drivers/net/wireless/ath/ath10k/
|
||||
N: ath10k
|
||||
|
||||
QUALCOMM ATHEROS ATH11K WIRELESS DRIVER
|
||||
M: Kalle Valo <kvalo@kernel.org>
|
||||
M: Jeff Johnson <quic_jjohnson@quicinc.com>
|
||||
M: Jeff Johnson <jjohnson@kernel.org>
|
||||
L: ath11k@lists.infradead.org
|
||||
S: Supported
|
||||
W: https://wireless.wiki.kernel.org/en/users/Drivers/ath11k
|
||||
B: https://wireless.wiki.kernel.org/en/users/Drivers/ath11k/bugreport
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/kvalo/ath.git
|
||||
F: Documentation/devicetree/bindings/net/wireless/qcom,ath11k.yaml
|
||||
F: drivers/net/wireless/ath/ath11k/
|
||||
N: ath11k
|
||||
|
||||
QUALCOMM ATHEROS ATH9K WIRELESS DRIVER
|
||||
M: Toke Høiland-Jørgensen <toke@toke.dk>
|
||||
@ -19640,7 +19656,7 @@ F: drivers/mmc/host/sdhci-of-at91.c
|
||||
|
||||
SECURE DIGITAL HOST CONTROLLER INTERFACE (SDHCI) NXP i.MX DRIVER
|
||||
M: Haibo Chen <haibo.chen@nxp.com>
|
||||
L: linux-imx@nxp.com
|
||||
L: imx@lists.linux.dev
|
||||
L: linux-mmc@vger.kernel.org
|
||||
S: Maintained
|
||||
F: drivers/mmc/host/sdhci-esdhc-imx.c
|
||||
@ -19975,35 +19991,14 @@ S: Maintained
|
||||
F: drivers/watchdog/simatic-ipc-wdt.c
|
||||
|
||||
SIFIVE DRIVERS
|
||||
M: Palmer Dabbelt <palmer@dabbelt.com>
|
||||
M: Paul Walmsley <paul.walmsley@sifive.com>
|
||||
M: Samuel Holland <samuel.holland@sifive.com>
|
||||
L: linux-riscv@lists.infradead.org
|
||||
S: Supported
|
||||
N: sifive
|
||||
K: [^@]sifive
|
||||
|
||||
SIFIVE CACHE DRIVER
|
||||
M: Conor Dooley <conor@kernel.org>
|
||||
L: linux-riscv@lists.infradead.org
|
||||
S: Maintained
|
||||
F: Documentation/devicetree/bindings/cache/sifive,ccache0.yaml
|
||||
F: drivers/cache/sifive_ccache.c
|
||||
|
||||
SIFIVE FU540 SYSTEM-ON-CHIP
|
||||
M: Paul Walmsley <paul.walmsley@sifive.com>
|
||||
M: Palmer Dabbelt <palmer@dabbelt.com>
|
||||
L: linux-riscv@lists.infradead.org
|
||||
S: Supported
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/pjw/sifive.git
|
||||
N: fu540
|
||||
K: fu540
|
||||
|
||||
SIFIVE PDMA DRIVER
|
||||
M: Green Wan <green.wan@sifive.com>
|
||||
S: Maintained
|
||||
F: Documentation/devicetree/bindings/dma/sifive,fu540-c000-pdma.yaml
|
||||
F: drivers/dma/sf-pdma/
|
||||
|
||||
N: sifive
|
||||
K: fu[57]40
|
||||
K: [^@]sifive
|
||||
|
||||
SILEAD TOUCHSCREEN DRIVER
|
||||
M: Hans de Goede <hdegoede@redhat.com>
|
||||
@ -20213,8 +20208,8 @@ F: Documentation/devicetree/bindings/net/socionext,uniphier-ave4.yaml
|
||||
F: drivers/net/ethernet/socionext/sni_ave.c
|
||||
|
||||
SOCIONEXT (SNI) NETSEC NETWORK DRIVER
|
||||
M: Jassi Brar <jaswinder.singh@linaro.org>
|
||||
M: Ilias Apalodimas <ilias.apalodimas@linaro.org>
|
||||
M: Masahisa Kojima <kojima.masahisa@socionext.com>
|
||||
L: netdev@vger.kernel.org
|
||||
S: Maintained
|
||||
F: Documentation/devicetree/bindings/net/socionext,synquacer-netsec.yaml
|
||||
@ -22885,9 +22880,8 @@ S: Maintained
|
||||
F: drivers/usb/typec/mux/pi3usb30532.c
|
||||
|
||||
USB TYPEC PORT CONTROLLER DRIVERS
|
||||
M: Guenter Roeck <linux@roeck-us.net>
|
||||
L: linux-usb@vger.kernel.org
|
||||
S: Maintained
|
||||
S: Orphan
|
||||
F: drivers/usb/typec/tcpm/
|
||||
|
||||
USB UHCI DRIVER
|
||||
|
||||
2
Makefile
2
Makefile
@ -2,7 +2,7 @@
|
||||
VERSION = 6
|
||||
PATCHLEVEL = 8
|
||||
SUBLEVEL = 0
|
||||
EXTRAVERSION = -rc5
|
||||
EXTRAVERSION =
|
||||
NAME = Hurr durr I'ma ninja sloth
|
||||
|
||||
# *DOCUMENTATION*
|
||||
|
||||
@ -167,7 +167,6 @@ pcie@fbc00000 {
|
||||
msix: msix@fbe00000 {
|
||||
compatible = "al,alpine-msix";
|
||||
reg = <0x0 0xfbe00000 0x0 0x100000>;
|
||||
interrupt-controller;
|
||||
msi-controller;
|
||||
al,msi-base-spi = <96>;
|
||||
al,msi-num-spis = <64>;
|
||||
|
||||
@ -466,7 +466,6 @@ i2c_ic: interrupt-controller@0 {
|
||||
i2c0: i2c-bus@40 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
#interrupt-cells = <1>;
|
||||
|
||||
reg = <0x40 0x40>;
|
||||
compatible = "aspeed,ast2400-i2c-bus";
|
||||
@ -482,7 +481,6 @@ i2c0: i2c-bus@40 {
|
||||
i2c1: i2c-bus@80 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
#interrupt-cells = <1>;
|
||||
|
||||
reg = <0x80 0x40>;
|
||||
compatible = "aspeed,ast2400-i2c-bus";
|
||||
@ -498,7 +496,6 @@ i2c1: i2c-bus@80 {
|
||||
i2c2: i2c-bus@c0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
#interrupt-cells = <1>;
|
||||
|
||||
reg = <0xc0 0x40>;
|
||||
compatible = "aspeed,ast2400-i2c-bus";
|
||||
@ -515,7 +512,6 @@ i2c2: i2c-bus@c0 {
|
||||
i2c3: i2c-bus@100 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
#interrupt-cells = <1>;
|
||||
|
||||
reg = <0x100 0x40>;
|
||||
compatible = "aspeed,ast2400-i2c-bus";
|
||||
@ -532,7 +528,6 @@ i2c3: i2c-bus@100 {
|
||||
i2c4: i2c-bus@140 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
#interrupt-cells = <1>;
|
||||
|
||||
reg = <0x140 0x40>;
|
||||
compatible = "aspeed,ast2400-i2c-bus";
|
||||
@ -549,7 +544,6 @@ i2c4: i2c-bus@140 {
|
||||
i2c5: i2c-bus@180 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
#interrupt-cells = <1>;
|
||||
|
||||
reg = <0x180 0x40>;
|
||||
compatible = "aspeed,ast2400-i2c-bus";
|
||||
@ -566,7 +560,6 @@ i2c5: i2c-bus@180 {
|
||||
i2c6: i2c-bus@1c0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
#interrupt-cells = <1>;
|
||||
|
||||
reg = <0x1c0 0x40>;
|
||||
compatible = "aspeed,ast2400-i2c-bus";
|
||||
@ -583,7 +576,6 @@ i2c6: i2c-bus@1c0 {
|
||||
i2c7: i2c-bus@300 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
#interrupt-cells = <1>;
|
||||
|
||||
reg = <0x300 0x40>;
|
||||
compatible = "aspeed,ast2400-i2c-bus";
|
||||
@ -600,7 +592,6 @@ i2c7: i2c-bus@300 {
|
||||
i2c8: i2c-bus@340 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
#interrupt-cells = <1>;
|
||||
|
||||
reg = <0x340 0x40>;
|
||||
compatible = "aspeed,ast2400-i2c-bus";
|
||||
@ -617,7 +608,6 @@ i2c8: i2c-bus@340 {
|
||||
i2c9: i2c-bus@380 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
#interrupt-cells = <1>;
|
||||
|
||||
reg = <0x380 0x40>;
|
||||
compatible = "aspeed,ast2400-i2c-bus";
|
||||
@ -634,7 +624,6 @@ i2c9: i2c-bus@380 {
|
||||
i2c10: i2c-bus@3c0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
#interrupt-cells = <1>;
|
||||
|
||||
reg = <0x3c0 0x40>;
|
||||
compatible = "aspeed,ast2400-i2c-bus";
|
||||
@ -651,7 +640,6 @@ i2c10: i2c-bus@3c0 {
|
||||
i2c11: i2c-bus@400 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
#interrupt-cells = <1>;
|
||||
|
||||
reg = <0x400 0x40>;
|
||||
compatible = "aspeed,ast2400-i2c-bus";
|
||||
@ -668,7 +656,6 @@ i2c11: i2c-bus@400 {
|
||||
i2c12: i2c-bus@440 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
#interrupt-cells = <1>;
|
||||
|
||||
reg = <0x440 0x40>;
|
||||
compatible = "aspeed,ast2400-i2c-bus";
|
||||
@ -685,7 +672,6 @@ i2c12: i2c-bus@440 {
|
||||
i2c13: i2c-bus@480 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
#interrupt-cells = <1>;
|
||||
|
||||
reg = <0x480 0x40>;
|
||||
compatible = "aspeed,ast2400-i2c-bus";
|
||||
|
||||
@ -363,6 +363,7 @@ sgpio: sgpio@1e780200 {
|
||||
interrupts = <40>;
|
||||
reg = <0x1e780200 0x0100>;
|
||||
clocks = <&syscon ASPEED_CLK_APB>;
|
||||
#interrupt-cells = <2>;
|
||||
interrupt-controller;
|
||||
bus-frequency = <12000000>;
|
||||
pinctrl-names = "default";
|
||||
@ -594,7 +595,6 @@ i2c_ic: interrupt-controller@0 {
|
||||
i2c0: i2c-bus@40 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
#interrupt-cells = <1>;
|
||||
|
||||
reg = <0x40 0x40>;
|
||||
compatible = "aspeed,ast2500-i2c-bus";
|
||||
@ -610,7 +610,6 @@ i2c0: i2c-bus@40 {
|
||||
i2c1: i2c-bus@80 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
#interrupt-cells = <1>;
|
||||
|
||||
reg = <0x80 0x40>;
|
||||
compatible = "aspeed,ast2500-i2c-bus";
|
||||
@ -626,7 +625,6 @@ i2c1: i2c-bus@80 {
|
||||
i2c2: i2c-bus@c0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
#interrupt-cells = <1>;
|
||||
|
||||
reg = <0xc0 0x40>;
|
||||
compatible = "aspeed,ast2500-i2c-bus";
|
||||
@ -643,7 +641,6 @@ i2c2: i2c-bus@c0 {
|
||||
i2c3: i2c-bus@100 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
#interrupt-cells = <1>;
|
||||
|
||||
reg = <0x100 0x40>;
|
||||
compatible = "aspeed,ast2500-i2c-bus";
|
||||
@ -660,7 +657,6 @@ i2c3: i2c-bus@100 {
|
||||
i2c4: i2c-bus@140 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
#interrupt-cells = <1>;
|
||||
|
||||
reg = <0x140 0x40>;
|
||||
compatible = "aspeed,ast2500-i2c-bus";
|
||||
@ -677,7 +673,6 @@ i2c4: i2c-bus@140 {
|
||||
i2c5: i2c-bus@180 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
#interrupt-cells = <1>;
|
||||
|
||||
reg = <0x180 0x40>;
|
||||
compatible = "aspeed,ast2500-i2c-bus";
|
||||
@ -694,7 +689,6 @@ i2c5: i2c-bus@180 {
|
||||
i2c6: i2c-bus@1c0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
#interrupt-cells = <1>;
|
||||
|
||||
reg = <0x1c0 0x40>;
|
||||
compatible = "aspeed,ast2500-i2c-bus";
|
||||
@ -711,7 +705,6 @@ i2c6: i2c-bus@1c0 {
|
||||
i2c7: i2c-bus@300 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
#interrupt-cells = <1>;
|
||||
|
||||
reg = <0x300 0x40>;
|
||||
compatible = "aspeed,ast2500-i2c-bus";
|
||||
@ -728,7 +721,6 @@ i2c7: i2c-bus@300 {
|
||||
i2c8: i2c-bus@340 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
#interrupt-cells = <1>;
|
||||
|
||||
reg = <0x340 0x40>;
|
||||
compatible = "aspeed,ast2500-i2c-bus";
|
||||
@ -745,7 +737,6 @@ i2c8: i2c-bus@340 {
|
||||
i2c9: i2c-bus@380 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
#interrupt-cells = <1>;
|
||||
|
||||
reg = <0x380 0x40>;
|
||||
compatible = "aspeed,ast2500-i2c-bus";
|
||||
@ -762,7 +753,6 @@ i2c9: i2c-bus@380 {
|
||||
i2c10: i2c-bus@3c0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
#interrupt-cells = <1>;
|
||||
|
||||
reg = <0x3c0 0x40>;
|
||||
compatible = "aspeed,ast2500-i2c-bus";
|
||||
@ -779,7 +769,6 @@ i2c10: i2c-bus@3c0 {
|
||||
i2c11: i2c-bus@400 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
#interrupt-cells = <1>;
|
||||
|
||||
reg = <0x400 0x40>;
|
||||
compatible = "aspeed,ast2500-i2c-bus";
|
||||
@ -796,7 +785,6 @@ i2c11: i2c-bus@400 {
|
||||
i2c12: i2c-bus@440 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
#interrupt-cells = <1>;
|
||||
|
||||
reg = <0x440 0x40>;
|
||||
compatible = "aspeed,ast2500-i2c-bus";
|
||||
@ -813,7 +801,6 @@ i2c12: i2c-bus@440 {
|
||||
i2c13: i2c-bus@480 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
#interrupt-cells = <1>;
|
||||
|
||||
reg = <0x480 0x40>;
|
||||
compatible = "aspeed,ast2500-i2c-bus";
|
||||
|
||||
@ -474,6 +474,7 @@ sgpiom0: sgpiom@1e780500 {
|
||||
reg = <0x1e780500 0x100>;
|
||||
interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&syscon ASPEED_CLK_APB2>;
|
||||
#interrupt-cells = <2>;
|
||||
interrupt-controller;
|
||||
bus-frequency = <12000000>;
|
||||
pinctrl-names = "default";
|
||||
@ -488,6 +489,7 @@ sgpiom1: sgpiom@1e780600 {
|
||||
reg = <0x1e780600 0x100>;
|
||||
interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&syscon ASPEED_CLK_APB2>;
|
||||
#interrupt-cells = <2>;
|
||||
interrupt-controller;
|
||||
bus-frequency = <12000000>;
|
||||
pinctrl-names = "default";
|
||||
@ -902,7 +904,6 @@ &i2c {
|
||||
i2c0: i2c-bus@80 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
#interrupt-cells = <1>;
|
||||
reg = <0x80 0x80>;
|
||||
compatible = "aspeed,ast2600-i2c-bus";
|
||||
clocks = <&syscon ASPEED_CLK_APB2>;
|
||||
@ -917,7 +918,6 @@ i2c0: i2c-bus@80 {
|
||||
i2c1: i2c-bus@100 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
#interrupt-cells = <1>;
|
||||
reg = <0x100 0x80>;
|
||||
compatible = "aspeed,ast2600-i2c-bus";
|
||||
clocks = <&syscon ASPEED_CLK_APB2>;
|
||||
@ -932,7 +932,6 @@ i2c1: i2c-bus@100 {
|
||||
i2c2: i2c-bus@180 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
#interrupt-cells = <1>;
|
||||
reg = <0x180 0x80>;
|
||||
compatible = "aspeed,ast2600-i2c-bus";
|
||||
clocks = <&syscon ASPEED_CLK_APB2>;
|
||||
@ -947,7 +946,6 @@ i2c2: i2c-bus@180 {
|
||||
i2c3: i2c-bus@200 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
#interrupt-cells = <1>;
|
||||
reg = <0x200 0x80>;
|
||||
compatible = "aspeed,ast2600-i2c-bus";
|
||||
clocks = <&syscon ASPEED_CLK_APB2>;
|
||||
@ -962,7 +960,6 @@ i2c3: i2c-bus@200 {
|
||||
i2c4: i2c-bus@280 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
#interrupt-cells = <1>;
|
||||
reg = <0x280 0x80>;
|
||||
compatible = "aspeed,ast2600-i2c-bus";
|
||||
clocks = <&syscon ASPEED_CLK_APB2>;
|
||||
@ -977,7 +974,6 @@ i2c4: i2c-bus@280 {
|
||||
i2c5: i2c-bus@300 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
#interrupt-cells = <1>;
|
||||
reg = <0x300 0x80>;
|
||||
compatible = "aspeed,ast2600-i2c-bus";
|
||||
clocks = <&syscon ASPEED_CLK_APB2>;
|
||||
@ -992,7 +988,6 @@ i2c5: i2c-bus@300 {
|
||||
i2c6: i2c-bus@380 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
#interrupt-cells = <1>;
|
||||
reg = <0x380 0x80>;
|
||||
compatible = "aspeed,ast2600-i2c-bus";
|
||||
clocks = <&syscon ASPEED_CLK_APB2>;
|
||||
@ -1007,7 +1002,6 @@ i2c6: i2c-bus@380 {
|
||||
i2c7: i2c-bus@400 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
#interrupt-cells = <1>;
|
||||
reg = <0x400 0x80>;
|
||||
compatible = "aspeed,ast2600-i2c-bus";
|
||||
clocks = <&syscon ASPEED_CLK_APB2>;
|
||||
@ -1022,7 +1016,6 @@ i2c7: i2c-bus@400 {
|
||||
i2c8: i2c-bus@480 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
#interrupt-cells = <1>;
|
||||
reg = <0x480 0x80>;
|
||||
compatible = "aspeed,ast2600-i2c-bus";
|
||||
clocks = <&syscon ASPEED_CLK_APB2>;
|
||||
@ -1037,7 +1030,6 @@ i2c8: i2c-bus@480 {
|
||||
i2c9: i2c-bus@500 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
#interrupt-cells = <1>;
|
||||
reg = <0x500 0x80>;
|
||||
compatible = "aspeed,ast2600-i2c-bus";
|
||||
clocks = <&syscon ASPEED_CLK_APB2>;
|
||||
@ -1052,7 +1044,6 @@ i2c9: i2c-bus@500 {
|
||||
i2c10: i2c-bus@580 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
#interrupt-cells = <1>;
|
||||
reg = <0x580 0x80>;
|
||||
compatible = "aspeed,ast2600-i2c-bus";
|
||||
clocks = <&syscon ASPEED_CLK_APB2>;
|
||||
@ -1067,7 +1058,6 @@ i2c10: i2c-bus@580 {
|
||||
i2c11: i2c-bus@600 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
#interrupt-cells = <1>;
|
||||
reg = <0x600 0x80>;
|
||||
compatible = "aspeed,ast2600-i2c-bus";
|
||||
clocks = <&syscon ASPEED_CLK_APB2>;
|
||||
@ -1082,7 +1072,6 @@ i2c11: i2c-bus@600 {
|
||||
i2c12: i2c-bus@680 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
#interrupt-cells = <1>;
|
||||
reg = <0x680 0x80>;
|
||||
compatible = "aspeed,ast2600-i2c-bus";
|
||||
clocks = <&syscon ASPEED_CLK_APB2>;
|
||||
@ -1097,7 +1086,6 @@ i2c12: i2c-bus@680 {
|
||||
i2c13: i2c-bus@700 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
#interrupt-cells = <1>;
|
||||
reg = <0x700 0x80>;
|
||||
compatible = "aspeed,ast2600-i2c-bus";
|
||||
clocks = <&syscon ASPEED_CLK_APB2>;
|
||||
@ -1112,7 +1100,6 @@ i2c13: i2c-bus@700 {
|
||||
i2c14: i2c-bus@780 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
#interrupt-cells = <1>;
|
||||
reg = <0x780 0x80>;
|
||||
compatible = "aspeed,ast2600-i2c-bus";
|
||||
clocks = <&syscon ASPEED_CLK_APB2>;
|
||||
@ -1127,7 +1114,6 @@ i2c14: i2c-bus@780 {
|
||||
i2c15: i2c-bus@800 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
#interrupt-cells = <1>;
|
||||
reg = <0x800 0x80>;
|
||||
compatible = "aspeed,ast2600-i2c-bus";
|
||||
clocks = <&syscon ASPEED_CLK_APB2>;
|
||||
|
||||
@ -167,6 +167,7 @@ gpio_crmu: gpio@3024800 {
|
||||
#gpio-cells = <2>;
|
||||
gpio-controller;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
interrupt-parent = <&mailbox>;
|
||||
interrupts = <0>;
|
||||
};
|
||||
@ -247,6 +248,7 @@ gpio_ccm: gpio@1800a000 {
|
||||
gpio-controller;
|
||||
interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
};
|
||||
|
||||
i2c1: i2c@1800b000 {
|
||||
@ -518,6 +520,7 @@ gpio_asiu: gpio@180a5000 {
|
||||
gpio-controller;
|
||||
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
|
||||
gpio-ranges = <&pinctrl 0 42 1>,
|
||||
<&pinctrl 1 44 3>,
|
||||
|
||||
@ -200,6 +200,7 @@ gpiob: gpio@30000 {
|
||||
gpio-controller;
|
||||
ngpios = <4>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
|
||||
};
|
||||
|
||||
|
||||
@ -180,6 +180,7 @@ gpioa: gpio@20 {
|
||||
gpio-controller;
|
||||
ngpios = <32>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
|
||||
gpio-ranges = <&pinctrl 0 0 32>;
|
||||
};
|
||||
@ -352,6 +353,7 @@ gpiob: gpio@30000 {
|
||||
gpio-controller;
|
||||
ngpios = <4>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
|
||||
};
|
||||
|
||||
|
||||
@ -60,6 +60,8 @@ pci@c0000000 {
|
||||
* We have slots (IDSEL) 1 and 2 with one assigned IRQ
|
||||
* each handling all IRQs.
|
||||
*/
|
||||
#interrupt-cells = <1>;
|
||||
interrupt-map-mask = <0xf800 0 0 7>;
|
||||
interrupt-map =
|
||||
/* IDSEL 1 */
|
||||
<0x0800 0 0 1 &gpio0 11 IRQ_TYPE_LEVEL_LOW>, /* INT A on slot 1 is irq 11 */
|
||||
|
||||
@ -89,6 +89,8 @@ pci@c0000000 {
|
||||
* The slots have Ethernet, Ethernet, NEC and MPCI.
|
||||
* The IDSELs are 11, 12, 13, 14.
|
||||
*/
|
||||
#interrupt-cells = <1>;
|
||||
interrupt-map-mask = <0xf800 0 0 7>;
|
||||
interrupt-map =
|
||||
/* IDSEL 11 - Ethernet A */
|
||||
<0x5800 0 0 1 &gpio0 4 IRQ_TYPE_LEVEL_LOW>, /* INT A on slot 11 is irq 4 */
|
||||
|
||||
@ -65,6 +65,7 @@ i2c@11000 {
|
||||
gpio2: gpio-expander@20 {
|
||||
#gpio-cells = <2>;
|
||||
#interrupt-cells = <2>;
|
||||
interrupt-controller;
|
||||
compatible = "semtech,sx1505q";
|
||||
reg = <0x20>;
|
||||
|
||||
@ -79,6 +80,7 @@ gpio2: gpio-expander@20 {
|
||||
gpio3: gpio-expander@21 {
|
||||
#gpio-cells = <2>;
|
||||
#interrupt-cells = <2>;
|
||||
interrupt-controller;
|
||||
compatible = "semtech,sx1505q";
|
||||
reg = <0x21>;
|
||||
|
||||
|
||||
@ -120,6 +120,7 @@ gpio0: gpio@0 {
|
||||
interrupts = <2 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<3 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<4 IRQ_TYPE_LEVEL_HIGH>;
|
||||
#interrupt-cells = <2>;
|
||||
interrupt-controller;
|
||||
};
|
||||
|
||||
@ -128,6 +129,7 @@ gpio1: gpio@1 {
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupts = <5 IRQ_TYPE_LEVEL_HIGH>;
|
||||
#interrupt-cells = <2>;
|
||||
interrupt-controller;
|
||||
};
|
||||
|
||||
|
||||
@ -997,7 +997,6 @@ touchscreen@41 {
|
||||
compatible = "st,stmpe811";
|
||||
reg = <0x41>;
|
||||
irq-gpio = <&gpio TEGRA_GPIO(V, 0) GPIO_ACTIVE_LOW>;
|
||||
interrupt-controller;
|
||||
id = <0>;
|
||||
blocks = <0x5>;
|
||||
irq-trigger = <0x1>;
|
||||
|
||||
@ -980,7 +980,6 @@ touchscreen@41 {
|
||||
compatible = "st,stmpe811";
|
||||
reg = <0x41>;
|
||||
irq-gpio = <&gpio TEGRA_GPIO(V, 0) GPIO_ACTIVE_LOW>;
|
||||
interrupt-controller;
|
||||
id = <0>;
|
||||
blocks = <0x5>;
|
||||
irq-trigger = <0x1>;
|
||||
|
||||
@ -861,7 +861,6 @@ touchscreen@41 {
|
||||
compatible = "st,stmpe811";
|
||||
reg = <0x41>;
|
||||
irq-gpio = <&gpio TEGRA_GPIO(V, 0) GPIO_ACTIVE_LOW>;
|
||||
interrupt-controller;
|
||||
id = <0>;
|
||||
blocks = <0x5>;
|
||||
irq-trigger = <0x1>;
|
||||
|
||||
@ -227,7 +227,6 @@ bridge@1,0 {
|
||||
|
||||
#address-cells = <3>;
|
||||
#size-cells = <2>;
|
||||
#interrupt-cells = <1>;
|
||||
|
||||
bridge@2,1 {
|
||||
compatible = "pci10b5,8605";
|
||||
@ -235,7 +234,6 @@ bridge@2,1 {
|
||||
|
||||
#address-cells = <3>;
|
||||
#size-cells = <2>;
|
||||
#interrupt-cells = <1>;
|
||||
|
||||
/* Intel Corporation I210 Gigabit Network Connection */
|
||||
ethernet@3,0 {
|
||||
@ -250,7 +248,6 @@ bridge@2,2 {
|
||||
|
||||
#address-cells = <3>;
|
||||
#size-cells = <2>;
|
||||
#interrupt-cells = <1>;
|
||||
|
||||
/* Intel Corporation I210 Gigabit Network Connection */
|
||||
switch_nic: ethernet@4,0 {
|
||||
|
||||
@ -245,6 +245,7 @@ pca9539: pca9539@74 {
|
||||
reg = <0x74>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
#interrupt-cells = <2>;
|
||||
interrupt-controller;
|
||||
interrupt-parent = <&gpio2>;
|
||||
interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
|
||||
@ -390,7 +391,6 @@ pci_root: root@0,0 {
|
||||
|
||||
#address-cells = <3>;
|
||||
#size-cells = <2>;
|
||||
#interrupt-cells = <1>;
|
||||
};
|
||||
};
|
||||
|
||||
|
||||
@ -626,7 +626,6 @@ stmpe811@41 {
|
||||
blocks = <0x5>;
|
||||
id = <0>;
|
||||
interrupts = <10 IRQ_TYPE_LEVEL_LOW>;
|
||||
interrupt-controller;
|
||||
interrupt-parent = <&gpio4>;
|
||||
irq-trigger = <0x1>;
|
||||
pinctrl-names = "default";
|
||||
|
||||
@ -550,7 +550,6 @@ stmpe811@41 {
|
||||
blocks = <0x5>;
|
||||
interrupts = <20 IRQ_TYPE_LEVEL_LOW>;
|
||||
interrupt-parent = <&gpio6>;
|
||||
interrupt-controller;
|
||||
id = <0>;
|
||||
irq-trigger = <0x1>;
|
||||
pinctrl-names = "default";
|
||||
|
||||
@ -225,7 +225,6 @@ da9063: pmic@58 {
|
||||
pinctrl-0 = <&pinctrl_pmic>;
|
||||
interrupt-parent = <&gpio2>;
|
||||
interrupts = <8 IRQ_TYPE_LEVEL_LOW>;
|
||||
interrupt-controller;
|
||||
|
||||
onkey {
|
||||
compatible = "dlg,da9063-onkey";
|
||||
|
||||
@ -124,6 +124,7 @@ pmic@58 {
|
||||
reg = <0x58>;
|
||||
interrupt-parent = <&gpio2>;
|
||||
interrupts = <9 IRQ_TYPE_LEVEL_LOW>; /* active-low GPIO2_9 */
|
||||
#interrupt-cells = <2>;
|
||||
interrupt-controller;
|
||||
|
||||
regulators {
|
||||
|
||||
@ -100,6 +100,7 @@ pmic: pmic@58 {
|
||||
interrupt-parent = <&gpio1>;
|
||||
interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
|
||||
|
||||
@ -63,6 +63,7 @@ pca9554: io-expander@25 {
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
#interrupt-cells = <2>;
|
||||
interrupt-controller;
|
||||
reg = <0x25>;
|
||||
};
|
||||
|
||||
|
||||
@ -834,16 +834,6 @@ lcdif: lcdif@30730000 {
|
||||
<&clks IMX7D_LCDIF_PIXEL_ROOT_CLK>;
|
||||
clock-names = "pix", "axi";
|
||||
status = "disabled";
|
||||
|
||||
port {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
lcdif_out_mipi_dsi: endpoint@0 {
|
||||
reg = <0>;
|
||||
remote-endpoint = <&mipi_dsi_in_lcdif>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
mipi_csi: mipi-csi@30750000 {
|
||||
@ -895,22 +885,6 @@ mipi_dsi: dsi@30760000 {
|
||||
samsung,esc-clock-frequency = <20000000>;
|
||||
samsung,pll-clock-frequency = <24000000>;
|
||||
status = "disabled";
|
||||
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
port@0 {
|
||||
reg = <0>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
mipi_dsi_in_lcdif: endpoint@0 {
|
||||
reg = <0>;
|
||||
remote-endpoint = <&lcdif_out_mipi_dsi>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
|
||||
@ -338,6 +338,7 @@ gpio6: io-expander@22 {
|
||||
reg = <0x22>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
#interrupt-cells = <2>;
|
||||
interrupt-controller;
|
||||
interrupt-parent = <&gpio3>;
|
||||
interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
|
||||
|
||||
@ -340,10 +340,10 @@ pcie_rc: pcie@1c00000 {
|
||||
"msi8";
|
||||
#interrupt-cells = <1>;
|
||||
interrupt-map-mask = <0 0 0 0x7>;
|
||||
interrupt-map = <0 0 0 1 &intc 0 0 0 141 IRQ_TYPE_LEVEL_HIGH>, /* int_a */
|
||||
<0 0 0 2 &intc 0 0 0 142 IRQ_TYPE_LEVEL_HIGH>, /* int_b */
|
||||
<0 0 0 3 &intc 0 0 0 143 IRQ_TYPE_LEVEL_HIGH>, /* int_c */
|
||||
<0 0 0 4 &intc 0 0 0 144 IRQ_TYPE_LEVEL_HIGH>; /* int_d */
|
||||
interrupt-map = <0 0 0 1 &intc 0 141 IRQ_TYPE_LEVEL_HIGH>, /* int_a */
|
||||
<0 0 0 2 &intc 0 142 IRQ_TYPE_LEVEL_HIGH>, /* int_b */
|
||||
<0 0 0 3 &intc 0 143 IRQ_TYPE_LEVEL_HIGH>, /* int_c */
|
||||
<0 0 0 4 &intc 0 144 IRQ_TYPE_LEVEL_HIGH>; /* int_d */
|
||||
|
||||
clocks = <&gcc GCC_PCIE_PIPE_CLK>,
|
||||
<&gcc GCC_PCIE_AUX_CLK>,
|
||||
|
||||
@ -447,6 +447,7 @@ pmic@58 {
|
||||
interrupt-parent = <&irqc0>;
|
||||
interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
|
||||
rtc {
|
||||
compatible = "dlg,da9063-rtc";
|
||||
|
||||
@ -347,6 +347,7 @@ pmic@58 {
|
||||
interrupt-parent = <&irqc0>;
|
||||
interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
|
||||
onkey {
|
||||
compatible = "dlg,da9063-onkey";
|
||||
|
||||
@ -819,6 +819,7 @@ pmic@58 {
|
||||
interrupt-parent = <&irqc0>;
|
||||
interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
|
||||
rtc {
|
||||
compatible = "dlg,da9063-rtc";
|
||||
|
||||
@ -413,6 +413,7 @@ pmic@5a {
|
||||
interrupt-parent = <&irqc0>;
|
||||
interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
|
||||
watchdog {
|
||||
compatible = "dlg,da9063-watchdog";
|
||||
|
||||
@ -381,6 +381,7 @@ pmic@58 {
|
||||
interrupt-parent = <&irqc>;
|
||||
interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
|
||||
rtc {
|
||||
compatible = "dlg,da9063-rtc";
|
||||
|
||||
@ -759,6 +759,7 @@ pmic@58 {
|
||||
interrupt-parent = <&irqc0>;
|
||||
interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
|
||||
rtc {
|
||||
compatible = "dlg,da9063-rtc";
|
||||
|
||||
@ -453,6 +453,7 @@ pmic@58 {
|
||||
interrupt-parent = <&gpio3>;
|
||||
interrupts = <31 IRQ_TYPE_LEVEL_LOW>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
|
||||
rtc {
|
||||
compatible = "dlg,da9063-rtc";
|
||||
|
||||
@ -439,6 +439,7 @@ pmic@58 {
|
||||
interrupt-parent = <&gpio3>;
|
||||
interrupts = <31 IRQ_TYPE_LEVEL_LOW>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
|
||||
onkey {
|
||||
compatible = "dlg,da9063-onkey";
|
||||
|
||||
@ -196,7 +196,6 @@ spi: spi@10270000 {
|
||||
pwm4: pwm@10280000 {
|
||||
compatible = "rockchip,rv1108-pwm", "rockchip,rk3288-pwm";
|
||||
reg = <0x10280000 0x10>;
|
||||
interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cru SCLK_PWM>, <&cru PCLK_PWM>;
|
||||
clock-names = "pwm", "pclk";
|
||||
pinctrl-names = "default";
|
||||
@ -208,7 +207,6 @@ pwm4: pwm@10280000 {
|
||||
pwm5: pwm@10280010 {
|
||||
compatible = "rockchip,rv1108-pwm", "rockchip,rk3288-pwm";
|
||||
reg = <0x10280010 0x10>;
|
||||
interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cru SCLK_PWM>, <&cru PCLK_PWM>;
|
||||
clock-names = "pwm", "pclk";
|
||||
pinctrl-names = "default";
|
||||
@ -220,7 +218,6 @@ pwm5: pwm@10280010 {
|
||||
pwm6: pwm@10280020 {
|
||||
compatible = "rockchip,rv1108-pwm", "rockchip,rk3288-pwm";
|
||||
reg = <0x10280020 0x10>;
|
||||
interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cru SCLK_PWM>, <&cru PCLK_PWM>;
|
||||
clock-names = "pwm", "pclk";
|
||||
pinctrl-names = "default";
|
||||
@ -232,7 +229,6 @@ pwm6: pwm@10280020 {
|
||||
pwm7: pwm@10280030 {
|
||||
compatible = "rockchip,rv1108-pwm", "rockchip,rk3288-pwm";
|
||||
reg = <0x10280030 0x10>;
|
||||
interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cru SCLK_PWM>, <&cru PCLK_PWM>;
|
||||
clock-names = "pwm", "pclk";
|
||||
pinctrl-names = "default";
|
||||
@ -386,7 +382,6 @@ i2c0: i2c@20000000 {
|
||||
pwm0: pwm@20040000 {
|
||||
compatible = "rockchip,rv1108-pwm", "rockchip,rk3288-pwm";
|
||||
reg = <0x20040000 0x10>;
|
||||
interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cru SCLK_PWM0_PMU>, <&cru PCLK_PWM0_PMU>;
|
||||
clock-names = "pwm", "pclk";
|
||||
pinctrl-names = "default";
|
||||
@ -398,7 +393,6 @@ pwm0: pwm@20040000 {
|
||||
pwm1: pwm@20040010 {
|
||||
compatible = "rockchip,rv1108-pwm", "rockchip,rk3288-pwm";
|
||||
reg = <0x20040010 0x10>;
|
||||
interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cru SCLK_PWM0_PMU>, <&cru PCLK_PWM0_PMU>;
|
||||
clock-names = "pwm", "pclk";
|
||||
pinctrl-names = "default";
|
||||
@ -410,7 +404,6 @@ pwm1: pwm@20040010 {
|
||||
pwm2: pwm@20040020 {
|
||||
compatible = "rockchip,rv1108-pwm", "rockchip,rk3288-pwm";
|
||||
reg = <0x20040020 0x10>;
|
||||
interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cru SCLK_PWM0_PMU>, <&cru PCLK_PWM0_PMU>;
|
||||
clock-names = "pwm", "pclk";
|
||||
pinctrl-names = "default";
|
||||
@ -422,7 +415,6 @@ pwm2: pwm@20040020 {
|
||||
pwm3: pwm@20040030 {
|
||||
compatible = "rockchip,rv1108-pwm", "rockchip,rk3288-pwm";
|
||||
reg = <0x20040030 0x10>;
|
||||
interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cru SCLK_PWM0_PMU>, <&cru PCLK_PWM0_PMU>;
|
||||
clock-names = "pwm", "pclk";
|
||||
pinctrl-names = "default";
|
||||
|
||||
@ -222,7 +222,6 @@ stmpe1600: stmpe1600@42 {
|
||||
reg = <0x42>;
|
||||
interrupts = <8 3>;
|
||||
interrupt-parent = <&gpioi>;
|
||||
interrupt-controller;
|
||||
wakeup-source;
|
||||
|
||||
stmpegpio: stmpe_gpio {
|
||||
|
||||
@ -64,7 +64,6 @@ touchscreen@38 {
|
||||
reg = <0x38>;
|
||||
interrupts = <2 2>;
|
||||
interrupt-parent = <&gpiof>;
|
||||
interrupt-controller;
|
||||
touchscreen-size-x = <480>;
|
||||
touchscreen-size-y = <800>;
|
||||
status = "okay";
|
||||
|
||||
@ -415,7 +415,6 @@ stmpe811@41 {
|
||||
reg = <0x41>;
|
||||
interrupts = <30 IRQ_TYPE_LEVEL_LOW>;
|
||||
interrupt-parent = <&gpio2>;
|
||||
interrupt-controller;
|
||||
id = <0>;
|
||||
blocks = <0x5>;
|
||||
irq-trigger = <0x1>;
|
||||
|
||||
@ -297,6 +297,7 @@ CONFIG_FB_MODE_HELPERS=y
|
||||
CONFIG_LCD_CLASS_DEVICE=y
|
||||
CONFIG_LCD_L4F00242T03=y
|
||||
CONFIG_LCD_PLATFORM=y
|
||||
CONFIG_BACKLIGHT_CLASS_DEVICE=y
|
||||
CONFIG_BACKLIGHT_PWM=y
|
||||
CONFIG_BACKLIGHT_GPIO=y
|
||||
CONFIG_FRAMEBUFFER_CONSOLE=y
|
||||
|
||||
@ -339,6 +339,7 @@ static struct gpiod_lookup_table ep93xx_i2c_gpiod_table = {
|
||||
GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN),
|
||||
GPIO_LOOKUP_IDX("G", 0, NULL, 1,
|
||||
GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN),
|
||||
{ }
|
||||
},
|
||||
};
|
||||
|
||||
|
||||
@ -42,5 +42,6 @@ dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h616-bigtreetech-cb1-manta.dtb
|
||||
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h616-bigtreetech-pi.dtb
|
||||
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h616-orangepi-zero2.dtb
|
||||
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h616-x96-mate.dtb
|
||||
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h618-orangepi-zero2w.dtb
|
||||
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h618-orangepi-zero3.dtb
|
||||
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h618-transpeed-8k618-t.dtb
|
||||
|
||||
@ -145,7 +145,6 @@ pci@fbc00000 {
|
||||
msix: msix@fbe00000 {
|
||||
compatible = "al,alpine-msix";
|
||||
reg = <0x0 0xfbe00000 0x0 0x100000>;
|
||||
interrupt-controller;
|
||||
msi-controller;
|
||||
al,msi-base-spi = <160>;
|
||||
al,msi-num-spis = <160>;
|
||||
|
||||
@ -355,7 +355,6 @@ pcie@fbd00000 {
|
||||
msix: msix@fbe00000 {
|
||||
compatible = "al,alpine-msix";
|
||||
reg = <0x0 0xfbe00000 0x0 0x100000>;
|
||||
interrupt-controller;
|
||||
msi-controller;
|
||||
al,msi-base-spi = <336>;
|
||||
al,msi-num-spis = <959>;
|
||||
|
||||
@ -586,6 +586,7 @@ gpio_g: gpio@660a0000 {
|
||||
#gpio-cells = <2>;
|
||||
gpio-controller;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
interrupts = <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>;
|
||||
};
|
||||
|
||||
|
||||
@ -450,6 +450,7 @@ gpio_hsls: gpio@d0000 {
|
||||
#gpio-cells = <2>;
|
||||
gpio-controller;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
interrupts = <GIC_SPI 183 IRQ_TYPE_LEVEL_HIGH>;
|
||||
gpio-ranges = <&pinmux 0 0 16>,
|
||||
<&pinmux 16 71 2>,
|
||||
|
||||
@ -20,23 +20,41 @@ dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1046a-frwy.dtb
|
||||
dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1046a-qds.dtb
|
||||
dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1046a-rdb.dtb
|
||||
dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1046a-tqmls1046a-mbls10xxa.dtb
|
||||
DTC_FLAGS_fsl-ls1088a-qds := -Wno-interrupt_map
|
||||
dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1088a-qds.dtb
|
||||
DTC_FLAGS_fsl-ls1088a-rdb := -Wno-interrupt_map
|
||||
dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1088a-rdb.dtb
|
||||
DTC_FLAGS_fsl-ls1088a-ten64 := -Wno-interrupt_map
|
||||
dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1088a-ten64.dtb
|
||||
DTC_FLAGS_fsl-ls1088a-tqmls1088a-mbls10xxa := -Wno-interrupt_map
|
||||
dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1088a-tqmls1088a-mbls10xxa.dtb
|
||||
DTC_FLAGS_fsl-ls2080a-qds := -Wno-interrupt_map
|
||||
dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls2080a-qds.dtb
|
||||
DTC_FLAGS_fsl-ls2080a-rdb := -Wno-interrupt_map
|
||||
dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls2080a-rdb.dtb
|
||||
DTC_FLAGS_fsl-ls2081a-rdb := -Wno-interrupt_map
|
||||
dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls2081a-rdb.dtb
|
||||
DTC_FLAGS_fsl-ls2080a-simu := -Wno-interrupt_map
|
||||
dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls2080a-simu.dtb
|
||||
DTC_FLAGS_fsl-ls2088a-qds := -Wno-interrupt_map
|
||||
dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls2088a-qds.dtb
|
||||
DTC_FLAGS_fsl-ls2088a-rdb := -Wno-interrupt_map
|
||||
dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls2088a-rdb.dtb
|
||||
DTC_FLAGS_fsl-lx2160a-bluebox3 := -Wno-interrupt_map
|
||||
dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-lx2160a-bluebox3.dtb
|
||||
DTC_FLAGS_fsl-lx2160a-bluebox3-rev-a := -Wno-interrupt_map
|
||||
dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-lx2160a-bluebox3-rev-a.dtb
|
||||
DTC_FLAGS_fsl-lx2160a-clearfog-cx := -Wno-interrupt_map
|
||||
dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-lx2160a-clearfog-cx.dtb
|
||||
DTC_FLAGS_fsl-lx2160a-honeycomb := -Wno-interrupt_map
|
||||
dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-lx2160a-honeycomb.dtb
|
||||
DTC_FLAGS_fsl-lx2160a-qds := -Wno-interrupt_map
|
||||
dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-lx2160a-qds.dtb
|
||||
DTC_FLAGS_fsl-lx2160a-rdb := -Wno-interrupt_map
|
||||
dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-lx2160a-rdb.dtb
|
||||
DTC_FLAGS_fsl-lx2162a-clearfog := -Wno-interrupt_map
|
||||
dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-lx2162a-clearfog.dtb
|
||||
DTC_FLAGS_fsl-lx2162a-qds := -Wno-interrupt_map
|
||||
dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-lx2162a-qds.dtb
|
||||
|
||||
fsl-ls1028a-qds-13bb-dtbs := fsl-ls1028a-qds.dtb fsl-ls1028a-qds-13bb.dtbo
|
||||
@ -53,6 +71,7 @@ dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1028a-qds-85bb.dtb
|
||||
dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1028a-qds-899b.dtb
|
||||
dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1028a-qds-9999.dtb
|
||||
|
||||
DTC_FLAGS_fsl-lx2160a-tqmlx2160a-mblx2160a := -Wno-interrupt_map
|
||||
fsl-lx2160a-tqmlx2160a-mblx2160a-12-11-x-dtbs := fsl-lx2160a-tqmlx2160a-mblx2160a.dtb \
|
||||
fsl-lx2160a-tqmlx2160a-mblx2160a_12_x_x.dtbo \
|
||||
fsl-lx2160a-tqmlx2160a-mblx2160a_x_11_x.dtbo
|
||||
|
||||
@ -128,14 +128,9 @@ extcon_usbotg1: typec@3d {
|
||||
pinctrl-0 = <&pinctrl_ptn5150>;
|
||||
status = "okay";
|
||||
|
||||
connector {
|
||||
compatible = "usb-c-connector";
|
||||
label = "USB-C";
|
||||
|
||||
port {
|
||||
typec1_dr_sw: endpoint {
|
||||
remote-endpoint = <&usb1_drd_sw>;
|
||||
};
|
||||
port {
|
||||
typec1_dr_sw: endpoint {
|
||||
remote-endpoint = <&usb1_drd_sw>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
@ -486,7 +486,7 @@ &uart3 { /* A53 Debug */
|
||||
&uart4 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_uart4>;
|
||||
status = "okay";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&usb3_phy0 {
|
||||
|
||||
@ -175,14 +175,10 @@ typec@3d {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_ptn5150>;
|
||||
|
||||
connector {
|
||||
compatible = "usb-c-connector";
|
||||
label = "USB-C";
|
||||
port {
|
||||
|
||||
port {
|
||||
ptn5150_out_ep: endpoint {
|
||||
remote-endpoint = <&dwc3_0_ep>;
|
||||
};
|
||||
ptn5150_out_ep: endpoint {
|
||||
remote-endpoint = <&dwc3_0_ep>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
@ -255,7 +255,7 @@ tc_bridge: bridge@f {
|
||||
<&clk IMX8MP_AUDIO_PLL2_OUT>;
|
||||
assigned-clock-parents = <&clk IMX8MP_AUDIO_PLL2_OUT>;
|
||||
assigned-clock-rates = <13000000>, <13000000>, <156000000>;
|
||||
reset-gpios = <&gpio3 21 GPIO_ACTIVE_HIGH>;
|
||||
reset-gpios = <&gpio4 1 GPIO_ACTIVE_HIGH>;
|
||||
status = "disabled";
|
||||
|
||||
ports {
|
||||
|
||||
@ -184,6 +184,13 @@ reg_vcc_12v0: regulator-12v0 {
|
||||
enable-active-high;
|
||||
};
|
||||
|
||||
reg_vcc_1v8: regulator-1v8 {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "VCC_1V8";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
};
|
||||
|
||||
reg_vcc_3v3: regulator-3v3 {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "VCC_3V3";
|
||||
@ -480,7 +487,7 @@ tlv320aic3x04: audio-codec@18 {
|
||||
clock-names = "mclk";
|
||||
clocks = <&audio_blk_ctrl IMX8MP_CLK_AUDIOMIX_SAI3_MCLK1>;
|
||||
reset-gpios = <&gpio4 29 GPIO_ACTIVE_LOW>;
|
||||
iov-supply = <®_vcc_3v3>;
|
||||
iov-supply = <®_vcc_1v8>;
|
||||
ldoin-supply = <®_vcc_3v3>;
|
||||
};
|
||||
|
||||
|
||||
@ -1820,7 +1820,7 @@ lvds_bridge: bridge@5c {
|
||||
compatible = "fsl,imx8mp-ldb";
|
||||
reg = <0x5c 0x4>, <0x128 0x4>;
|
||||
reg-names = "ldb", "lvds";
|
||||
clocks = <&clk IMX8MP_CLK_MEDIA_LDB>;
|
||||
clocks = <&clk IMX8MP_CLK_MEDIA_LDB_ROOT>;
|
||||
clock-names = "ldb";
|
||||
assigned-clocks = <&clk IMX8MP_CLK_MEDIA_LDB>;
|
||||
assigned-clock-parents = <&clk IMX8MP_VIDEO_PLL1_OUT>;
|
||||
|
||||
@ -126,7 +126,6 @@ eth0: ethernet@c1b00000 {
|
||||
amba {
|
||||
#address-cells = <2>;
|
||||
#size-cells = <1>;
|
||||
#interrupt-cells = <3>;
|
||||
|
||||
compatible = "simple-bus";
|
||||
interrupt-parent = <&gic>;
|
||||
|
||||
@ -126,7 +126,6 @@ eth0: ethernet@c3700000 {
|
||||
amba {
|
||||
#address-cells = <2>;
|
||||
#size-cells = <1>;
|
||||
#interrupt-cells = <3>;
|
||||
|
||||
compatible = "simple-bus";
|
||||
interrupt-parent = <&gic>;
|
||||
|
||||
@ -138,7 +138,6 @@ pmu {
|
||||
|
||||
odmi: odmi@300000 {
|
||||
compatible = "marvell,odmi-controller";
|
||||
interrupt-controller;
|
||||
msi-controller;
|
||||
marvell,odmi-frames = <4>;
|
||||
reg = <0x300000 0x4000>,
|
||||
|
||||
@ -128,6 +128,7 @@ mt6360: pmic@34 {
|
||||
compatible = "mediatek,mt6360";
|
||||
reg = <0x34>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
interrupts-extended = <&pio 101 IRQ_TYPE_EDGE_FALLING>;
|
||||
interrupt-names = "IRQB";
|
||||
|
||||
|
||||
@ -175,7 +175,7 @@ ethernet@6800000 {
|
||||
status = "okay";
|
||||
|
||||
phy-handle = <&mgbe0_phy>;
|
||||
phy-mode = "usxgmii";
|
||||
phy-mode = "10gbase-r";
|
||||
|
||||
mdio {
|
||||
#address-cells = <1>;
|
||||
|
||||
@ -1459,7 +1459,7 @@ ethernet@6800000 {
|
||||
<&mc TEGRA234_MEMORY_CLIENT_MGBEAWR &emc>;
|
||||
interconnect-names = "dma-mem", "write";
|
||||
iommus = <&smmu_niso0 TEGRA234_SID_MGBE>;
|
||||
power-domains = <&bpmp TEGRA234_POWER_DOMAIN_MGBEA>;
|
||||
power-domains = <&bpmp TEGRA234_POWER_DOMAIN_MGBEB>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
@ -1493,7 +1493,7 @@ ethernet@6900000 {
|
||||
<&mc TEGRA234_MEMORY_CLIENT_MGBEBWR &emc>;
|
||||
interconnect-names = "dma-mem", "write";
|
||||
iommus = <&smmu_niso0 TEGRA234_SID_MGBE_VF1>;
|
||||
power-domains = <&bpmp TEGRA234_POWER_DOMAIN_MGBEB>;
|
||||
power-domains = <&bpmp TEGRA234_POWER_DOMAIN_MGBEC>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
@ -1527,7 +1527,7 @@ ethernet@6a00000 {
|
||||
<&mc TEGRA234_MEMORY_CLIENT_MGBECWR &emc>;
|
||||
interconnect-names = "dma-mem", "write";
|
||||
iommus = <&smmu_niso0 TEGRA234_SID_MGBE_VF2>;
|
||||
power-domains = <&bpmp TEGRA234_POWER_DOMAIN_MGBEC>;
|
||||
power-domains = <&bpmp TEGRA234_POWER_DOMAIN_MGBED>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
|
||||
@ -830,10 +830,10 @@ pcie0: pcie@20000000 {
|
||||
|
||||
#interrupt-cells = <1>;
|
||||
interrupt-map-mask = <0 0 0 0x7>;
|
||||
interrupt-map = <0 0 0 1 &intc 0 75 IRQ_TYPE_LEVEL_HIGH>, /* int_a */
|
||||
<0 0 0 2 &intc 0 78 IRQ_TYPE_LEVEL_HIGH>, /* int_b */
|
||||
<0 0 0 3 &intc 0 79 IRQ_TYPE_LEVEL_HIGH>, /* int_c */
|
||||
<0 0 0 4 &intc 0 83 IRQ_TYPE_LEVEL_HIGH>; /* int_d */
|
||||
interrupt-map = <0 0 0 1 &intc 0 0 0 75 IRQ_TYPE_LEVEL_HIGH>, /* int_a */
|
||||
<0 0 0 2 &intc 0 0 0 78 IRQ_TYPE_LEVEL_HIGH>, /* int_b */
|
||||
<0 0 0 3 &intc 0 0 0 79 IRQ_TYPE_LEVEL_HIGH>, /* int_c */
|
||||
<0 0 0 4 &intc 0 0 0 83 IRQ_TYPE_LEVEL_HIGH>; /* int_d */
|
||||
|
||||
clocks = <&gcc GCC_SYS_NOC_PCIE0_AXI_CLK>,
|
||||
<&gcc GCC_PCIE0_AXI_M_CLK>,
|
||||
|
||||
@ -814,13 +814,13 @@ pcie1: pcie@10000000 {
|
||||
interrupt-names = "msi";
|
||||
#interrupt-cells = <1>;
|
||||
interrupt-map-mask = <0 0 0 0x7>;
|
||||
interrupt-map = <0 0 0 1 &intc 0 142
|
||||
interrupt-map = <0 0 0 1 &intc 0 0 142
|
||||
IRQ_TYPE_LEVEL_HIGH>, /* int_a */
|
||||
<0 0 0 2 &intc 0 143
|
||||
<0 0 0 2 &intc 0 0 143
|
||||
IRQ_TYPE_LEVEL_HIGH>, /* int_b */
|
||||
<0 0 0 3 &intc 0 144
|
||||
<0 0 0 3 &intc 0 0 144
|
||||
IRQ_TYPE_LEVEL_HIGH>, /* int_c */
|
||||
<0 0 0 4 &intc 0 145
|
||||
<0 0 0 4 &intc 0 0 145
|
||||
IRQ_TYPE_LEVEL_HIGH>; /* int_d */
|
||||
|
||||
clocks = <&gcc GCC_SYS_NOC_PCIE1_AXI_CLK>,
|
||||
@ -876,13 +876,13 @@ pcie0: pcie@20000000 {
|
||||
interrupt-names = "msi";
|
||||
#interrupt-cells = <1>;
|
||||
interrupt-map-mask = <0 0 0 0x7>;
|
||||
interrupt-map = <0 0 0 1 &intc 0 75
|
||||
interrupt-map = <0 0 0 1 &intc 0 0 75
|
||||
IRQ_TYPE_LEVEL_HIGH>, /* int_a */
|
||||
<0 0 0 2 &intc 0 78
|
||||
<0 0 0 2 &intc 0 0 78
|
||||
IRQ_TYPE_LEVEL_HIGH>, /* int_b */
|
||||
<0 0 0 3 &intc 0 79
|
||||
<0 0 0 3 &intc 0 0 79
|
||||
IRQ_TYPE_LEVEL_HIGH>, /* int_c */
|
||||
<0 0 0 4 &intc 0 83
|
||||
<0 0 0 4 &intc 0 0 83
|
||||
IRQ_TYPE_LEVEL_HIGH>; /* int_d */
|
||||
|
||||
clocks = <&gcc GCC_SYS_NOC_PCIE0_AXI_CLK>,
|
||||
|
||||
@ -457,25 +457,6 @@ modem_etm_out_funnel_in2: endpoint {
|
||||
};
|
||||
};
|
||||
|
||||
mpm: interrupt-controller {
|
||||
compatible = "qcom,mpm";
|
||||
qcom,rpm-msg-ram = <&apss_mpm>;
|
||||
interrupts = <GIC_SPI 171 IRQ_TYPE_EDGE_RISING>;
|
||||
mboxes = <&apcs_glb 1>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
#power-domain-cells = <0>;
|
||||
interrupt-parent = <&intc>;
|
||||
qcom,mpm-pin-count = <96>;
|
||||
qcom,mpm-pin-map = <2 184>, /* TSENS1 upper_lower_int */
|
||||
<52 243>, /* DWC3_PRI ss_phy_irq */
|
||||
<79 347>, /* DWC3_PRI hs_phy_irq */
|
||||
<80 352>, /* DWC3_SEC hs_phy_irq */
|
||||
<81 347>, /* QUSB2_PHY_PRI DP+DM */
|
||||
<82 352>, /* QUSB2_PHY_SEC DP+DM */
|
||||
<87 326>; /* SPMI */
|
||||
};
|
||||
|
||||
psci {
|
||||
compatible = "arm,psci-1.0";
|
||||
method = "smc";
|
||||
@ -765,15 +746,8 @@ pciephy_2: phy@3000 {
|
||||
};
|
||||
|
||||
rpm_msg_ram: sram@68000 {
|
||||
compatible = "qcom,rpm-msg-ram", "mmio-sram";
|
||||
compatible = "qcom,rpm-msg-ram";
|
||||
reg = <0x00068000 0x6000>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges = <0 0x00068000 0x7000>;
|
||||
|
||||
apss_mpm: sram@1b8 {
|
||||
reg = <0x1b8 0x48>;
|
||||
};
|
||||
};
|
||||
|
||||
qfprom@74000 {
|
||||
@ -856,8 +830,8 @@ tsens1: thermal-sensor@4ad000 {
|
||||
reg = <0x004ad000 0x1000>, /* TM */
|
||||
<0x004ac000 0x1000>; /* SROT */
|
||||
#qcom,sensors = <8>;
|
||||
interrupts-extended = <&mpm 2 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<&intc GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "uplow", "critical";
|
||||
#thermal-sensor-cells = <1>;
|
||||
};
|
||||
@ -1363,7 +1337,6 @@ tlmm: pinctrl@1010000 {
|
||||
interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
|
||||
gpio-controller;
|
||||
gpio-ranges = <&tlmm 0 0 150>;
|
||||
wakeup-parent = <&mpm>;
|
||||
#gpio-cells = <2>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
@ -1891,7 +1864,7 @@ spmi_bus: spmi@400f000 {
|
||||
<0x0400a000 0x002100>;
|
||||
reg-names = "core", "chnls", "obsrvr", "intr", "cnfg";
|
||||
interrupt-names = "periph_irq";
|
||||
interrupts-extended = <&mpm 87 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupts = <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>;
|
||||
qcom,ee = <0>;
|
||||
qcom,channel = <0>;
|
||||
#address-cells = <2>;
|
||||
@ -3052,8 +3025,8 @@ usb3: usb@6af8800 {
|
||||
#size-cells = <1>;
|
||||
ranges;
|
||||
|
||||
interrupts-extended = <&mpm 79 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<&mpm 52 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupts = <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 243 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "hs_phy_irq", "ss_phy_irq";
|
||||
|
||||
clocks = <&gcc GCC_SYS_NOC_USB3_AXI_CLK>,
|
||||
|
||||
@ -563,6 +563,8 @@ &pcie3a_phy {
|
||||
};
|
||||
|
||||
&pcie4 {
|
||||
max-link-speed = <2>;
|
||||
|
||||
perst-gpios = <&tlmm 141 GPIO_ACTIVE_LOW>;
|
||||
wake-gpios = <&tlmm 139 GPIO_ACTIVE_LOW>;
|
||||
|
||||
|
||||
@ -722,6 +722,8 @@ &pcie3a_phy {
|
||||
};
|
||||
|
||||
&pcie4 {
|
||||
max-link-speed = <2>;
|
||||
|
||||
perst-gpios = <&tlmm 141 GPIO_ACTIVE_LOW>;
|
||||
wake-gpios = <&tlmm 139 GPIO_ACTIVE_LOW>;
|
||||
|
||||
|
||||
@ -1304,6 +1304,9 @@ &clk_virt SLAVE_QUP_CORE_0 RPM_ALWAYS_TAG>,
|
||||
&config_noc SLAVE_QUP_0 RPM_ALWAYS_TAG>,
|
||||
<&system_noc MASTER_QUP_0 RPM_ALWAYS_TAG
|
||||
&bimc SLAVE_EBI_CH0 RPM_ALWAYS_TAG>;
|
||||
interconnect-names = "qup-core",
|
||||
"qup-config",
|
||||
"qup-memory";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
status = "disabled";
|
||||
|
||||
@ -622,7 +622,7 @@ right_spkr: speaker@0,1 {
|
||||
|
||||
&tlmm {
|
||||
/* Reserved I/Os for NFC */
|
||||
gpio-reserved-ranges = <32 8>;
|
||||
gpio-reserved-ranges = <32 8>, <74 1>;
|
||||
|
||||
disp0_reset_n_active: disp0-reset-n-active-state {
|
||||
pins = "gpio133";
|
||||
|
||||
@ -659,7 +659,7 @@ touchscreen@0 {
|
||||
|
||||
&tlmm {
|
||||
/* Reserved I/Os for NFC */
|
||||
gpio-reserved-ranges = <32 8>;
|
||||
gpio-reserved-ranges = <32 8>, <74 1>;
|
||||
|
||||
bt_default: bt-default-state {
|
||||
bt-en-pins {
|
||||
|
||||
@ -234,6 +234,7 @@ gpio_exp_74: gpio@74 {
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
interrupt-parent = <&gpio6>;
|
||||
interrupts = <8 IRQ_TYPE_EDGE_FALLING>;
|
||||
|
||||
@ -294,6 +295,7 @@ gpio_exp_75: gpio@75 {
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
interrupt-parent = <&gpio6>;
|
||||
interrupts = <4 IRQ_TYPE_EDGE_FALLING>;
|
||||
};
|
||||
@ -314,6 +316,7 @@ gpio_exp_76: gpio@76 {
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
interrupt-parent = <&gpio7>;
|
||||
interrupts = <3 IRQ_TYPE_EDGE_FALLING>;
|
||||
};
|
||||
@ -324,6 +327,7 @@ gpio_exp_77: gpio@77 {
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
interrupt-parent = <&gpio5>;
|
||||
interrupts = <9 IRQ_TYPE_EDGE_FALLING>;
|
||||
};
|
||||
|
||||
@ -631,6 +631,7 @@ spi0: spi@ff1d0000 {
|
||||
clock-names = "spiclk", "apb_pclk";
|
||||
dmas = <&dmac 12>, <&dmac 13>;
|
||||
dma-names = "tx", "rx";
|
||||
num-cs = <2>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&spi0_clk &spi0_csn &spi0_miso &spi0_mosi>;
|
||||
#address-cells = <1>;
|
||||
@ -646,6 +647,7 @@ spi1: spi@ff1d8000 {
|
||||
clock-names = "spiclk", "apb_pclk";
|
||||
dmas = <&dmac 14>, <&dmac 15>;
|
||||
dma-names = "tx", "rx";
|
||||
num-cs = <2>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&spi1_clk &spi1_csn0 &spi1_csn1 &spi1_miso &spi1_mosi>;
|
||||
#address-cells = <1>;
|
||||
|
||||
@ -488,7 +488,6 @@ pwm2: pwm@ff1b0020 {
|
||||
pwm3: pwm@ff1b0030 {
|
||||
compatible = "rockchip,rk3328-pwm";
|
||||
reg = <0x0 0xff1b0030 0x0 0x10>;
|
||||
interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cru SCLK_PWM>, <&cru PCLK_PWM>;
|
||||
clock-names = "pwm", "pclk";
|
||||
pinctrl-names = "default";
|
||||
|
||||
@ -72,7 +72,7 @@ vcc3v3_lcd: vcc3v3-lcd-regulator {
|
||||
vin-supply = <&vcc3v3_sys>;
|
||||
};
|
||||
|
||||
vcc5v0_usb30_host: vcc5v0-usb30-host-regulator {
|
||||
vcc5v0_usb_host1: vcc5v0_usb_host2: vcc5v0-usb-host-regulator {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vcc5v0_host";
|
||||
regulator-boot-on;
|
||||
@ -114,6 +114,7 @@ &pcie30phy {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* Standard pcie */
|
||||
&pcie3x2 {
|
||||
reset-gpios = <&gpio3 RK_PB0 GPIO_ACTIVE_HIGH>;
|
||||
vpcie3v3-supply = <&vcc3v3_sys>;
|
||||
@ -122,6 +123,7 @@ &pcie3x2 {
|
||||
|
||||
/* M.2 M-Key ssd */
|
||||
&pcie3x4 {
|
||||
num-lanes = <2>;
|
||||
reset-gpios = <&gpio4 RK_PB6 GPIO_ACTIVE_HIGH>;
|
||||
vpcie3v3-supply = <&vcc3v3_sys>;
|
||||
status = "okay";
|
||||
@ -188,12 +190,12 @@ &u2phy3 {
|
||||
};
|
||||
|
||||
&u2phy2_host {
|
||||
phy-supply = <&vcc5v0_usb30_host>;
|
||||
phy-supply = <&vcc5v0_usb_host1>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&u2phy3_host {
|
||||
phy-supply = <&vcc5v0_usb30_host>;
|
||||
phy-supply = <&vcc5v0_usb_host2>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
|
||||
@ -16,8 +16,8 @@ / {
|
||||
|
||||
aliases {
|
||||
mmc0 = &sdhci;
|
||||
mmc1 = &sdio;
|
||||
mmc2 = &sdmmc;
|
||||
mmc1 = &sdmmc;
|
||||
mmc2 = &sdio;
|
||||
serial2 = &uart2;
|
||||
};
|
||||
|
||||
|
||||
@ -448,6 +448,7 @@ pmic@0 {
|
||||
<&rk806_dvs2_null>, <&rk806_dvs3_null>;
|
||||
pinctrl-names = "default";
|
||||
spi-max-frequency = <1000000>;
|
||||
system-power-controller;
|
||||
|
||||
vcc1-supply = <&vcc5v0_sys>;
|
||||
vcc2-supply = <&vcc5v0_sys>;
|
||||
|
||||
@ -62,7 +62,6 @@ leds {
|
||||
compatible = "gpio-leds";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&led1_pin>;
|
||||
status = "okay";
|
||||
|
||||
/* LED1 on PCB */
|
||||
led-1 {
|
||||
|
||||
@ -189,19 +189,19 @@ &cpu_l3 {
|
||||
cpu-supply = <&vdd_cpu_lit_s0>;
|
||||
};
|
||||
|
||||
&cpu_b0{
|
||||
&cpu_b0 {
|
||||
cpu-supply = <&vdd_cpu_big0_s0>;
|
||||
};
|
||||
|
||||
&cpu_b1{
|
||||
&cpu_b1 {
|
||||
cpu-supply = <&vdd_cpu_big0_s0>;
|
||||
};
|
||||
|
||||
&cpu_b2{
|
||||
&cpu_b2 {
|
||||
cpu-supply = <&vdd_cpu_big1_s0>;
|
||||
};
|
||||
|
||||
&cpu_b3{
|
||||
&cpu_b3 {
|
||||
cpu-supply = <&vdd_cpu_big1_s0>;
|
||||
};
|
||||
|
||||
|
||||
@ -19,8 +19,8 @@ / {
|
||||
|
||||
aliases {
|
||||
mmc0 = &sdhci;
|
||||
mmc1 = &sdio;
|
||||
mmc2 = &sdmmc;
|
||||
mmc1 = &sdmmc;
|
||||
mmc2 = &sdio;
|
||||
};
|
||||
|
||||
analog-sound {
|
||||
|
||||
@ -195,13 +195,13 @@ &gpio0 {
|
||||
|
||||
&gpio1 {
|
||||
gpio-line-names = /* GPIO1 A0-A7 */
|
||||
"HEADER_27_3v3", "HEADER_28_3v3", "", "",
|
||||
"HEADER_27_3v3", "", "", "",
|
||||
"HEADER_29_1v8", "", "HEADER_7_1v8", "",
|
||||
/* GPIO1 B0-B7 */
|
||||
"", "HEADER_31_1v8", "HEADER_33_1v8", "",
|
||||
"HEADER_11_1v8", "HEADER_13_1v8", "", "",
|
||||
/* GPIO1 C0-C7 */
|
||||
"", "", "", "",
|
||||
"", "HEADER_28_3v3", "", "",
|
||||
"", "", "", "",
|
||||
/* GPIO1 D0-D7 */
|
||||
"", "", "", "",
|
||||
@ -225,11 +225,11 @@ &gpio3 {
|
||||
|
||||
&gpio4 {
|
||||
gpio-line-names = /* GPIO4 A0-A7 */
|
||||
"", "", "HEADER_37_3v3", "HEADER_32_3v3",
|
||||
"HEADER_36_3v3", "", "HEADER_35_3v3", "HEADER_38_3v3",
|
||||
"", "", "HEADER_37_3v3", "HEADER_8_3v3",
|
||||
"HEADER_10_3v3", "", "HEADER_32_3v3", "HEADER_35_3v3",
|
||||
/* GPIO4 B0-B7 */
|
||||
"", "", "", "HEADER_40_3v3",
|
||||
"HEADER_8_3v3", "HEADER_10_3v3", "", "",
|
||||
"HEADER_38_3v3", "HEADER_36_3v3", "", "",
|
||||
/* GPIO4 C0-C7 */
|
||||
"", "", "", "",
|
||||
"", "", "", "",
|
||||
|
||||
@ -227,8 +227,19 @@ static int ctr_encrypt(struct skcipher_request *req)
|
||||
src += blocks * AES_BLOCK_SIZE;
|
||||
}
|
||||
if (nbytes && walk.nbytes == walk.total) {
|
||||
u8 buf[AES_BLOCK_SIZE];
|
||||
u8 *d = dst;
|
||||
|
||||
if (unlikely(nbytes < AES_BLOCK_SIZE))
|
||||
src = dst = memcpy(buf + sizeof(buf) - nbytes,
|
||||
src, nbytes);
|
||||
|
||||
neon_aes_ctr_encrypt(dst, src, ctx->enc, ctx->key.rounds,
|
||||
nbytes, walk.iv);
|
||||
|
||||
if (unlikely(nbytes < AES_BLOCK_SIZE))
|
||||
memcpy(d, dst, nbytes);
|
||||
|
||||
nbytes = 0;
|
||||
}
|
||||
kernel_neon_end();
|
||||
|
||||
@ -386,6 +386,7 @@ extern void sme_alloc(struct task_struct *task, bool flush);
|
||||
extern unsigned int sme_get_vl(void);
|
||||
extern int sme_set_current_vl(unsigned long arg);
|
||||
extern int sme_get_current_vl(void);
|
||||
extern void sme_suspend_exit(void);
|
||||
|
||||
/*
|
||||
* Return how many bytes of memory are required to store the full SME
|
||||
@ -421,6 +422,7 @@ static inline int sme_max_vl(void) { return 0; }
|
||||
static inline int sme_max_virtualisable_vl(void) { return 0; }
|
||||
static inline int sme_set_current_vl(unsigned long arg) { return -EINVAL; }
|
||||
static inline int sme_get_current_vl(void) { return -EINVAL; }
|
||||
static inline void sme_suspend_exit(void) { }
|
||||
|
||||
static inline size_t sme_state_size(struct task_struct const *task)
|
||||
{
|
||||
|
||||
@ -15,10 +15,6 @@
|
||||
|
||||
#define JUMP_LABEL_NOP_SIZE AARCH64_INSN_SIZE
|
||||
|
||||
/*
|
||||
* Prefer the constraint "S" to support PIC with GCC. Clang before 19 does not
|
||||
* support "S" on a symbol with a constant offset, so we use "i" as a fallback.
|
||||
*/
|
||||
static __always_inline bool arch_static_branch(struct static_key * const key,
|
||||
const bool branch)
|
||||
{
|
||||
@ -27,9 +23,9 @@ static __always_inline bool arch_static_branch(struct static_key * const key,
|
||||
" .pushsection __jump_table, \"aw\" \n\t"
|
||||
" .align 3 \n\t"
|
||||
" .long 1b - ., %l[l_yes] - . \n\t"
|
||||
" .quad (%[key] - .) + %[bit0] \n\t"
|
||||
" .quad %c0 - . \n\t"
|
||||
" .popsection \n\t"
|
||||
: : [key]"Si"(key), [bit0]"i"(branch) : : l_yes);
|
||||
: : "i"(&((char *)key)[branch]) : : l_yes);
|
||||
|
||||
return false;
|
||||
l_yes:
|
||||
@ -44,9 +40,9 @@ static __always_inline bool arch_static_branch_jump(struct static_key * const ke
|
||||
" .pushsection __jump_table, \"aw\" \n\t"
|
||||
" .align 3 \n\t"
|
||||
" .long 1b - ., %l[l_yes] - . \n\t"
|
||||
" .quad (%[key] - .) + %[bit0] \n\t"
|
||||
" .quad %c0 - . \n\t"
|
||||
" .popsection \n\t"
|
||||
: : [key]"Si"(key), [bit0]"i"(branch) : : l_yes);
|
||||
: : "i"(&((char *)key)[branch]) : : l_yes);
|
||||
|
||||
return false;
|
||||
l_yes:
|
||||
|
||||
@ -1311,6 +1311,22 @@ void __init sme_setup(void)
|
||||
get_sme_default_vl());
|
||||
}
|
||||
|
||||
void sme_suspend_exit(void)
|
||||
{
|
||||
u64 smcr = 0;
|
||||
|
||||
if (!system_supports_sme())
|
||||
return;
|
||||
|
||||
if (system_supports_fa64())
|
||||
smcr |= SMCR_ELx_FA64;
|
||||
if (system_supports_sme2())
|
||||
smcr |= SMCR_ELx_EZT0;
|
||||
|
||||
write_sysreg_s(smcr, SYS_SMCR_EL1);
|
||||
write_sysreg_s(0, SYS_SMPRI_EL1);
|
||||
}
|
||||
|
||||
#endif /* CONFIG_ARM64_SME */
|
||||
|
||||
static void sve_init_regs(void)
|
||||
|
||||
@ -247,7 +247,7 @@ struct kunwind_consume_entry_data {
|
||||
void *cookie;
|
||||
};
|
||||
|
||||
static bool
|
||||
static __always_inline bool
|
||||
arch_kunwind_consume_entry(const struct kunwind_state *state, void *cookie)
|
||||
{
|
||||
struct kunwind_consume_entry_data *data = cookie;
|
||||
|
||||
@ -12,6 +12,7 @@
|
||||
#include <asm/daifflags.h>
|
||||
#include <asm/debug-monitors.h>
|
||||
#include <asm/exec.h>
|
||||
#include <asm/fpsimd.h>
|
||||
#include <asm/mte.h>
|
||||
#include <asm/memory.h>
|
||||
#include <asm/mmu_context.h>
|
||||
@ -80,6 +81,8 @@ void notrace __cpu_suspend_exit(void)
|
||||
*/
|
||||
spectre_v4_enable_mitigation(NULL);
|
||||
|
||||
sme_suspend_exit();
|
||||
|
||||
/* Restore additional feature-specific configuration */
|
||||
ptrauth_suspend_exit();
|
||||
}
|
||||
|
||||
@ -468,6 +468,9 @@ static int its_sync_lpi_pending_table(struct kvm_vcpu *vcpu)
|
||||
}
|
||||
|
||||
irq = vgic_get_irq(vcpu->kvm, NULL, intids[i]);
|
||||
if (!irq)
|
||||
continue;
|
||||
|
||||
raw_spin_lock_irqsave(&irq->irq_lock, flags);
|
||||
irq->pending_latch = pendmask & (1U << bit_nr);
|
||||
vgic_queue_irq_unlock(vcpu->kvm, irq, flags);
|
||||
@ -1432,6 +1435,8 @@ static int vgic_its_cmd_handle_movall(struct kvm *kvm, struct vgic_its *its,
|
||||
|
||||
for (i = 0; i < irq_count; i++) {
|
||||
irq = vgic_get_irq(kvm, NULL, intids[i]);
|
||||
if (!irq)
|
||||
continue;
|
||||
|
||||
update_affinity(irq, vcpu2);
|
||||
|
||||
|
||||
@ -60,7 +60,7 @@ &i2c0 {
|
||||
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
eeprom@57{
|
||||
eeprom@57 {
|
||||
compatible = "atmel,24c16";
|
||||
reg = <0x57>;
|
||||
pagesize = <16>;
|
||||
|
||||
@ -78,7 +78,7 @@ &i2c2 {
|
||||
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
eeprom@57{
|
||||
eeprom@57 {
|
||||
compatible = "atmel,24c16";
|
||||
reg = <0x57>;
|
||||
pagesize = <16>;
|
||||
|
||||
@ -357,6 +357,8 @@ void __init platform_init(void)
|
||||
acpi_gbl_use_default_register_widths = false;
|
||||
acpi_boot_table_init();
|
||||
#endif
|
||||
|
||||
early_init_fdt_scan_reserved_mem();
|
||||
unflatten_and_copy_device_tree();
|
||||
|
||||
#ifdef CONFIG_NUMA
|
||||
@ -390,8 +392,6 @@ static void __init arch_mem_init(char **cmdline_p)
|
||||
|
||||
check_kernel_sections_mem();
|
||||
|
||||
early_init_fdt_scan_reserved_mem();
|
||||
|
||||
/*
|
||||
* In order to reduce the possibility of kernel panic when failed to
|
||||
* get IO TLB memory under CONFIG_SWIOTLB, it is better to allocate
|
||||
|
||||
Some files were not shown because too many files have changed in this diff Show More
Loading…
Reference in New Issue
Block a user