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s390/boot: Consider DCSS segments on memory layout setup
The maximum mappable physical address (as returned by arch_get_mappable_range() callback) is limited by the value of (1UL << MAX_PHYSMEM_BITS). The maximum physical address available to a DCSS segment is 512GB. In case the available online or offline memory size is less than the DCSS limit arch_get_mappable_range() would include never used [512GB..(1UL << MAX_PHYSMEM_BITS)] range. Acked-by: Heiko Carstens <hca@linux.ibm.com> Signed-off-by: Alexander Gordeev <agordeev@linux.ibm.com>
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@ -3,6 +3,7 @@
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#include <linux/elf.h>
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#include <asm/page-states.h>
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#include <asm/boot_data.h>
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#include <asm/extmem.h>
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#include <asm/sections.h>
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#include <asm/maccess.h>
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#include <asm/cpu_mf.h>
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@ -313,14 +314,16 @@ static unsigned long setup_kernel_memory_layout(void)
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pages = SECTION_ALIGN_UP(pages);
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/* keep vmemmap_start aligned to a top level region table entry */
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vmemmap_start = round_down(VMALLOC_START - pages * sizeof(struct page), rte_size);
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/* maximum address for which linear mapping could be created (DCSS, memory) */
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max_mappable = min(vmemmap_start, 1UL << MAX_PHYSMEM_BITS);
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/* make sure identity map doesn't overlay with vmemmap */
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ident_map_size = min(ident_map_size, vmemmap_start);
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vmemmap_size = SECTION_ALIGN_UP(ident_map_size / PAGE_SIZE) * sizeof(struct page);
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/* make sure vmemmap doesn't overlay with vmalloc area */
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VMALLOC_START = max(vmemmap_start + vmemmap_size, VMALLOC_START);
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vmemmap = (struct page *)vmemmap_start;
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/* maximum address for which linear mapping could be created (DCSS, memory) */
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BUILD_BUG_ON(MAX_DCSS_ADDR > (1UL << MAX_PHYSMEM_BITS));
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max_mappable = max(ident_map_size, MAX_DCSS_ADDR);
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max_mappable = min(max_mappable, vmemmap_start);
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return asce_limit;
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}
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@ -8,6 +8,13 @@
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#define _ASM_S390X_DCSS_H
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#ifndef __ASSEMBLY__
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/*
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* DCSS segment is defined as a contiguous range of pages using DEFSEG command.
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* The range start and end is a page number with a value less than or equal to
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* 0x7ffffff (see CP Commands and Utilities Reference).
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*/
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#define MAX_DCSS_ADDR (512UL * SZ_1G)
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/* possible values for segment type as returned by segment_info */
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#define SEG_TYPE_SW 0
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#define SEG_TYPE_EW 1
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