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dt-bindings: riscv: add Zfh[min] ISA extensions description

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Add description of Zfh[min] ISA extensions[1].

Link: https://drive.google.com/file/d/1z3tQQLm5ALsAD77PM0l0CHnapxWCeVzP/view [1]
Signed-off-by: Clément Léger <cleger@rivosinc.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20231114141256.126749-12-cleger@rivosinc.com
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
This commit is contained in:
Clément Léger 2023-11-14 09:12:47 -05:00 committed by Palmer Dabbelt
parent bf4cd84111
commit c44714c35f
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Documentation/devicetree/bindings/riscv/extensions.yaml
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@ -214,6 +214,19 @@ properties:
instructions as ratified at commit 6d33919 ("Merge pull request #158
from hirooih/clmul-fix-loop-end-condition") of riscv-bitmanip.
- const: zfh
description:
The standard Zfh extension for 16-bit half-precision binary
floating-point instructions, as ratified in commit 64074bc ("Update
version numbers for Zfh/Zfinx") of riscv-isa-manual.
- const: zfhmin
description:
The standard Zfhmin extension which provides minimal support for
16-bit half-precision binary floating-point instructions, as ratified
in commit 64074bc ("Update version numbers for Zfh/Zfinx") of
riscv-isa-manual.
- const: zk
description:
The standard Zk Standard Scalar cryptography extension as ratified