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drm/amdkfd: hard-code MALL cacheline size for gfx11, gfx12

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Signed-off-by: Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com>
Reviewed-by: David Belanger <david.belanger@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
This commit is contained in:
Harish Kasiviswanathan 2024-11-28 11:07:57 -05:00 committed by Alex Deucher
parent 321048c4a3
commit d50bf3f0fa
1 changed files with 1 additions and 1 deletions
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2
drivers/gpu/drm/amd/amdkfd/kfd_crat.c
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@ -1504,7 +1504,7 @@ static int kfd_fill_gpu_cache_info_from_gfx_config(struct kfd_dev *kdev,
CRAT_CACHE_FLAGS_DATA_CACHE |
CRAT_CACHE_FLAGS_SIMD_CACHE);
pcache_info[i].num_cu_shared = adev->gfx.config.max_cu_per_sh;
pcache_info[i].cache_line_size = 0;
pcache_info[i].cache_line_size = 64;
i++;
}
return i;