mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
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KVM: arm64: Reuse fields of sys_reg_desc for idreg
sys_reg_desc::{reset, val} are presently unused for ID register
descriptors. Repurpose these fields to support user-configurable ID
registers.
Use the ::reset() function pointer to return the sanitised value of a
given ID register, optionally with KVM-specific feature sanitisation.
Additionally, keep a mask of writable register fields in ::val.
Signed-off-by: Jing Zhang <jingzhangos@google.com>
Link: https://lore.kernel.org/r/20230609190054.1542113-6-oliver.upton@linux.dev
Signed-off-by: Oliver Upton <oliver.upton@linux.dev>
This commit is contained in:
Jing Zhang
Oliver Upton
parent
f90f9360c3
commit
d86cde6e33
@ -540,10 +540,11 @@ static int get_bvr(struct kvm_vcpu *vcpu, const struct sys_reg_desc *rd,
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return 0;
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}
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static void reset_bvr(struct kvm_vcpu *vcpu,
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static u64 reset_bvr(struct kvm_vcpu *vcpu,
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const struct sys_reg_desc *rd)
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{
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vcpu->arch.vcpu_debug_state.dbg_bvr[rd->CRm] = rd->val;
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return rd->val;
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}
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static bool trap_bcr(struct kvm_vcpu *vcpu,
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@ -576,10 +577,11 @@ static int get_bcr(struct kvm_vcpu *vcpu, const struct sys_reg_desc *rd,
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return 0;
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}
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static void reset_bcr(struct kvm_vcpu *vcpu,
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static u64 reset_bcr(struct kvm_vcpu *vcpu,
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const struct sys_reg_desc *rd)
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{
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vcpu->arch.vcpu_debug_state.dbg_bcr[rd->CRm] = rd->val;
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return rd->val;
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}
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static bool trap_wvr(struct kvm_vcpu *vcpu,
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@ -613,10 +615,11 @@ static int get_wvr(struct kvm_vcpu *vcpu, const struct sys_reg_desc *rd,
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return 0;
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}
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static void reset_wvr(struct kvm_vcpu *vcpu,
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static u64 reset_wvr(struct kvm_vcpu *vcpu,
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const struct sys_reg_desc *rd)
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{
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vcpu->arch.vcpu_debug_state.dbg_wvr[rd->CRm] = rd->val;
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return rd->val;
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}
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static bool trap_wcr(struct kvm_vcpu *vcpu,
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@ -649,25 +652,28 @@ static int get_wcr(struct kvm_vcpu *vcpu, const struct sys_reg_desc *rd,
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return 0;
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}
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static void reset_wcr(struct kvm_vcpu *vcpu,
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static u64 reset_wcr(struct kvm_vcpu *vcpu,
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const struct sys_reg_desc *rd)
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{
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vcpu->arch.vcpu_debug_state.dbg_wcr[rd->CRm] = rd->val;
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return rd->val;
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}
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static void reset_amair_el1(struct kvm_vcpu *vcpu, const struct sys_reg_desc *r)
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static u64 reset_amair_el1(struct kvm_vcpu *vcpu, const struct sys_reg_desc *r)
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{
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u64 amair = read_sysreg(amair_el1);
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vcpu_write_sys_reg(vcpu, amair, AMAIR_EL1);
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return amair;
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}
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static void reset_actlr(struct kvm_vcpu *vcpu, const struct sys_reg_desc *r)
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static u64 reset_actlr(struct kvm_vcpu *vcpu, const struct sys_reg_desc *r)
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{
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u64 actlr = read_sysreg(actlr_el1);
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vcpu_write_sys_reg(vcpu, actlr, ACTLR_EL1);
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return actlr;
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}
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static void reset_mpidr(struct kvm_vcpu *vcpu, const struct sys_reg_desc *r)
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static u64 reset_mpidr(struct kvm_vcpu *vcpu, const struct sys_reg_desc *r)
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{
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u64 mpidr;
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@ -681,7 +687,10 @@ static void reset_mpidr(struct kvm_vcpu *vcpu, const struct sys_reg_desc *r)
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mpidr = (vcpu->vcpu_id & 0x0f) << MPIDR_LEVEL_SHIFT(0);
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mpidr |= ((vcpu->vcpu_id >> 4) & 0xff) << MPIDR_LEVEL_SHIFT(1);
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mpidr |= ((vcpu->vcpu_id >> 12) & 0xff) << MPIDR_LEVEL_SHIFT(2);
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vcpu_write_sys_reg(vcpu, (1ULL << 31) | mpidr, MPIDR_EL1);
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mpidr |= (1ULL << 31);
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vcpu_write_sys_reg(vcpu, mpidr, MPIDR_EL1);
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return mpidr;
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}
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static unsigned int pmu_visibility(const struct kvm_vcpu *vcpu,
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@ -693,13 +702,13 @@ static unsigned int pmu_visibility(const struct kvm_vcpu *vcpu,
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return REG_HIDDEN;
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}
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static void reset_pmu_reg(struct kvm_vcpu *vcpu, const struct sys_reg_desc *r)
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static u64 reset_pmu_reg(struct kvm_vcpu *vcpu, const struct sys_reg_desc *r)
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{
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u64 n, mask = BIT(ARMV8_PMU_CYCLE_IDX);
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/* No PMU available, any PMU reg may UNDEF... */
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if (!kvm_arm_support_pmu_v3())
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return;
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return 0;
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n = read_sysreg(pmcr_el0) >> ARMV8_PMU_PMCR_N_SHIFT;
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n &= ARMV8_PMU_PMCR_N_MASK;
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@ -708,33 +717,41 @@ static void reset_pmu_reg(struct kvm_vcpu *vcpu, const struct sys_reg_desc *r)
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reset_unknown(vcpu, r);
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__vcpu_sys_reg(vcpu, r->reg) &= mask;
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return __vcpu_sys_reg(vcpu, r->reg);
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}
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static void reset_pmevcntr(struct kvm_vcpu *vcpu, const struct sys_reg_desc *r)
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static u64 reset_pmevcntr(struct kvm_vcpu *vcpu, const struct sys_reg_desc *r)
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{
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reset_unknown(vcpu, r);
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__vcpu_sys_reg(vcpu, r->reg) &= GENMASK(31, 0);
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return __vcpu_sys_reg(vcpu, r->reg);
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}
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static void reset_pmevtyper(struct kvm_vcpu *vcpu, const struct sys_reg_desc *r)
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static u64 reset_pmevtyper(struct kvm_vcpu *vcpu, const struct sys_reg_desc *r)
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{
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reset_unknown(vcpu, r);
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__vcpu_sys_reg(vcpu, r->reg) &= ARMV8_PMU_EVTYPE_MASK;
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return __vcpu_sys_reg(vcpu, r->reg);
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}
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static void reset_pmselr(struct kvm_vcpu *vcpu, const struct sys_reg_desc *r)
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static u64 reset_pmselr(struct kvm_vcpu *vcpu, const struct sys_reg_desc *r)
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{
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reset_unknown(vcpu, r);
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__vcpu_sys_reg(vcpu, r->reg) &= ARMV8_PMU_COUNTER_MASK;
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return __vcpu_sys_reg(vcpu, r->reg);
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}
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static void reset_pmcr(struct kvm_vcpu *vcpu, const struct sys_reg_desc *r)
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static u64 reset_pmcr(struct kvm_vcpu *vcpu, const struct sys_reg_desc *r)
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{
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u64 pmcr;
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/* No PMU available, PMCR_EL0 may UNDEF... */
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if (!kvm_arm_support_pmu_v3())
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return;
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return 0;
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/* Only preserve PMCR_EL0.N, and reset the rest to 0 */
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pmcr = read_sysreg(pmcr_el0) & (ARMV8_PMU_PMCR_N_MASK << ARMV8_PMU_PMCR_N_SHIFT);
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@ -742,6 +759,8 @@ static void reset_pmcr(struct kvm_vcpu *vcpu, const struct sys_reg_desc *r)
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pmcr |= ARMV8_PMU_PMCR_LC;
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__vcpu_sys_reg(vcpu, r->reg) = pmcr;
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return __vcpu_sys_reg(vcpu, r->reg);
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}
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static bool check_pmu_access_disabled(struct kvm_vcpu *vcpu, u64 flags)
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@ -1209,7 +1228,8 @@ static u8 pmuver_to_perfmon(u8 pmuver)
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}
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/* Read a sanitised cpufeature ID register by sys_reg_desc */
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static u64 read_id_reg(const struct kvm_vcpu *vcpu, struct sys_reg_desc const *r)
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static u64 __kvm_read_sanitised_id_reg(const struct kvm_vcpu *vcpu,
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const struct sys_reg_desc *r)
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{
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u32 id = reg_to_encoding(r);
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u64 val;
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@ -1280,6 +1300,17 @@ static u64 read_id_reg(const struct kvm_vcpu *vcpu, struct sys_reg_desc const *r
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return val;
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}
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static u64 kvm_read_sanitised_id_reg(struct kvm_vcpu *vcpu,
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const struct sys_reg_desc *r)
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{
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return __kvm_read_sanitised_id_reg(vcpu, r);
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}
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static u64 read_id_reg(const struct kvm_vcpu *vcpu, const struct sys_reg_desc *r)
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{
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return __kvm_read_sanitised_id_reg(vcpu, r);
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}
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static unsigned int id_visibility(const struct kvm_vcpu *vcpu,
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const struct sys_reg_desc *r)
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{
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@ -1530,7 +1561,7 @@ static bool access_clidr(struct kvm_vcpu *vcpu, struct sys_reg_params *p,
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* Fabricate a CLIDR_EL1 value instead of using the real value, which can vary
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* by the physical CPU which the vcpu currently resides in.
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*/
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static void reset_clidr(struct kvm_vcpu *vcpu, const struct sys_reg_desc *r)
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static u64 reset_clidr(struct kvm_vcpu *vcpu, const struct sys_reg_desc *r)
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{
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u64 ctr_el0 = read_sanitised_ftr_reg(SYS_CTR_EL0);
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u64 clidr;
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@ -1578,6 +1609,8 @@ static void reset_clidr(struct kvm_vcpu *vcpu, const struct sys_reg_desc *r)
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clidr |= 2 << CLIDR_TTYPE_SHIFT(loc);
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__vcpu_sys_reg(vcpu, r->reg) = clidr;
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return __vcpu_sys_reg(vcpu, r->reg);
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}
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static int set_clidr(struct kvm_vcpu *vcpu, const struct sys_reg_desc *rd,
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@ -1677,6 +1710,17 @@ static unsigned int elx2_visibility(const struct kvm_vcpu *vcpu,
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.visibility = elx2_visibility, \
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}
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/*
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* Since reset() callback and field val are not used for idregs, they will be
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* used for specific purposes for idregs.
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* The reset() would return KVM sanitised register value. The value would be the
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* same as the host kernel sanitised value if there is no KVM sanitisation.
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* The val would be used as a mask indicating writable fields for the idreg.
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* Only bits with 1 are writable from userspace. This mask might not be
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* necessary in the future whenever all ID registers are enabled as writable
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* from userspace.
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*/
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/* sys_reg_desc initialiser for known cpufeature ID registers */
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#define ID_SANITISED(name) { \
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SYS_DESC(SYS_##name), \
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@ -1684,6 +1728,8 @@ static unsigned int elx2_visibility(const struct kvm_vcpu *vcpu,
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.get_user = get_id_reg, \
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.set_user = set_id_reg, \
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.visibility = id_visibility, \
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.reset = kvm_read_sanitised_id_reg, \
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.val = 0, \
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}
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/* sys_reg_desc initialiser for known cpufeature ID registers */
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@ -1693,6 +1739,8 @@ static unsigned int elx2_visibility(const struct kvm_vcpu *vcpu,
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.get_user = get_id_reg, \
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.set_user = set_id_reg, \
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.visibility = aa32_id_visibility, \
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.reset = kvm_read_sanitised_id_reg, \
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.val = 0, \
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}
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/*
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@ -1705,7 +1753,9 @@ static unsigned int elx2_visibility(const struct kvm_vcpu *vcpu,
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.access = access_id_reg, \
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.get_user = get_id_reg, \
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.set_user = set_id_reg, \
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.visibility = raz_visibility \
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.visibility = raz_visibility, \
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.reset = kvm_read_sanitised_id_reg, \
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.val = 0, \
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}
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/*
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@ -1719,6 +1769,8 @@ static unsigned int elx2_visibility(const struct kvm_vcpu *vcpu,
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.get_user = get_id_reg, \
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.set_user = set_id_reg, \
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.visibility = raz_visibility, \
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.reset = kvm_read_sanitised_id_reg, \
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.val = 0, \
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}
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static bool access_sp_el1(struct kvm_vcpu *vcpu,
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@ -3055,19 +3107,21 @@ id_to_sys_reg_desc(struct kvm_vcpu *vcpu, u64 id,
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*/
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#define FUNCTION_INVARIANT(reg) \
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static void get_##reg(struct kvm_vcpu *v, \
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static u64 get_##reg(struct kvm_vcpu *v, \
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const struct sys_reg_desc *r) \
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{ \
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((struct sys_reg_desc *)r)->val = read_sysreg(reg); \
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return ((struct sys_reg_desc *)r)->val; \
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}
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FUNCTION_INVARIANT(midr_el1)
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FUNCTION_INVARIANT(revidr_el1)
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FUNCTION_INVARIANT(aidr_el1)
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static void get_ctr_el0(struct kvm_vcpu *v, const struct sys_reg_desc *r)
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static u64 get_ctr_el0(struct kvm_vcpu *v, const struct sys_reg_desc *r)
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{
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((struct sys_reg_desc *)r)->val = read_sanitised_ftr_reg(SYS_CTR_EL0);
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return ((struct sys_reg_desc *)r)->val;
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}
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/* ->val is filled in by kvm_sys_reg_table_init() */
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@ -64,13 +64,16 @@ struct sys_reg_desc {
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struct sys_reg_params *,
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const struct sys_reg_desc *);
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/* Initialization for vcpu. */
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void (*reset)(struct kvm_vcpu *, const struct sys_reg_desc *);
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/*
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* Initialization for vcpu. Return initialized value, or KVM
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* sanitized value for ID registers.
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*/
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u64 (*reset)(struct kvm_vcpu *, const struct sys_reg_desc *);
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/* Index into sys_reg[], or 0 if we don't need to save it. */
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int reg;
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/* Value (usually reset value) */
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/* Value (usually reset value), or write mask for idregs */
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u64 val;
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/* Custom get/set_user functions, fallback to generic if NULL */
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@ -123,19 +126,21 @@ static inline bool read_zero(struct kvm_vcpu *vcpu,
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}
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/* Reset functions */
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static inline void reset_unknown(struct kvm_vcpu *vcpu,
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static inline u64 reset_unknown(struct kvm_vcpu *vcpu,
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const struct sys_reg_desc *r)
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{
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BUG_ON(!r->reg);
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BUG_ON(r->reg >= NR_SYS_REGS);
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__vcpu_sys_reg(vcpu, r->reg) = 0x1de7ec7edbadc0deULL;
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return __vcpu_sys_reg(vcpu, r->reg);
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}
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static inline void reset_val(struct kvm_vcpu *vcpu, const struct sys_reg_desc *r)
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static inline u64 reset_val(struct kvm_vcpu *vcpu, const struct sys_reg_desc *r)
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{
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BUG_ON(!r->reg);
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BUG_ON(r->reg >= NR_SYS_REGS);
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__vcpu_sys_reg(vcpu, r->reg) = r->val;
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return __vcpu_sys_reg(vcpu, r->reg);
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}
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static inline unsigned int sysreg_visibility(const struct kvm_vcpu *vcpu,
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