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Fourth set of changes for amd-pstate in 6.11
This adds fixes for setting scaling max frequency on systems without a dedicated MSR for setting CPPC requests. -----BEGIN PGP SIGNATURE----- iQJOBAABCgA4FiEECwtuSU6dXvs5GA2aLRkspiR3AnYFAmaKthAaHG1hcmlvLmxp bW9uY2llbGxvQGFtZC5jb20ACgkQLRkspiR3AnZkqRAAsPBD+IXOFphiw6rNQCJa 7Sb87Eo0xBtlOTZ/n4yDwbpiuuKQ6ihqKtI7+tQ5Rk1+qKTi8542n21ioSu00e4a g0LswTCGS9BN7Enos+HHjrVkiZ8k7FVg291Uyh4m4odPw/y5KVgvATTi9s+RIRbf dysoI/9o/MozBQEIFF4VSryXHTElJy5cMUm8BYDTvKEK01HYyKiSxFpshB/033xt JhBYjnS71rgTaE0Er3xsndL637yBVL2wpBk3ONwAdP+XdGHW411bdE9S6PU9ob5g 4kd/BdkrHMh4xRA+GZt+yIvItmJSvWKF1rIjBcIHI4rjz1xqi9pTIVrE1Bbol7F5 T06R99DySyP7hpORupYGX1Z05bIkKYG7r47Y6OdZLmkb15X/cyCa9k4m+mHeJrP6 UntQZ8Ksp8L8U3lFxOcY1eX28UWk5xDnOzX01Ruyuov/5X6BB2xv8Lj3wMatOYxi gATgHMTNsmga5COmoVjcKHMRFxPrEboED4kq2pg5Pr9+Xj+LtzabCuX/DVb1FZES oRHwpq50RvaqVcP4cnFxA3j/Ou1+GR/ClnXNaUGiCRrGGcjZeZLvHEVzCLYr1eO5 hxZ0YdBg6pRTF3DUGYSAP5DHuhT+qKB1hFbFGqXV9rCWpipuHM6VYA7U0NPtJjna DrhdcgniBPTb6KyG18YckP8= =KOPt -----END PGP SIGNATURE----- Merge tag 'amd-pstate-v6.11-2024-07-07' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/superm1/linux Merge more amd-pstate changes for 6.11 from Mario Liminciello: "This adds fixes for setting scaling max frequency on systems without a dedicated MSR for setting CPPC requests." * tag 'amd-pstate-v6.11-2024-07-07' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/superm1/linux: cpufreq/amd-pstate: Fix the scaling_max_freq setting on shared memory CPPC systems cpufreq/amd-pstate-ut: Convert nominal_freq to khz during comparisons
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commit
e23f41cc4f
@ -202,6 +202,7 @@ static void amd_pstate_ut_check_freq(u32 index)
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int cpu = 0;
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struct cpufreq_policy *policy = NULL;
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struct amd_cpudata *cpudata = NULL;
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u32 nominal_freq_khz;
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for_each_possible_cpu(cpu) {
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policy = cpufreq_cpu_get(cpu);
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@ -209,13 +210,14 @@ static void amd_pstate_ut_check_freq(u32 index)
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break;
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cpudata = policy->driver_data;
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if (!((cpudata->max_freq >= cpudata->nominal_freq) &&
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(cpudata->nominal_freq > cpudata->lowest_nonlinear_freq) &&
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nominal_freq_khz = cpudata->nominal_freq*1000;
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if (!((cpudata->max_freq >= nominal_freq_khz) &&
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(nominal_freq_khz > cpudata->lowest_nonlinear_freq) &&
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(cpudata->lowest_nonlinear_freq > cpudata->min_freq) &&
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(cpudata->min_freq > 0))) {
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amd_pstate_ut_cases[index].result = AMD_PSTATE_UT_RESULT_FAIL;
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pr_err("%s cpu%d max=%d >= nominal=%d > lowest_nonlinear=%d > min=%d > 0, the formula is incorrect!\n",
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__func__, cpu, cpudata->max_freq, cpudata->nominal_freq,
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__func__, cpu, cpudata->max_freq, nominal_freq_khz,
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cpudata->lowest_nonlinear_freq, cpudata->min_freq);
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goto skip_test;
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}
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@ -229,13 +231,13 @@ static void amd_pstate_ut_check_freq(u32 index)
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if (cpudata->boost_supported) {
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if ((policy->max == cpudata->max_freq) ||
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(policy->max == cpudata->nominal_freq))
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(policy->max == nominal_freq_khz))
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amd_pstate_ut_cases[index].result = AMD_PSTATE_UT_RESULT_PASS;
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else {
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amd_pstate_ut_cases[index].result = AMD_PSTATE_UT_RESULT_FAIL;
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pr_err("%s cpu%d policy_max=%d should be equal cpu_max=%d or cpu_nominal=%d !\n",
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__func__, cpu, policy->max, cpudata->max_freq,
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cpudata->nominal_freq);
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nominal_freq_khz);
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goto skip_test;
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}
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} else {
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@ -239,6 +239,26 @@ static int amd_pstate_get_energy_pref_index(struct amd_cpudata *cpudata)
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return index;
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}
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static void pstate_update_perf(struct amd_cpudata *cpudata, u32 min_perf,
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u32 des_perf, u32 max_perf, bool fast_switch)
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{
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if (fast_switch)
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wrmsrl(MSR_AMD_CPPC_REQ, READ_ONCE(cpudata->cppc_req_cached));
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else
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wrmsrl_on_cpu(cpudata->cpu, MSR_AMD_CPPC_REQ,
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READ_ONCE(cpudata->cppc_req_cached));
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}
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DEFINE_STATIC_CALL(amd_pstate_update_perf, pstate_update_perf);
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static inline void amd_pstate_update_perf(struct amd_cpudata *cpudata,
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u32 min_perf, u32 des_perf,
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u32 max_perf, bool fast_switch)
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{
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static_call(amd_pstate_update_perf)(cpudata, min_perf, des_perf,
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max_perf, fast_switch);
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}
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static int amd_pstate_set_epp(struct amd_cpudata *cpudata, u32 epp)
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{
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int ret;
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@ -255,6 +275,9 @@ static int amd_pstate_set_epp(struct amd_cpudata *cpudata, u32 epp)
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if (!ret)
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cpudata->epp_cached = epp;
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} else {
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amd_pstate_update_perf(cpudata, cpudata->min_limit_perf, 0U,
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cpudata->max_limit_perf, false);
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perf_ctrls.energy_perf = epp;
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ret = cppc_set_epp_perf(cpudata->cpu, &perf_ctrls, 1);
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if (ret) {
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@ -442,16 +465,6 @@ static inline int amd_pstate_init_perf(struct amd_cpudata *cpudata)
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return static_call(amd_pstate_init_perf)(cpudata);
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}
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static void pstate_update_perf(struct amd_cpudata *cpudata, u32 min_perf,
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u32 des_perf, u32 max_perf, bool fast_switch)
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{
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if (fast_switch)
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wrmsrl(MSR_AMD_CPPC_REQ, READ_ONCE(cpudata->cppc_req_cached));
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else
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wrmsrl_on_cpu(cpudata->cpu, MSR_AMD_CPPC_REQ,
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READ_ONCE(cpudata->cppc_req_cached));
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}
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static void cppc_update_perf(struct amd_cpudata *cpudata,
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u32 min_perf, u32 des_perf,
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u32 max_perf, bool fast_switch)
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@ -465,16 +478,6 @@ static void cppc_update_perf(struct amd_cpudata *cpudata,
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cppc_set_perf(cpudata->cpu, &perf_ctrls);
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}
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DEFINE_STATIC_CALL(amd_pstate_update_perf, pstate_update_perf);
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static inline void amd_pstate_update_perf(struct amd_cpudata *cpudata,
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u32 min_perf, u32 des_perf,
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u32 max_perf, bool fast_switch)
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{
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static_call(amd_pstate_update_perf)(cpudata, min_perf, des_perf,
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max_perf, fast_switch);
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}
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static inline bool amd_pstate_sample(struct amd_cpudata *cpudata)
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{
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u64 aperf, mperf, tsc;
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