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net: ipa: limit local processing context address
Not all of the bits of the LOCAL_PKT_PROC_CNTXT register are valid. Until IPA v4.5, there are 17 valid bits (though the bottom three must be zero). Starting with IPA v4.5, 18 bits are valid. Introduce proc_cntxt_base_addr_encoded() to encode the base address for use in the register using only the valid bits. Shorten the name of the register (omit "_BASE") to avoid the need to wrap the line in the one place it's used. Signed-off-by: Alex Elder <elder@linaro.org> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -61,6 +61,7 @@ int ipa_mem_setup(struct ipa *ipa)
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struct gsi_trans *trans;
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u32 offset;
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u16 size;
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u32 val;
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/* Get a transaction to define the header memory region and to zero
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* the processing context and modem memory regions.
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@ -89,8 +90,9 @@ int ipa_mem_setup(struct ipa *ipa)
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gsi_trans_commit_wait(trans);
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/* Tell the hardware where the processing context area is located */
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iowrite32(ipa->mem_offset + ipa->mem[IPA_MEM_MODEM_PROC_CTX].offset,
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ipa->reg_virt + IPA_REG_LOCAL_PKT_PROC_CNTXT_BASE_OFFSET);
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offset = ipa->mem_offset + ipa->mem[IPA_MEM_MODEM_PROC_CTX].offset;
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val = proc_cntxt_base_addr_encoded(ipa->version, offset);
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iowrite32(val, ipa->reg_virt + IPA_REG_LOCAL_PKT_PROC_CNTXT_OFFSET);
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return 0;
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}
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@ -217,8 +217,18 @@ static inline u32 ipa_reg_bcr_val(enum ipa_version version)
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return 0x00000000;
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}
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/* The value of the next register must be a multiple of 8 */
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#define IPA_REG_LOCAL_PKT_PROC_CNTXT_BASE_OFFSET 0x000001e8
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/* The value of the next register must be a multiple of 8 (bottom 3 bits 0) */
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#define IPA_REG_LOCAL_PKT_PROC_CNTXT_OFFSET 0x000001e8
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/* Encoded value for LOCAL_PKT_PROC_CNTXT register BASE_ADDR field */
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static inline u32 proc_cntxt_base_addr_encoded(enum ipa_version version,
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u32 addr)
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{
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if (version < IPA_VERSION_4_5)
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return u32_encode_bits(addr, GENMASK(16, 0));
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return u32_encode_bits(addr, GENMASK(17, 0));
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}
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/* ipa->available defines the valid bits in the AGGR_FORCE_CLOSE register */
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#define IPA_REG_AGGR_FORCE_CLOSE_OFFSET 0x000001ec
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