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platform/x86/intel/vsec: Add base address field

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Some devices may emulate PCI VSEC capabilities in MMIO. In such cases the
BAR is not readable from a config space. Provide a field for drivers to
indicate the base address to be used.

Signed-off-by: David E. Box <david.e.box@linux.intel.com>
Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Link: https://lore.kernel.org/r/20231129222132.2331261-9-david.e.box@linux.intel.com
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
This commit is contained in:
David E. Box 2023-11-29 14:21:20 -08:00 committed by Hans de Goede
parent 4edbd117ba
commit e97ec7f621
3 changed files with 21 additions and 5 deletions
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14
drivers/platform/x86/intel/pmt/class.c
View File

@ -160,10 +160,11 @@ static struct class intel_pmt_class = {
static int intel_pmt_populate_entry(struct intel_pmt_entry *entry,
struct intel_pmt_header *header,
struct device *dev,
struct intel_vsec_device *ivdev,
struct resource *disc_res)
{
struct pci_dev *pci_dev = to_pci_dev(dev->parent);
struct pci_dev *pci_dev = ivdev->pcidev;
struct device *dev = &ivdev->auxdev.dev;
u8 bir;
/*
@ -215,6 +216,13 @@ static int intel_pmt_populate_entry(struct intel_pmt_entry *entry,
break;
case ACCESS_BARID:
/* Use the provided base address if it exists */
if (ivdev->base_addr) {
entry->base_addr = ivdev->base_addr +
GET_ADDRESS(header->base_offset);
break;
}
/*
* If another BAR was specified then the base offset
* represents the offset within that BAR. SO retrieve the
@ -319,7 +327,7 @@ int intel_pmt_dev_create(struct intel_pmt_entry *entry, struct intel_pmt_namespa
if (ret)
return ret;
ret = intel_pmt_populate_entry(entry, &header, dev, disc_res);
ret = intel_pmt_populate_entry(entry, &header, intel_vsec_dev, disc_res);
if (ret)
return ret;

10
drivers/platform/x86/intel/vsec.c
View File

@ -154,6 +154,7 @@ static int intel_vsec_add_dev(struct pci_dev *pdev, struct intel_vsec_header *he
struct resource *tmp;
struct device *parent;
unsigned long quirks = info->quirks;
u64 base_addr;
int i;
if (info->parent)
@ -185,14 +186,18 @@ static int intel_vsec_add_dev(struct pci_dev *pdev, struct intel_vsec_header *he
if (quirks & VSEC_QUIRK_TABLE_SHIFT)
header->offset >>= TABLE_OFFSET_SHIFT;
if (info->base_addr)
base_addr = info->base_addr;
else
base_addr = pdev->resource[header->tbir].start;
/*
* The DVSEC/VSEC contains the starting offset and count for a block of
* discovery tables. Create a resource array of these tables to the
* auxiliary device driver.
*/
for (i = 0, tmp = res; i < header->num_entries; i++, tmp++) {
tmp->start = pdev->resource[header->tbir].start +
header->offset + i * (header->entry_size * sizeof(u32));
tmp->start = base_addr + header->offset + i * (header->entry_size * sizeof(u32));
tmp->end = tmp->start + (header->entry_size * sizeof(u32)) - 1;
tmp->flags = IORESOURCE_MEM;
@ -207,6 +212,7 @@ static int intel_vsec_add_dev(struct pci_dev *pdev, struct intel_vsec_header *he
intel_vsec_dev->resource = no_free_ptr(res);
intel_vsec_dev->num_resources = header->num_entries;
intel_vsec_dev->quirks = info->quirks;
intel_vsec_dev->base_addr = info->base_addr;
if (header->id == VSEC_ID_SDSI)
intel_vsec_dev->ida = &intel_vsec_sdsi_ida;

2
drivers/platform/x86/intel/vsec.h
View File

@ -73,6 +73,7 @@ struct intel_vsec_platform_info {
struct intel_vsec_header **headers;
unsigned long caps;
unsigned long quirks;
u64 base_addr;
};
struct intel_vsec_device {
@ -85,6 +86,7 @@ struct intel_vsec_device {
void *priv_data;
size_t priv_data_size;
unsigned long quirks;
u64 base_addr;
};
int intel_vsec_add_aux(struct pci_dev *pdev, struct device *parent,