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clk: ux500: Register ssp clock lookups for u8500
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Mike Turquette <mturquette@linaro.org>
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@ -324,8 +324,11 @@ void u8500_clk_init(void)
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clk = clk_reg_prcc_pclk("p3_pclk1", "per3clk", U8500_CLKRST3_BASE,
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BIT(1), 0);
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clk_register_clkdev(clk, "apb_pclk", "ssp0");
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clk = clk_reg_prcc_pclk("p3_pclk2", "per3clk", U8500_CLKRST3_BASE,
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BIT(2), 0);
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clk_register_clkdev(clk, "apb_pclk", "ssp1");
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clk = clk_reg_prcc_pclk("p3_pclk3", "per3clk", U8500_CLKRST3_BASE,
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BIT(3), 0);
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@ -468,8 +471,11 @@ void u8500_clk_init(void)
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/* Periph3 */
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clk = clk_reg_prcc_kclk("p3_ssp0_kclk", "sspclk",
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U8500_CLKRST3_BASE, BIT(1), CLK_SET_RATE_GATE);
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clk_register_clkdev(clk, NULL, "ssp0");
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clk = clk_reg_prcc_kclk("p3_ssp1_kclk", "sspclk",
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U8500_CLKRST3_BASE, BIT(2), CLK_SET_RATE_GATE);
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clk_register_clkdev(clk, NULL, "ssp1");
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clk = clk_reg_prcc_kclk("p3_i2c0_kclk", "i2cclk",
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U8500_CLKRST3_BASE, BIT(3), CLK_SET_RATE_GATE);
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