mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
synced 2025-01-07 21:53:44 +00:00
Merge branch '10GbE' of git://git.kernel.org/pub/scm/linux/kernel/git/tnguy/net-queue
Tony Nguyen says: ==================== Intel Wired LAN Driver Updates 2023-01-10 (ixgbe, igc, iavf) This series contains updates to ixgbe, igc, and iavf drivers. Yang Yingliang adds calls to pci_dev_put() for proper ref count tracking on ixgbe. Christopher adds setting of Toggle on Target Time bits for proper pulse per second (PPS) synchronization for igc. Daniil Tatianin fixes, likely, copy/paste issue that misreported destination instead of source for IP mask for iavf error. * '10GbE' of git://git.kernel.org/pub/scm/linux/kernel/git/tnguy/net-queue: iavf/iavf_main: actually log ->src mask when talking about it igc: Fix PPS delta between two synchronized end-points ixgbe: fix pci device refcount leak ==================== Link: https://lore.kernel.org/r/20230110223825.648544-1-anthony.l.nguyen@intel.com Reviewed-by: Alexander Duyck <alexanderduyck@fb.com> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
This commit is contained in:
commit
eb25df8828
@ -3850,7 +3850,7 @@ static int iavf_parse_cls_flower(struct iavf_adapter *adapter,
|
||||
field_flags |= IAVF_CLOUD_FIELD_IIP;
|
||||
} else {
|
||||
dev_err(&adapter->pdev->dev, "Bad ip src mask 0x%08x\n",
|
||||
be32_to_cpu(match.mask->dst));
|
||||
be32_to_cpu(match.mask->src));
|
||||
return -EINVAL;
|
||||
}
|
||||
}
|
||||
|
@ -475,7 +475,9 @@
|
||||
#define IGC_TSAUXC_EN_TT0 BIT(0) /* Enable target time 0. */
|
||||
#define IGC_TSAUXC_EN_TT1 BIT(1) /* Enable target time 1. */
|
||||
#define IGC_TSAUXC_EN_CLK0 BIT(2) /* Enable Configurable Frequency Clock 0. */
|
||||
#define IGC_TSAUXC_ST0 BIT(4) /* Start Clock 0 Toggle on Target Time 0. */
|
||||
#define IGC_TSAUXC_EN_CLK1 BIT(5) /* Enable Configurable Frequency Clock 1. */
|
||||
#define IGC_TSAUXC_ST1 BIT(7) /* Start Clock 1 Toggle on Target Time 1. */
|
||||
#define IGC_TSAUXC_EN_TS0 BIT(8) /* Enable hardware timestamp 0. */
|
||||
#define IGC_TSAUXC_AUTT0 BIT(9) /* Auxiliary Timestamp Taken. */
|
||||
#define IGC_TSAUXC_EN_TS1 BIT(10) /* Enable hardware timestamp 0. */
|
||||
|
@ -322,7 +322,7 @@ static int igc_ptp_feature_enable_i225(struct ptp_clock_info *ptp,
|
||||
ts = ns_to_timespec64(ns);
|
||||
if (rq->perout.index == 1) {
|
||||
if (use_freq) {
|
||||
tsauxc_mask = IGC_TSAUXC_EN_CLK1;
|
||||
tsauxc_mask = IGC_TSAUXC_EN_CLK1 | IGC_TSAUXC_ST1;
|
||||
tsim_mask = 0;
|
||||
} else {
|
||||
tsauxc_mask = IGC_TSAUXC_EN_TT1;
|
||||
@ -333,7 +333,7 @@ static int igc_ptp_feature_enable_i225(struct ptp_clock_info *ptp,
|
||||
freqout = IGC_FREQOUT1;
|
||||
} else {
|
||||
if (use_freq) {
|
||||
tsauxc_mask = IGC_TSAUXC_EN_CLK0;
|
||||
tsauxc_mask = IGC_TSAUXC_EN_CLK0 | IGC_TSAUXC_ST0;
|
||||
tsim_mask = 0;
|
||||
} else {
|
||||
tsauxc_mask = IGC_TSAUXC_EN_TT0;
|
||||
@ -347,10 +347,12 @@ static int igc_ptp_feature_enable_i225(struct ptp_clock_info *ptp,
|
||||
tsauxc = rd32(IGC_TSAUXC);
|
||||
tsim = rd32(IGC_TSIM);
|
||||
if (rq->perout.index == 1) {
|
||||
tsauxc &= ~(IGC_TSAUXC_EN_TT1 | IGC_TSAUXC_EN_CLK1);
|
||||
tsauxc &= ~(IGC_TSAUXC_EN_TT1 | IGC_TSAUXC_EN_CLK1 |
|
||||
IGC_TSAUXC_ST1);
|
||||
tsim &= ~IGC_TSICR_TT1;
|
||||
} else {
|
||||
tsauxc &= ~(IGC_TSAUXC_EN_TT0 | IGC_TSAUXC_EN_CLK0);
|
||||
tsauxc &= ~(IGC_TSAUXC_EN_TT0 | IGC_TSAUXC_EN_CLK0 |
|
||||
IGC_TSAUXC_ST0);
|
||||
tsim &= ~IGC_TSICR_TT0;
|
||||
}
|
||||
if (on) {
|
||||
|
@ -855,9 +855,11 @@ static struct pci_dev *ixgbe_get_first_secondary_devfn(unsigned int devfn)
|
||||
rp_pdev = pci_get_domain_bus_and_slot(0, 0, devfn);
|
||||
if (rp_pdev && rp_pdev->subordinate) {
|
||||
bus = rp_pdev->subordinate->number;
|
||||
pci_dev_put(rp_pdev);
|
||||
return pci_get_domain_bus_and_slot(0, bus, 0);
|
||||
}
|
||||
|
||||
pci_dev_put(rp_pdev);
|
||||
return NULL;
|
||||
}
|
||||
|
||||
@ -874,6 +876,7 @@ static bool ixgbe_x550em_a_has_mii(struct ixgbe_hw *hw)
|
||||
struct ixgbe_adapter *adapter = hw->back;
|
||||
struct pci_dev *pdev = adapter->pdev;
|
||||
struct pci_dev *func0_pdev;
|
||||
bool has_mii = false;
|
||||
|
||||
/* For the C3000 family of SoCs (x550em_a) the internal ixgbe devices
|
||||
* are always downstream of root ports @ 0000:00:16.0 & 0000:00:17.0
|
||||
@ -884,15 +887,16 @@ static bool ixgbe_x550em_a_has_mii(struct ixgbe_hw *hw)
|
||||
func0_pdev = ixgbe_get_first_secondary_devfn(PCI_DEVFN(0x16, 0));
|
||||
if (func0_pdev) {
|
||||
if (func0_pdev == pdev)
|
||||
return true;
|
||||
else
|
||||
return false;
|
||||
has_mii = true;
|
||||
goto out;
|
||||
}
|
||||
func0_pdev = ixgbe_get_first_secondary_devfn(PCI_DEVFN(0x17, 0));
|
||||
if (func0_pdev == pdev)
|
||||
return true;
|
||||
has_mii = true;
|
||||
|
||||
return false;
|
||||
out:
|
||||
pci_dev_put(func0_pdev);
|
||||
return has_mii;
|
||||
}
|
||||
|
||||
/**
|
||||
|
Loading…
Reference in New Issue
Block a user