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omap1: Fix sched_clock for the MPU timer
Otherwise systems using the MPU timer will hang. Signed-off-by: Tony Lindgren <tony@atomide.com>
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@ -44,11 +44,14 @@
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#include <linux/clocksource.h>
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#include <linux/clockchips.h>
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#include <linux/io.h>
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#include <linux/sched.h>
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#include <asm/system.h>
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#include <mach/hardware.h>
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#include <asm/leds.h>
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#include <asm/irq.h>
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#include <asm/sched_clock.h>
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#include <asm/mach/irq.h>
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#include <asm/mach/time.h>
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@ -67,7 +70,7 @@ typedef struct {
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((volatile omap_mpu_timer_regs_t*)OMAP1_IO_ADDRESS(OMAP_MPU_TIMER_BASE + \
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(n)*OMAP_MPU_TIMER_OFFSET))
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static inline unsigned long omap_mpu_timer_read(int nr)
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static inline unsigned long notrace omap_mpu_timer_read(int nr)
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{
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volatile omap_mpu_timer_regs_t* timer = omap_mpu_timer_base(nr);
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return timer->read_tim;
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@ -212,6 +215,14 @@ static struct clocksource clocksource_mpu = {
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.flags = CLOCK_SOURCE_IS_CONTINUOUS,
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};
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static DEFINE_CLOCK_DATA(cd);
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static void notrace mpu_update_sched_clock(void)
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{
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u32 cyc = mpu_read(&clocksource_mpu);
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update_sched_clock(&cd, cyc, (u32)~0);
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}
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static void __init omap_init_clocksource(unsigned long rate)
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{
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static char err[] __initdata = KERN_ERR
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@ -219,6 +230,7 @@ static void __init omap_init_clocksource(unsigned long rate)
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setup_irq(INT_TIMER2, &omap_mpu_timer2_irq);
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omap_mpu_timer_start(1, ~0, 1);
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init_sched_clock(&cd, mpu_update_sched_clock, 32, rate);
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if (clocksource_register_hz(&clocksource_mpu, rate))
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printk(err, clocksource_mpu.name);
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