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ALSA: cs35l41: Poll for Power Up/Down rather than waiting a fixed delay
To ensure the chip has correctly powered up or down before continuing, the driver will now poll a register, rather than wait a fixed delay. Acked-by: Mark Brown <broonie@kernel.org> Signed-off-by: Stefan Binding <sbinding@opensource.cirrus.com> Link: https://lore.kernel.org/r/20230721151816.2080453-3-sbinding@opensource.cirrus.com Signed-off-by: Takashi Iwai <tiwai@suse.de>
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@ -1196,7 +1196,8 @@ int cs35l41_global_enable(struct device *dev, struct regmap *regmap, enum cs35l4
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int enable, struct completion *pll_lock, bool firmware_running)
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{
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int ret;
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unsigned int gpio1_func, pad_control, pwr_ctrl1, pwr_ctrl3, int_status;
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unsigned int gpio1_func, pad_control, pwr_ctrl1, pwr_ctrl3, int_status, pup_pdn_mask;
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unsigned int pwr_ctl1_val;
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struct reg_sequence cs35l41_mdsync_down_seq[] = {
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{CS35L41_PWR_CTRL3, 0},
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{CS35L41_GPIO_PAD_CONTROL, 0},
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@ -1208,6 +1209,12 @@ int cs35l41_global_enable(struct device *dev, struct regmap *regmap, enum cs35l4
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{CS35L41_PWR_CTRL1, 0x00000001, 3000},
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};
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pup_pdn_mask = enable ? CS35L41_PUP_DONE_MASK : CS35L41_PDN_DONE_MASK;
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ret = regmap_read(regmap, CS35L41_PWR_CTRL1, &pwr_ctl1_val);
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if (ret)
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return ret;
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if ((pwr_ctl1_val & CS35L41_GLOBAL_EN_MASK) && enable) {
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dev_dbg(dev, "Cannot set Global Enable - already set.\n");
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return 0;
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@ -1252,6 +1259,15 @@ int cs35l41_global_enable(struct device *dev, struct regmap *regmap, enum cs35l4
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ret = regmap_multi_reg_write(regmap, cs35l41_mdsync_up_seq,
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ARRAY_SIZE(cs35l41_mdsync_up_seq));
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}
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ret = regmap_read_poll_timeout(regmap, CS35L41_IRQ1_STATUS1,
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int_status, int_status & pup_pdn_mask,
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1000, 100000);
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if (ret)
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dev_err(dev, "Enable(%d) failed: %d\n", enable, ret);
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// Clear PUP/PDN status
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regmap_write(regmap, CS35L41_IRQ1_STATUS1, pup_pdn_mask);
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break;
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case CS35L41_INT_BOOST:
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ret = regmap_update_bits(regmap, CS35L41_PWR_CTRL1, CS35L41_GLOBAL_EN_MASK,
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@ -1260,7 +1276,15 @@ int cs35l41_global_enable(struct device *dev, struct regmap *regmap, enum cs35l4
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dev_err(dev, "CS35L41_PWR_CTRL1 set failed: %d\n", ret);
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return ret;
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}
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usleep_range(3000, 3100);
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ret = regmap_read_poll_timeout(regmap, CS35L41_IRQ1_STATUS1,
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int_status, int_status & pup_pdn_mask,
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1000, 100000);
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if (ret)
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dev_err(dev, "Enable(%d) failed: %d\n", enable, ret);
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/* Clear PUP/PDN status */
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regmap_write(regmap, CS35L41_IRQ1_STATUS1, pup_pdn_mask);
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break;
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case CS35L41_EXT_BOOST:
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case CS35L41_EXT_BOOST_NO_VSPK_SWITCH:
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@ -1271,7 +1295,15 @@ int cs35l41_global_enable(struct device *dev, struct regmap *regmap, enum cs35l4
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if (ret)
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return ret;
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usleep_range(3000, 3100);
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ret = regmap_read_poll_timeout(regmap, CS35L41_IRQ1_STATUS1, int_status,
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int_status & CS35L41_PUP_DONE_MASK, 1000, 100000);
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if (ret) {
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dev_err(dev, "Failed waiting for CS35L41_PUP_DONE_MASK: %d\n", ret);
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/* Lock the test key, it was unlocked during the multi_reg_write */
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cs35l41_test_key_lock(dev, regmap);
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return ret;
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}
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regmap_write(regmap, CS35L41_IRQ1_STATUS1, CS35L41_PUP_DONE_MASK);
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if (firmware_running)
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ret = cs35l41_set_cspl_mbox_cmd(dev, regmap,
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@ -1292,7 +1324,15 @@ int cs35l41_global_enable(struct device *dev, struct regmap *regmap, enum cs35l4
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return ret;
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}
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usleep_range(3000, 3100);
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ret = regmap_read_poll_timeout(regmap, CS35L41_IRQ1_STATUS1, int_status,
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int_status & CS35L41_PDN_DONE_MASK, 1000, 100000);
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if (ret) {
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dev_err(dev, "Failed waiting for CS35L41_PDN_DONE_MASK: %d\n", ret);
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/* Lock the test key, it was unlocked during the multi_reg_write */
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cs35l41_test_key_lock(dev, regmap);
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return ret;
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}
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regmap_write(regmap, CS35L41_IRQ1_STATUS1, CS35L41_PDN_DONE_MASK);
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/* Test Key is locked here */
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ret = regmap_multi_reg_write(regmap, cs35l41_active_to_safe_end,
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@ -491,7 +491,6 @@ static int cs35l41_main_amp_event(struct snd_soc_dapm_widget *w,
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{
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struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
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struct cs35l41_private *cs35l41 = snd_soc_component_get_drvdata(component);
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unsigned int val;
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int ret = 0;
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switch (event) {
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@ -507,15 +506,6 @@ static int cs35l41_main_amp_event(struct snd_soc_dapm_widget *w,
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ret = cs35l41_global_enable(cs35l41->dev, cs35l41->regmap, cs35l41->hw_cfg.bst_type,
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0, &cs35l41->pll_lock, cs35l41->dsp.cs_dsp.running);
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ret = regmap_read_poll_timeout(cs35l41->regmap, CS35L41_IRQ1_STATUS1,
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val, val & CS35L41_PDN_DONE_MASK,
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1000, 100000);
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if (ret)
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dev_warn(cs35l41->dev, "PDN failed: %d\n", ret);
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regmap_write(cs35l41->regmap, CS35L41_IRQ1_STATUS1,
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CS35L41_PDN_DONE_MASK);
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regmap_multi_reg_write_bypassed(cs35l41->regmap,
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cs35l41_pdn_patch,
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ARRAY_SIZE(cs35l41_pdn_patch));
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