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ARM: configs: qcom_defconfig: Enable SDX55 A7 PLL and APCS clock driver
Enable A7 PLL driver and APCS clock driver on SDX55 platform. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/20210408170930.91834-3-manivannan.sadhasivam@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
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@ -215,6 +215,8 @@ CONFIG_DMADEVICES=y
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CONFIG_QCOM_BAM_DMA=y
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CONFIG_STAGING=y
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CONFIG_COMMON_CLK_QCOM=y
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CONFIG_QCOM_A7PLL=y
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CONFIG_QCOM_CLK_APCS_SDX55=y
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CONFIG_QCOM_CLK_RPM=y
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CONFIG_QCOM_CLK_RPMH=y
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CONFIG_QCOM_CLK_SMD_RPM=y
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