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Merge branch 'master' into mm-hotfixes-stable

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This commit is contained in:
Andrew Morton 2024-01-17 12:58:28 -08:00
commit fe33c0fbed
7169 changed files with 423929 additions and 196846 deletions
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92
.clang-format
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@ -82,11 +82,16 @@ ForEachMacros:
- '__for_each_thread'
- '__hlist_for_each_rcu'
- '__map__for_each_symbol_by_name'
- '__pci_bus_for_each_res0'
- '__pci_bus_for_each_res1'
- '__pci_dev_for_each_res0'
- '__pci_dev_for_each_res1'
- '__perf_evlist__for_each_entry'
- '__perf_evlist__for_each_entry_reverse'
- '__perf_evlist__for_each_entry_safe'
- '__rq_for_each_bio'
- '__shost_for_each_device'
- '__sym_for_each'
- 'apei_estatus_for_each_section'
- 'ata_for_each_dev'
- 'ata_for_each_link'
@ -105,13 +110,12 @@ ForEachMacros:
- 'bip_for_each_vec'
- 'bond_for_each_slave'
- 'bond_for_each_slave_rcu'
- 'bpf__perf_for_each_map'
- 'bpf__perf_for_each_map_named'
- 'bpf_for_each'
- 'bpf_for_each_reg_in_vstate'
- 'bpf_for_each_reg_in_vstate_mask'
- 'bpf_for_each_spilled_reg'
- 'bpf_object__for_each_map'
- 'bpf_object__for_each_program'
- 'bpf_object__for_each_safe'
- 'bpf_perf_object__for_each'
- 'btree_for_each_safe128'
- 'btree_for_each_safe32'
- 'btree_for_each_safe64'
@ -119,6 +123,7 @@ ForEachMacros:
- 'card_for_each_dev'
- 'cgroup_taskset_for_each'
- 'cgroup_taskset_for_each_leader'
- 'cpu_aggr_map__for_each_idx'
- 'cpufreq_for_each_efficient_entry_idx'
- 'cpufreq_for_each_entry'
- 'cpufreq_for_each_entry_idx'
@ -128,11 +133,14 @@ ForEachMacros:
- 'css_for_each_descendant_post'
- 'css_for_each_descendant_pre'
- 'damon_for_each_region'
- 'damon_for_each_region_from'
- 'damon_for_each_region_safe'
- 'damon_for_each_scheme'
- 'damon_for_each_scheme_safe'
- 'damon_for_each_target'
- 'damon_for_each_target_safe'
- 'damos_for_each_filter'
- 'damos_for_each_filter_safe'
- 'data__for_each_file'
- 'data__for_each_file_new'
- 'data__for_each_file_start'
@ -151,6 +159,8 @@ ForEachMacros:
- 'drm_client_for_each_connector_iter'
- 'drm_client_for_each_modeset'
- 'drm_connector_for_each_possible_encoder'
- 'drm_exec_for_each_locked_object'
- 'drm_exec_for_each_locked_object_reverse'
- 'drm_for_each_bridge_in_chain'
- 'drm_for_each_connector_iter'
- 'drm_for_each_crtc'
@ -162,22 +172,32 @@ ForEachMacros:
- 'drm_for_each_plane'
- 'drm_for_each_plane_mask'
- 'drm_for_each_privobj'
- 'drm_gem_for_each_gpuva'
- 'drm_gem_for_each_gpuva_safe'
- 'drm_gpuva_for_each_op'
- 'drm_gpuva_for_each_op_from_reverse'
- 'drm_gpuva_for_each_op_safe'
- 'drm_gpuvm_for_each_va'
- 'drm_gpuvm_for_each_va_range'
- 'drm_gpuvm_for_each_va_range_safe'
- 'drm_gpuvm_for_each_va_safe'
- 'drm_mm_for_each_hole'
- 'drm_mm_for_each_node'
- 'drm_mm_for_each_node_in_range'
- 'drm_mm_for_each_node_safe'
- 'dsa_switch_for_each_available_port'
- 'dsa_switch_for_each_cpu_port'
- 'dsa_switch_for_each_cpu_port_continue_reverse'
- 'dsa_switch_for_each_port'
- 'dsa_switch_for_each_port_continue_reverse'
- 'dsa_switch_for_each_port_safe'
- 'dsa_switch_for_each_user_port'
- 'dsa_tree_for_each_cpu_port'
- 'dsa_tree_for_each_user_port'
- 'dsa_tree_for_each_user_port_continue_reverse'
- 'dso__for_each_symbol'
- 'dsos__for_each_with_build_id'
- 'elf_hash_for_each_possible'
- 'elf_section__for_each_rel'
- 'elf_section__for_each_rela'
- 'elf_symtab__for_each_symbol'
- 'evlist__for_each_cpu'
- 'evlist__for_each_entry'
@ -186,12 +206,15 @@ ForEachMacros:
- 'evlist__for_each_entry_reverse'
- 'evlist__for_each_entry_safe'
- 'flow_action_for_each'
- 'for_each_acpi_consumer_dev'
- 'for_each_acpi_dev_match'
- 'for_each_active_dev_scope'
- 'for_each_active_drhd_unit'
- 'for_each_active_iommu'
- 'for_each_active_route'
- 'for_each_aggr_pgid'
- 'for_each_and_bit'
- 'for_each_andnot_bit'
- 'for_each_available_child_of_node'
- 'for_each_bench'
- 'for_each_bio'
@ -222,10 +245,13 @@ ForEachMacros:
- 'for_each_compatible_node'
- 'for_each_component_dais'
- 'for_each_component_dais_safe'
- 'for_each_conduit'
- 'for_each_console'
- 'for_each_console_srcu'
- 'for_each_cpu'
- 'for_each_cpu_and'
- 'for_each_cpu_andnot'
- 'for_each_cpu_or'
- 'for_each_cpu_wrap'
- 'for_each_dapm_widgets'
- 'for_each_dedup_cand'
@ -254,9 +280,11 @@ ForEachMacros:
- 'for_each_free_mem_range'
- 'for_each_free_mem_range_reverse'
- 'for_each_func_rsrc'
- 'for_each_group_device'
- 'for_each_gpiochip_node'
- 'for_each_group_evsel'
- 'for_each_group_evsel_head'
- 'for_each_group_member'
- 'for_each_group_member_head'
- 'for_each_hstate'
- 'for_each_if'
- 'for_each_inject_fn'
@ -273,6 +301,7 @@ ForEachMacros:
- 'for_each_lru'
- 'for_each_matching_node'
- 'for_each_matching_node_and_match'
- 'for_each_media_entity_data_link'
- 'for_each_mem_pfn_range'
- 'for_each_mem_range'
- 'for_each_mem_range_rev'
@ -281,6 +310,8 @@ ForEachMacros:
- 'for_each_memory'
- 'for_each_migratetype_order'
- 'for_each_missing_reg'
- 'for_each_mle_subelement'
- 'for_each_mod_mem_type'
- 'for_each_net'
- 'for_each_net_continue_reverse'
- 'for_each_net_rcu'
@ -288,6 +319,7 @@ ForEachMacros:
- 'for_each_netdev_continue'
- 'for_each_netdev_continue_rcu'
- 'for_each_netdev_continue_reverse'
- 'for_each_netdev_dump'
- 'for_each_netdev_feature'
- 'for_each_netdev_in_bond_rcu'
- 'for_each_netdev_rcu'
@ -308,6 +340,7 @@ ForEachMacros:
- 'for_each_node_with_cpus'
- 'for_each_node_with_property'
- 'for_each_nonreserved_multicast_dest_pgid'
- 'for_each_numa_hop_mask'
- 'for_each_of_allnodes'
- 'for_each_of_allnodes_from'
- 'for_each_of_cpu_node'
@ -326,6 +359,7 @@ ForEachMacros:
- 'for_each_online_cpu'
- 'for_each_online_node'
- 'for_each_online_pgdat'
- 'for_each_or_bit'
- 'for_each_path'
- 'for_each_pci_bridge'
- 'for_each_pci_dev'
@ -333,6 +367,7 @@ ForEachMacros:
- 'for_each_physmem_range'
- 'for_each_populated_zone'
- 'for_each_possible_cpu'
- 'for_each_present_blessed_reg'
- 'for_each_present_cpu'
- 'for_each_prime_number'
- 'for_each_prime_number_from'
@ -348,7 +383,8 @@ ForEachMacros:
- 'for_each_property_of_node'
- 'for_each_reg'
- 'for_each_reg_filtered'
- 'for_each_registered_fb'
- 'for_each_reloc'
- 'for_each_reloc_from'
- 'for_each_requested_gpio'
- 'for_each_requested_gpio_in_range'
- 'for_each_reserved_mem_range'
@ -357,10 +393,12 @@ ForEachMacros:
- 'for_each_rtd_components'
- 'for_each_rtd_cpu_dais'
- 'for_each_rtd_dais'
- 'for_each_sband_iftype_data'
- 'for_each_script'
- 'for_each_sec'
- 'for_each_set_bit'
- 'for_each_set_bit_from'
- 'for_each_set_bit_wrap'
- 'for_each_set_bitrange'
- 'for_each_set_bitrange_from'
- 'for_each_set_clump8'
@ -371,8 +409,8 @@ ForEachMacros:
- 'for_each_sgtable_dma_sg'
- 'for_each_sgtable_page'
- 'for_each_sgtable_sg'
- 'for_each_shell_test'
- 'for_each_sibling_event'
- 'for_each_sta_active_link'
- 'for_each_subelement'
- 'for_each_subelement_extid'
- 'for_each_subelement_id'
@ -380,10 +418,15 @@ ForEachMacros:
- 'for_each_subsystem'
- 'for_each_supported_activate_fn'
- 'for_each_supported_inject_fn'
- 'for_each_sym'
- 'for_each_test'
- 'for_each_thread'
- 'for_each_token'
- 'for_each_unicast_dest_pgid'
- 'for_each_valid_link'
- 'for_each_vif_active_link'
- 'for_each_vma'
- 'for_each_vma_range'
- 'for_each_vsi'
- 'for_each_wakeup_source'
- 'for_each_zone'
@ -392,10 +435,12 @@ ForEachMacros:
- 'func_for_each_insn'
- 'fwnode_for_each_available_child_node'
- 'fwnode_for_each_child_node'
- 'fwnode_for_each_parent_node'
- 'fwnode_graph_for_each_endpoint'
- 'gadget_for_each_ep'
- 'genradix_for_each'
- 'genradix_for_each_from'
- 'genradix_for_each_reverse'
- 'hash_for_each'
- 'hash_for_each_possible'
- 'hash_for_each_possible_rcu'
@ -439,14 +484,9 @@ ForEachMacros:
- 'in_dev_for_each_ifa_rcu'
- 'in_dev_for_each_ifa_rtnl'
- 'inet_bind_bucket_for_each'
- 'inet_lhash2_for_each_icsk'
- 'inet_lhash2_for_each_icsk_continue'
- 'inet_lhash2_for_each_icsk_rcu'
- 'interval_tree_for_each_double_span'
- 'interval_tree_for_each_span'
- 'intlist__for_each_entry'
- 'intlist__for_each_entry_safe'
- 'iopt_for_each_contig_area'
- 'kcore_copy__for_each_phdr'
- 'key_for_each'
- 'key_for_each_safe'
@ -483,28 +523,38 @@ ForEachMacros:
- 'list_for_each_from'
- 'list_for_each_prev'
- 'list_for_each_prev_safe'
- 'list_for_each_rcu'
- 'list_for_each_reverse'
- 'list_for_each_safe'
- 'llist_for_each'
- 'llist_for_each_entry'
- 'llist_for_each_entry_safe'
- 'llist_for_each_safe'
- 'lwq_for_each_safe'
- 'map__for_each_symbol'
- 'map__for_each_symbol_by_name'
- 'map_for_each_event'
- 'map_for_each_metric'
- 'maps__for_each_entry'
- 'maps__for_each_entry_safe'
- 'mas_for_each'
- 'mci_for_each_dimm'
- 'media_device_for_each_entity'
- 'media_device_for_each_intf'
- 'media_device_for_each_link'
- 'media_device_for_each_pad'
- 'media_entity_for_each_pad'
- 'media_pipeline_for_each_entity'
- 'media_pipeline_for_each_pad'
- 'mlx5_lag_for_each_peer_mdev'
- 'msi_domain_for_each_desc'
- 'msi_for_each_desc'
- 'mt_for_each'
- 'nanddev_io_for_each_page'
- 'netdev_for_each_lower_dev'
- 'netdev_for_each_lower_private'
- 'netdev_for_each_lower_private_rcu'
- 'netdev_for_each_mc_addr'
- 'netdev_for_each_synced_mc_addr'
- 'netdev_for_each_synced_uc_addr'
- 'netdev_for_each_uc_addr'
- 'netdev_for_each_upper_dev_rcu'
- 'netdev_hw_addr_list_for_each'
@ -529,6 +579,7 @@ ForEachMacros:
- 'perf_config_sections__for_each_entry'
- 'perf_config_set__for_each_entry'
- 'perf_cpu_map__for_each_cpu'
- 'perf_cpu_map__for_each_idx'
- 'perf_evlist__for_each_entry'
- 'perf_evlist__for_each_entry_reverse'
- 'perf_evlist__for_each_entry_safe'
@ -538,9 +589,7 @@ ForEachMacros:
- 'perf_hpp_list__for_each_format_safe'
- 'perf_hpp_list__for_each_sort_list'
- 'perf_hpp_list__for_each_sort_list_safe'
- 'perf_pmu__for_each_hybrid_pmu'
- 'ping_portaddr_for_each_entry'
- 'ping_portaddr_for_each_entry_rcu'
- 'perf_tool_event__for_each_event'
- 'plist_for_each'
- 'plist_for_each_continue'
- 'plist_for_each_entry'
@ -577,6 +626,7 @@ ForEachMacros:
- 'rq_for_each_segment'
- 'rq_list_for_each'
- 'rq_list_for_each_safe'
- 'sample_read_group__for_each'
- 'scsi_for_each_prot_sg'
- 'scsi_for_each_sg'
- 'sctp_for_each_hentry'
@ -584,10 +634,12 @@ ForEachMacros:
- 'sec_for_each_insn'
- 'sec_for_each_insn_continue'
- 'sec_for_each_insn_from'
- 'sec_for_each_sym'
- 'shdma_for_each_chan'
- 'shost_for_each_device'
- 'sk_for_each'
- 'sk_for_each_bound'
- 'sk_for_each_bound_bhash2'
- 'sk_for_each_entry_offset_rcu'
- 'sk_for_each_from'
- 'sk_for_each_rcu'
@ -609,6 +661,8 @@ ForEachMacros:
- 'tb_property_for_each'
- 'tcf_act_for_each_action'
- 'tcf_exts_for_each_action'
- 'ttm_resource_manager_for_each_res'
- 'twsk_for_each_bound_bhash2'
- 'udp_portaddr_for_each_entry'
- 'udp_portaddr_for_each_entry_rcu'
- 'usb_hub_for_each_child'

3
.mailmap
View File

@ -611,6 +611,9 @@ Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Uwe Kleine-König <ukleinek@strlen.de>
Uwe Kleine-König <ukl@pengutronix.de>
Uwe Kleine-König <Uwe.Kleine-Koenig@digi.com>
Vadim Fedorenko <vadim.fedorenko@linux.dev> <vadfed@fb.com>
Vadim Fedorenko <vadim.fedorenko@linux.dev> <vadfed@meta.com>
Vadim Fedorenko <vadim.fedorenko@linux.dev> <vfedorenko@novek.ru>
Valdis Kletnieks <Valdis.Kletnieks@vt.edu>
Vara Reddy <quic_varar@quicinc.com> <varar@codeaurora.org>
Varadarajan Narayanan <quic_varada@quicinc.com> <varada@codeaurora.org>

11
CREDITS
View File

@ -1424,6 +1424,10 @@ S: University of Stellenbosch
S: Stellenbosch, Western Cape
S: South Africa
N: Andy Gross
E: agross@kernel.org
D: Qualcomm SoC subsystem and drivers
N: Grant Grundler
E: grantgrundler@gmail.com
W: http://obmouse.sourceforge.net/
@ -1831,6 +1835,13 @@ S: K osmidomkum 723
S: 160 00 Praha 6
S: Czech Republic
N: Michael Kerrisk
E: mtk.manpages@gmail.com
W: https://man7.org/
P: 4096R/3A35CE5E E522 595B 52ED A4E6 BFCC CB5E 8561 9911 3A35 CE5E
D: Maintainer of the Linux man-pages project
D: Linux man pages online, at <https://man7.org/linux/man-pages/>
N: Niels Kristian Bech Jensen
E: nkbj1970@hotmail.com
D: Miscellaneous kernel updates and fixes.

72
Documentation/ABI/testing/debugfs-driver-habanalabs
View File

@ -1,4 +1,4 @@
What: /sys/kernel/debug/accel/<n>/addr
What: /sys/kernel/debug/accel/<parent_device>/addr
Date: Jan 2019
KernelVersion: 5.1
Contact: ogabbay@kernel.org
@ -8,34 +8,34 @@ Description: Sets the device address to be used for read or write through
only when the IOMMU is disabled.
The acceptable value is a string that starts with "0x"
What: /sys/kernel/debug/accel/<n>/clk_gate
What: /sys/kernel/debug/accel/<parent_device>/clk_gate
Date: May 2020
KernelVersion: 5.8
Contact: ogabbay@kernel.org
Description: This setting is now deprecated as clock gating is handled solely by the f/w
What: /sys/kernel/debug/accel/<n>/command_buffers
What: /sys/kernel/debug/accel/<parent_device>/command_buffers
Date: Jan 2019
KernelVersion: 5.1
Contact: ogabbay@kernel.org
Description: Displays a list with information about the currently allocated
command buffers
What: /sys/kernel/debug/accel/<n>/command_submission
What: /sys/kernel/debug/accel/<parent_device>/command_submission
Date: Jan 2019
KernelVersion: 5.1
Contact: ogabbay@kernel.org
Description: Displays a list with information about the currently active
command submissions
What: /sys/kernel/debug/accel/<n>/command_submission_jobs
What: /sys/kernel/debug/accel/<parent_device>/command_submission_jobs
Date: Jan 2019
KernelVersion: 5.1
Contact: ogabbay@kernel.org
Description: Displays a list with detailed information about each JOB (CB) of
each active command submission
What: /sys/kernel/debug/accel/<n>/data32
What: /sys/kernel/debug/accel/<parent_device>/data32
Date: Jan 2019
KernelVersion: 5.1
Contact: ogabbay@kernel.org
@ -50,7 +50,7 @@ Description: Allows the root user to read or write directly through the
If the IOMMU is disabled, it also allows the root user to read
or write from the host a device VA of a host mapped memory
What: /sys/kernel/debug/accel/<n>/data64
What: /sys/kernel/debug/accel/<parent_device>/data64
Date: Jan 2020
KernelVersion: 5.6
Contact: ogabbay@kernel.org
@ -65,7 +65,7 @@ Description: Allows the root user to read or write 64 bit data directly
If the IOMMU is disabled, it also allows the root user to read
or write from the host a device VA of a host mapped memory
What: /sys/kernel/debug/accel/<n>/data_dma
What: /sys/kernel/debug/accel/<parent_device>/data_dma
Date: Apr 2021
KernelVersion: 5.13
Contact: ogabbay@kernel.org
@ -83,7 +83,7 @@ Description: Allows the root user to read from the device's internal
workloads.
Only supported on GAUDI at this stage.
What: /sys/kernel/debug/accel/<n>/device
What: /sys/kernel/debug/accel/<parent_device>/device
Date: Jan 2019
KernelVersion: 5.1
Contact: ogabbay@kernel.org
@ -91,14 +91,14 @@ Description: Enables the root user to set the device to specific state.
Valid values are "disable", "enable", "suspend", "resume".
User can read this property to see the valid values
What: /sys/kernel/debug/accel/<n>/device_release_watchdog_timeout
What: /sys/kernel/debug/accel/<parent_device>/device_release_watchdog_timeout
Date: Oct 2022
KernelVersion: 6.2
Contact: ttayar@habana.ai
Description: The watchdog timeout value in seconds for a device release upon
certain error cases, after which the device is reset.
What: /sys/kernel/debug/accel/<n>/dma_size
What: /sys/kernel/debug/accel/<parent_device>/dma_size
Date: Apr 2021
KernelVersion: 5.13
Contact: ogabbay@kernel.org
@ -108,7 +108,7 @@ Description: Specify the size of the DMA transaction when using DMA to read
When the write is finished, the user can read the "data_dma"
blob
What: /sys/kernel/debug/accel/<n>/dump_razwi_events
What: /sys/kernel/debug/accel/<parent_device>/dump_razwi_events
Date: Aug 2022
KernelVersion: 5.20
Contact: fkassabri@habana.ai
@ -117,7 +117,7 @@ Description: Dumps all razwi events to dmesg if exist.
the routine will clear the status register.
Usage: cat dump_razwi_events
What: /sys/kernel/debug/accel/<n>/dump_security_violations
What: /sys/kernel/debug/accel/<parent_device>/dump_security_violations
Date: Jan 2021
KernelVersion: 5.12
Contact: ogabbay@kernel.org
@ -125,14 +125,14 @@ Description: Dumps all security violations to dmesg. This will also ack
all security violations meanings those violations will not be
dumped next time user calls this API
What: /sys/kernel/debug/accel/<n>/engines
What: /sys/kernel/debug/accel/<parent_device>/engines
Date: Jul 2019
KernelVersion: 5.3
Contact: ogabbay@kernel.org
Description: Displays the status registers values of the device engines and
their derived idle status
What: /sys/kernel/debug/accel/<n>/i2c_addr
What: /sys/kernel/debug/accel/<parent_device>/i2c_addr
Date: Jan 2019
KernelVersion: 5.1
Contact: ogabbay@kernel.org
@ -140,7 +140,7 @@ Description: Sets I2C device address for I2C transaction that is generated
by the device's CPU, Not available when device is loaded with secured
firmware
What: /sys/kernel/debug/accel/<n>/i2c_bus
What: /sys/kernel/debug/accel/<parent_device>/i2c_bus
Date: Jan 2019
KernelVersion: 5.1
Contact: ogabbay@kernel.org
@ -148,7 +148,7 @@ Description: Sets I2C bus address for I2C transaction that is generated by
the device's CPU, Not available when device is loaded with secured
firmware
What: /sys/kernel/debug/accel/<n>/i2c_data
What: /sys/kernel/debug/accel/<parent_device>/i2c_data
Date: Jan 2019
KernelVersion: 5.1
Contact: ogabbay@kernel.org
@ -157,7 +157,7 @@ Description: Triggers an I2C transaction that is generated by the device's
reading from the file generates a read transaction, Not available
when device is loaded with secured firmware
What: /sys/kernel/debug/accel/<n>/i2c_len
What: /sys/kernel/debug/accel/<parent_device>/i2c_len
Date: Dec 2021
KernelVersion: 5.17
Contact: obitton@habana.ai
@ -165,7 +165,7 @@ Description: Sets I2C length in bytes for I2C transaction that is generated b
the device's CPU, Not available when device is loaded with secured
firmware
What: /sys/kernel/debug/accel/<n>/i2c_reg
What: /sys/kernel/debug/accel/<parent_device>/i2c_reg
Date: Jan 2019
KernelVersion: 5.1
Contact: ogabbay@kernel.org
@ -173,35 +173,35 @@ Description: Sets I2C register id for I2C transaction that is generated by
the device's CPU, Not available when device is loaded with secured
firmware
What: /sys/kernel/debug/accel/<n>/led0
What: /sys/kernel/debug/accel/<parent_device>/led0
Date: Jan 2019
KernelVersion: 5.1
Contact: ogabbay@kernel.org
Description: Sets the state of the first S/W led on the device, Not available
when device is loaded with secured firmware
What: /sys/kernel/debug/accel/<n>/led1
What: /sys/kernel/debug/accel/<parent_device>/led1
Date: Jan 2019
KernelVersion: 5.1
Contact: ogabbay@kernel.org
Description: Sets the state of the second S/W led on the device, Not available
when device is loaded with secured firmware
What: /sys/kernel/debug/accel/<n>/led2
What: /sys/kernel/debug/accel/<parent_device>/led2
Date: Jan 2019
KernelVersion: 5.1
Contact: ogabbay@kernel.org
Description: Sets the state of the third S/W led on the device, Not available
when device is loaded with secured firmware
What: /sys/kernel/debug/accel/<n>/memory_scrub
What: /sys/kernel/debug/accel/<parent_device>/memory_scrub
Date: May 2022
KernelVersion: 5.19
Contact: dhirschfeld@habana.ai
Description: Allows the root user to scrub the dram memory. The scrubbing
value can be set using the debugfs file memory_scrub_val.
What: /sys/kernel/debug/accel/<n>/memory_scrub_val
What: /sys/kernel/debug/accel/<parent_device>/memory_scrub_val
Date: May 2022
KernelVersion: 5.19
Contact: dhirschfeld@habana.ai
@ -209,7 +209,7 @@ Description: The value to which the dram will be set to when the user
scrubs the dram using 'memory_scrub' debugfs file and
the scrubbing value when using module param 'memory_scrub'
What: /sys/kernel/debug/accel/<n>/mmu
What: /sys/kernel/debug/accel/<parent_device>/mmu
Date: Jan 2019
KernelVersion: 5.1
Contact: ogabbay@kernel.org
@ -219,7 +219,7 @@ Description: Displays the hop values and physical address for a given ASID
e.g. to display info about VA 0x1000 for ASID 1 you need to do:
echo "1 0x1000" > /sys/kernel/debug/accel/0/mmu
What: /sys/kernel/debug/accel/<n>/mmu_error
What: /sys/kernel/debug/accel/<parent_device>/mmu_error
Date: Mar 2021
KernelVersion: 5.12
Contact: fkassabri@habana.ai
@ -229,7 +229,7 @@ Description: Check and display page fault or access violation mmu errors for
echo "0x200" > /sys/kernel/debug/accel/0/mmu_error
cat /sys/kernel/debug/accel/0/mmu_error
What: /sys/kernel/debug/accel/<n>/monitor_dump
What: /sys/kernel/debug/accel/<parent_device>/monitor_dump
Date: Mar 2022
KernelVersion: 5.19
Contact: osharabi@habana.ai
@ -243,7 +243,7 @@ Description: Allows the root user to dump monitors status from the device's
This interface doesn't support concurrency in the same device.
Only supported on GAUDI.
What: /sys/kernel/debug/accel/<n>/monitor_dump_trig
What: /sys/kernel/debug/accel/<parent_device>/monitor_dump_trig
Date: Mar 2022
KernelVersion: 5.19
Contact: osharabi@habana.ai
@ -253,14 +253,14 @@ Description: Triggers dump of monitor data. The value to trigger the operatio
When the write is finished, the user can read the "monitor_dump"
blob
What: /sys/kernel/debug/accel/<n>/set_power_state
What: /sys/kernel/debug/accel/<parent_device>/set_power_state
Date: Jan 2019
KernelVersion: 5.1
Contact: ogabbay@kernel.org
Description: Sets the PCI power state. Valid values are "1" for D0 and "2"
for D3Hot
What: /sys/kernel/debug/accel/<n>/skip_reset_on_timeout
What: /sys/kernel/debug/accel/<parent_device>/skip_reset_on_timeout
Date: Jun 2021
KernelVersion: 5.13
Contact: ynudelman@habana.ai
@ -268,7 +268,7 @@ Description: Sets the skip reset on timeout option for the device. Value of
"0" means device will be reset in case some CS has timed out,
otherwise it will not be reset.
What: /sys/kernel/debug/accel/<n>/state_dump
What: /sys/kernel/debug/accel/<parent_device>/state_dump
Date: Oct 2021
KernelVersion: 5.15
Contact: ynudelman@habana.ai
@ -279,7 +279,7 @@ Description: Gets the state dump occurring on a CS timeout or failure.
Writing an integer X discards X state dumps, so that the
next read would return X+1-st newest state dump.
What: /sys/kernel/debug/accel/<n>/stop_on_err
What: /sys/kernel/debug/accel/<parent_device>/stop_on_err
Date: Mar 2020
KernelVersion: 5.6
Contact: ogabbay@kernel.org
@ -287,13 +287,13 @@ Description: Sets the stop-on_error option for the device engines. Value of
"0" is for disable, otherwise enable.
Relevant only for GOYA and GAUDI.
What: /sys/kernel/debug/accel/<n>/timeout_locked
What: /sys/kernel/debug/accel/<parent_device>/timeout_locked
Date: Sep 2021
KernelVersion: 5.16
Contact: obitton@habana.ai
Description: Sets the command submission timeout value in seconds.
What: /sys/kernel/debug/accel/<n>/userptr
What: /sys/kernel/debug/accel/<parent_device>/userptr
Date: Jan 2019
KernelVersion: 5.1
Contact: ogabbay@kernel.org
@ -301,7 +301,7 @@ Description: Displays a list with information about the current user
pointers (user virtual addresses) that are pinned and mapped
to DMA addresses
What: /sys/kernel/debug/accel/<n>/userptr_lookup
What: /sys/kernel/debug/accel/<parent_device>/userptr_lookup
Date: Oct 2021
KernelVersion: 5.15
Contact: ogabbay@kernel.org
@ -309,7 +309,7 @@ Description: Allows to search for specific user pointers (user virtual
addresses) that are pinned and mapped to DMA addresses, and see
their resolution to the specific dma address.
What: /sys/kernel/debug/accel/<n>/vm
What: /sys/kernel/debug/accel/<parent_device>/vm
Date: Jan 2019
KernelVersion: 5.1
Contact: ogabbay@kernel.org

228
Documentation/ABI/testing/debugfs-driver-qat_telemetry Normal file
View File

@ -0,0 +1,228 @@
What: /sys/kernel/debug/qat_<device>_<BDF>/telemetry/control
Date: March 2024
KernelVersion: 6.8
Contact: qat-linux@intel.com
Description: (RW) Enables/disables the reporting of telemetry metrics.
Allowed values to write:
========================
* 0: disable telemetry
* 1: enable telemetry
* 2, 3, 4: enable telemetry and calculate minimum, maximum
and average for each counter over 2, 3 or 4 samples
Returned values:
================
* 1-4: telemetry is enabled and running
* 0: telemetry is disabled
Example.
Writing '3' to this file starts the collection of
telemetry metrics. Samples are collected every second and
stored in a circular buffer of size 3. These values are then
used to calculate the minimum, maximum and average for each
counter. After enabling, counters can be retrieved through
the ``device_data`` file::
echo 3 > /sys/kernel/debug/qat_4xxx_0000:6b:00.0/telemetry/control
Writing '0' to this file stops the collection of telemetry
metrics::
echo 0 > /sys/kernel/debug/qat_4xxx_0000:6b:00.0/telemetry/control
This attribute is only available for qat_4xxx devices.
What: /sys/kernel/debug/qat_<device>_<BDF>/telemetry/device_data
Date: March 2024
KernelVersion: 6.8
Contact: qat-linux@intel.com
Description: (RO) Reports device telemetry counters.
Reads report metrics about performance and utilization of
a QAT device:
======================= ========================================
Field Description
======================= ========================================
sample_cnt number of acquisitions of telemetry data
from the device. Reads are performed
every 1000 ms.
pci_trans_cnt number of PCIe partial transactions
max_rd_lat maximum logged read latency [ns] (could
be any read operation)
rd_lat_acc_avg average read latency [ns]
max_gp_lat max get to put latency [ns] (only takes
samples for AE0)
gp_lat_acc_avg average get to put latency [ns]
bw_in PCIe, write bandwidth [Mbps]
bw_out PCIe, read bandwidth [Mbps]
at_page_req_lat_avg Address Translator(AT), average page
request latency [ns]
at_trans_lat_avg AT, average page translation latency [ns]
at_max_tlb_used AT, maximum uTLB used
util_cpr<N> utilization of Compression slice N [%]
exec_cpr<N> execution count of Compression slice N
util_xlt<N> utilization of Translator slice N [%]
exec_xlt<N> execution count of Translator slice N
util_dcpr<N> utilization of Decompression slice N [%]
exec_dcpr<N> execution count of Decompression slice N
util_pke<N> utilization of PKE N [%]
exec_pke<N> execution count of PKE N
util_ucs<N> utilization of UCS slice N [%]
exec_ucs<N> execution count of UCS slice N
util_wat<N> utilization of Wireless Authentication
slice N [%]
exec_wat<N> execution count of Wireless Authentication
slice N
util_wcp<N> utilization of Wireless Cipher slice N [%]
exec_wcp<N> execution count of Wireless Cipher slice N
util_cph<N> utilization of Cipher slice N [%]
exec_cph<N> execution count of Cipher slice N
util_ath<N> utilization of Authentication slice N [%]
exec_ath<N> execution count of Authentication slice N
======================= ========================================
The telemetry report file can be read with the following command::
cat /sys/kernel/debug/qat_4xxx_0000:6b:00.0/telemetry/device_data
If ``control`` is set to 1, only the current values of the
counters are displayed::
<counter_name> <current>
If ``control`` is 2, 3 or 4, counters are displayed in the
following format::
<counter_name> <current> <min> <max> <avg>
If a device lacks of a specific accelerator, the corresponding
attribute is not reported.
This attribute is only available for qat_4xxx devices.
What: /sys/kernel/debug/qat_<device>_<BDF>/telemetry/rp_<A/B/C/D>_data
Date: March 2024
KernelVersion: 6.8
Contact: qat-linux@intel.com
Description: (RW) Selects up to 4 Ring Pairs (RP) to monitor, one per file,
and report telemetry counters related to each.
Allowed values to write:
========================
* 0 to ``<num_rps - 1>``:
Ring pair to be monitored. The value of ``num_rps`` can be
retrieved through ``/sys/bus/pci/devices/<BDF>/qat/num_rps``.
See Documentation/ABI/testing/sysfs-driver-qat.
Reads report metrics about performance and utilization of
the selected RP:
======================= ========================================
Field Description
======================= ========================================
sample_cnt number of acquisitions of telemetry data
from the device. Reads are performed
every 1000 ms
rp_num RP number associated with slot <A/B/C/D>
service_type service associated to the RP
pci_trans_cnt number of PCIe partial transactions
gp_lat_acc_avg average get to put latency [ns]
bw_in PCIe, write bandwidth [Mbps]
bw_out PCIe, read bandwidth [Mbps]
at_glob_devtlb_hit Message descriptor DevTLB hit rate
at_glob_devtlb_miss Message descriptor DevTLB miss rate
tl_at_payld_devtlb_hit Payload DevTLB hit rate
tl_at_payld_devtlb_miss Payload DevTLB miss rate
======================= ========================================
Example.
Writing the value '32' to the file ``rp_C_data`` starts the
collection of telemetry metrics for ring pair 32::
echo 32 > /sys/kernel/debug/qat_4xxx_0000:6b:00.0/telemetry/rp_C_data
Once a ring pair is selected, statistics can be read accessing
the file::
cat /sys/kernel/debug/qat_4xxx_0000:6b:00.0/telemetry/rp_C_data
If ``control`` is set to 1, only the current values of the
counters are displayed::
<counter_name> <current>
If ``control`` is 2, 3 or 4, counters are displayed in the
following format::
<counter_name> <current> <min> <max> <avg>
On QAT GEN4 devices there are 64 RPs on a PF, so the allowed
values are 0..63. This number is absolute to the device.
If Virtual Functions (VF) are used, the ring pair number can
be derived from the Bus, Device, Function of the VF:
============ ====== ====== ====== ======
PCI BDF/VF RP0 RP1 RP2 RP3
============ ====== ====== ====== ======
0000:6b:0.1 RP 0 RP 1 RP 2 RP 3
0000:6b:0.2 RP 4 RP 5 RP 6 RP 7
0000:6b:0.3 RP 8 RP 9 RP 10 RP 11
0000:6b:0.4 RP 12 RP 13 RP 14 RP 15
0000:6b:0.5 RP 16 RP 17 RP 18 RP 19
0000:6b:0.6 RP 20 RP 21 RP 22 RP 23
0000:6b:0.7 RP 24 RP 25 RP 26 RP 27
0000:6b:1.0 RP 28 RP 29 RP 30 RP 31
0000:6b:1.1 RP 32 RP 33 RP 34 RP 35
0000:6b:1.2 RP 36 RP 37 RP 38 RP 39
0000:6b:1.3 RP 40 RP 41 RP 42 RP 43
0000:6b:1.4 RP 44 RP 45 RP 46 RP 47
0000:6b:1.5 RP 48 RP 49 RP 50 RP 51
0000:6b:1.6 RP 52 RP 53 RP 54 RP 55
0000:6b:1.7 RP 56 RP 57 RP 58 RP 59
0000:6b:2.0 RP 60 RP 61 RP 62 RP 63
============ ====== ====== ====== ======
The mapping is only valid for the BDFs of VFs on the host.
The service provided on a ring-pair varies depending on the
configuration. The configuration for a given device can be
queried and set using ``cfg_services``.
See Documentation/ABI/testing/sysfs-driver-qat for details.
The following table reports how ring pairs are mapped to VFs
on the PF 0000:6b:0.0 configured for `sym;asym` or `asym;sym`:
=========== ============ =========== ============ ===========
PCI BDF/VF RP0/service RP1/service RP2/service RP3/service
=========== ============ =========== ============ ===========
0000:6b:0.1 RP 0 asym RP 1 sym RP 2 asym RP 3 sym
0000:6b:0.2 RP 4 asym RP 5 sym RP 6 asym RP 7 sym
0000:6b:0.3 RP 8 asym RP 9 sym RP10 asym RP11 sym
... ... ... ... ...
=========== ============ =========== ============ ===========
All VFs follow the same pattern.
The following table reports how ring pairs are mapped to VFs on
the PF 0000:6b:0.0 configured for `dc`:
=========== ============ =========== ============ ===========
PCI BDF/VF RP0/service RP1/service RP2/service RP3/service
=========== ============ =========== ============ ===========
0000:6b:0.1 RP 0 dc RP 1 dc RP 2 dc RP 3 dc
0000:6b:0.2 RP 4 dc RP 5 dc RP 6 dc RP 7 dc
0000:6b:0.3 RP 8 dc RP 9 dc RP10 dc RP11 dc
... ... ... ... ...
=========== ============ =========== ============ ===========
The mapping of a RP to a service can be retrieved using
``rp2srv`` from sysfs.
See Documentation/ABI/testing/sysfs-driver-qat for details.
This attribute is only available for qat_4xxx devices.

2
Documentation/ABI/testing/debugfs-hisi-hpre
View File

@ -101,7 +101,7 @@ What: /sys/kernel/debug/hisi_hpre/<bdf>/qm/status
Date: Apr 2020
Contact: linux-crypto@vger.kernel.org
Description: Dump the status of the QM.
Four states: initiated, started, stopped and closed.
Two states: work, stop.
Available for both PF and VF, and take no other effect on HPRE.
What: /sys/kernel/debug/hisi_hpre/<bdf>/qm/diff_regs

2
Documentation/ABI/testing/debugfs-hisi-sec
View File

@ -81,7 +81,7 @@ What: /sys/kernel/debug/hisi_sec2/<bdf>/qm/status
Date: Apr 2020
Contact: linux-crypto@vger.kernel.org
Description: Dump the status of the QM.
Four states: initiated, started, stopped and closed.
Two states: work, stop.
Available for both PF and VF, and take no other effect on SEC.
What: /sys/kernel/debug/hisi_sec2/<bdf>/qm/diff_regs

2
Documentation/ABI/testing/debugfs-hisi-zip
View File

@ -94,7 +94,7 @@ What: /sys/kernel/debug/hisi_zip/<bdf>/qm/status
Date: Apr 2020
Contact: linux-crypto@vger.kernel.org
Description: Dump the status of the QM.
Four states: initiated, started, stopped and closed.
Two states: work, stop.
Available for both PF and VF, and take no other effect on ZIP.
What: /sys/kernel/debug/hisi_zip/<bdf>/qm/diff_regs

110
Documentation/ABI/testing/sysfs-class-hwmon
View File

@ -381,6 +381,15 @@ Description:
RW
What: /sys/class/hwmon/hwmonX/tempY_max_alarm
Description:
Maximum temperature alarm flag.
- 0: OK
- 1: temperature has reached tempY_max
RO
What: /sys/class/hwmon/hwmonX/tempY_min
Description:
Temperature min value.
@ -389,6 +398,15 @@ Description:
RW
What: /sys/class/hwmon/hwmonX/tempY_min_alarm
Description:
Minimum temperature alarm flag.
- 0: OK
- 1: temperature has reached tempY_min
RO
What: /sys/class/hwmon/hwmonX/tempY_max_hyst
Description:
Temperature hysteresis value for max limit.
@ -434,12 +452,7 @@ Description:
- 0: OK
- 1: temperature has reached tempY_crit
RW
Contrary to regular alarm flags which clear themselves
automatically when read, this one sticks until cleared by
the user. This is done by writing 0 to the file. Writing
other values is unsupported.
RO
What: /sys/class/hwmon/hwmonX/tempY_crit_hyst
Description:
@ -462,6 +475,15 @@ Description:
RW
What: /sys/class/hwmon/hwmonX/tempY_emergency_alarm
Description:
Emergency high temperature alarm flag.
- 0: OK
- 1: temperature has reached tempY_emergency
RO
What: /sys/class/hwmon/hwmonX/tempY_emergency_hyst
Description:
Temperature hysteresis value for emergency limit.
@ -887,15 +909,15 @@ Description:
RW
What: /sys/class/hwmon/hwmonX/humidityY_input
What: /sys/class/hwmon/hwmonX/humidityY_alarm
Description:
Humidity
Humidity limit detection
Unit: milli-percent (per cent mille, pcm)
- 0: OK
- 1: Humidity limit has been reached
RO
What: /sys/class/hwmon/hwmonX/humidityY_enable
Description:
Enable or disable the sensors
@ -908,6 +930,74 @@ Description:
RW
What: /sys/class/hwmon/hwmonX/humidityY_fault
Description:
Reports a humidity sensor failure.
- 1: Failed
- 0: Ok
RO
What: /sys/class/hwmon/hwmonX/humidityY_input
Description:
Humidity
Unit: milli-percent (per cent mille, pcm)
RO
What: /sys/class/hwmon/hwmonX/humidityY_label
Description:
Suggested humidity channel label.
Text string
Should only be created if the driver has hints about what
this humidity channel is being used for, and user-space
doesn't. In all other cases, the label is provided by
user-space.
RO
What: /sys/class/hwmon/hwmonX/humidityY_max
Description:
Humidity max value.
Unit: milli-percent (per cent mille, pcm)
RW
What: /sys/class/hwmon/hwmonX/humidityY_max_hyst
Description:
Humidity hysteresis value for max limit.
Unit: milli-percent (per cent mille, pcm)
Must be reported as an absolute humidity, NOT a delta
from the max value.
RW
What: /sys/class/hwmon/hwmonX/humidityY_min
Description:
Humidity min value.
Unit: milli-percent (per cent mille, pcm)
RW
What: /sys/class/hwmon/hwmonX/humidityY_min_hyst
Description:
Humidity hysteresis value for min limit.
Unit: milli-percent (per cent mille, pcm)
Must be reported as an absolute humidity, NOT a delta
from the min value.
RW
What: /sys/class/hwmon/hwmonX/humidityY_rated_min
Description:
Minimum rated humidity.

6
Documentation/ABI/testing/sysfs-devices-platform-kunpeng_hccs
View File

@ -3,7 +3,7 @@ What: /sys/devices/platform/HISI04Bx:00/chipX/linked_full_lane
What: /sys/devices/platform/HISI04Bx:00/chipX/crc_err_cnt
Date: November 2023
KernelVersion: 6.6
Contact: Huisong Li <lihuisong@huawei.org>
Contact: Huisong Li <lihuisong@huawei.com>
Description:
The /sys/devices/platform/HISI04Bx:00/chipX/ directory
contains read-only attributes exposing some summarization
@ -26,7 +26,7 @@ What: /sys/devices/platform/HISI04Bx:00/chipX/dieY/linked_full_lane
What: /sys/devices/platform/HISI04Bx:00/chipX/dieY/crc_err_cnt
Date: November 2023
KernelVersion: 6.6
Contact: Huisong Li <lihuisong@huawei.org>
Contact: Huisong Li <lihuisong@huawei.com>
Description:
The /sys/devices/platform/HISI04Bx:00/chipX/dieY/ directory
contains read-only attributes exposing some summarization
@ -54,7 +54,7 @@ What: /sys/devices/platform/HISI04Bx:00/chipX/dieY/hccsN/lane_mask
What: /sys/devices/platform/HISI04Bx:00/chipX/dieY/hccsN/crc_err_cnt
Date: November 2023
KernelVersion: 6.6
Contact: Huisong Li <lihuisong@huawei.org>
Contact: Huisong Li <lihuisong@huawei.com>
Description:
The /sys/devices/platform/HISI04Bx/chipX/dieX/hccsN/ directory
contains read-only attributes exposing information about

12
Documentation/ABI/testing/sysfs-driver-habanalabs
View File

@ -149,6 +149,18 @@ Contact: ogabbay@kernel.org
Description: Displays the current clock frequency, in Hz, of the MME compute
engine. This property is valid only for the Goya ASIC family
What: /sys/class/accel/accel<n>/device/module_id
Date: Nov 2023
KernelVersion: not yet upstreamed
Contact: ogabbay@kernel.org
Description: Displays the device's module id
What: /sys/class/accel/accel<n>/device/parent_device
Date: Nov 2023
KernelVersion: 6.8
Contact: ttayar@habana.ai
Description: Displays the name of the parent device of the accel device
What: /sys/class/accel/accel<n>/device/pci_addr
Date: Jan 2019
KernelVersion: 5.1

70
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@ -0,0 +1,70 @@
What: /sys/devices/.../hwmon/hwmon<i>/power1_max
Date: September 2023
KernelVersion: 6.5
Contact: intel-xe@lists.freedesktop.org
Description: RW. Card reactive sustained (PL1) power limit in microwatts.
The power controller will throttle the operating frequency
if the power averaged over a window (typically seconds)
exceeds this limit. A read value of 0 means that the PL1
power limit is disabled, writing 0 disables the
limit. Writing values > 0 and <= TDP will enable the power limit.
Only supported for particular Intel xe graphics platforms.
What: /sys/devices/.../hwmon/hwmon<i>/power1_rated_max
Date: September 2023
KernelVersion: 6.5
Contact: intel-xe@lists.freedesktop.org
Description: RO. Card default power limit (default TDP setting).
Only supported for particular Intel xe graphics platforms.
What: /sys/devices/.../hwmon/hwmon<i>/power1_crit
Date: September 2023
KernelVersion: 6.5
Contact: intel-xe@lists.freedesktop.org
Description: RW. Card reactive critical (I1) power limit in microwatts.
Card reactive critical (I1) power limit in microwatts is exposed
for client products. The power controller will throttle the
operating frequency if the power averaged over a window exceeds
this limit.
Only supported for particular Intel xe graphics platforms.
What: /sys/devices/.../hwmon/hwmon<i>/curr1_crit
Date: September 2023
KernelVersion: 6.5
Contact: intel-xe@lists.freedesktop.org
Description: RW. Card reactive critical (I1) power limit in milliamperes.
Card reactive critical (I1) power limit in milliamperes is
exposed for server products. The power controller will throttle
the operating frequency if the power averaged over a window
exceeds this limit.
What: /sys/devices/.../hwmon/hwmon<i>/in0_input
Date: September 2023
KernelVersion: 6.5
Contact: intel-xe@lists.freedesktop.org
Description: RO. Current Voltage in millivolt.
Only supported for particular Intel xe graphics platforms.
What: /sys/devices/.../hwmon/hwmon<i>/energy1_input
Date: September 2023
KernelVersion: 6.5
Contact: intel-xe@lists.freedesktop.org
Description: RO. Energy input of device in microjoules.
Only supported for particular Intel xe graphics platforms.
What: /sys/devices/.../hwmon/hwmon<i>/power1_max_interval
Date: October 2023
KernelVersion: 6.6
Contact: intel-xe@lists.freedesktop.org
Description: RW. Sustained power limit interval (Tau in PL1/Tau) in
milliseconds over which sustained power is averaged.
Only supported for particular Intel xe graphics platforms.

56
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View File

@ -1223,6 +1223,55 @@ Description: This file shows the total latency (in micro seconds) of write
The file is read only.
What: /sys/bus/platform/drivers/ufshcd/*/power_info/lane
What: /sys/bus/platform/devices/*.ufs/power_info/lane
Date: September 2023
Contact: Can Guo <quic_cang@quicinc.com>
Description: This file shows how many lanes are enabled on the UFS link,
i.e., an output 2 means UFS link is operating with 2 lanes.
The file is read only.
What: /sys/bus/platform/drivers/ufshcd/*/power_info/mode
What: /sys/bus/platform/devices/*.ufs/power_info/mode
Date: September 2023
Contact: Can Guo <quic_cang@quicinc.com>
Description: This file shows the PA power mode of UFS.
The file is read only.
What: /sys/bus/platform/drivers/ufshcd/*/power_info/rate
What: /sys/bus/platform/devices/*.ufs/power_info/rate
Date: September 2023
Contact: Can Guo <quic_cang@quicinc.com>
Description: This file shows the speed rate of UFS link.
The file is read only.
What: /sys/bus/platform/drivers/ufshcd/*/power_info/gear
What: /sys/bus/platform/devices/*.ufs/power_info/gear
Date: September 2023
Contact: Can Guo <quic_cang@quicinc.com>
Description: This file shows the gear of UFS link.
The file is read only.
What: /sys/bus/platform/drivers/ufshcd/*/power_info/dev_pm
What: /sys/bus/platform/devices/*.ufs/power_info/dev_pm
Date: September 2023
Contact: Can Guo <quic_cang@quicinc.com>
Description: This file shows the UFS device power mode.
The file is read only.
What: /sys/bus/platform/drivers/ufshcd/*/power_info/link_state
What: /sys/bus/platform/devices/*.ufs/power_info/link_state
Date: September 2023
Contact: Can Guo <quic_cang@quicinc.com>
Description: This file shows the state of UFS link.
The file is read only.
What: /sys/bus/platform/drivers/ufshcd/*/device_descriptor/wb_presv_us_en
What: /sys/bus/platform/devices/*.ufs/device_descriptor/wb_presv_us_en
Date: June 2020
@ -1474,3 +1523,10 @@ Description: Indicates status of Write Booster.
The file is read only.
What: /sys/bus/platform/drivers/ufshcd/*/rtc_update_ms
What: /sys/bus/platform/devices/*.ufs/rtc_update_ms
Date: November 2023
Contact: Bean Huo <beanhuo@micron.com>
Description:
rtc_update_ms indicates how often the host should synchronize or update the
UFS RTC. If set to 0, this will disable UFS RTC periodic update.

21
Documentation/ABI/testing/sysfs-fs-f2fs
View File

@ -498,6 +498,21 @@ Description: Show status of f2fs checkpoint in real time.
CP_RESIZEFS_FLAG 0x00004000
=============================== ==============================
What: /sys/fs/f2fs/<disk>/stat/issued_discard
Date: December 2023
Contact: "Zhiguo Niu" <zhiguo.niu@unisoc.com>
Description: Shows the number of issued discard.
What: /sys/fs/f2fs/<disk>/stat/queued_discard
Date: December 2023
Contact: "Zhiguo Niu" <zhiguo.niu@unisoc.com>
Description: Shows the number of queued discard.
What: /sys/fs/f2fs/<disk>/stat/undiscard_blks
Date: December 2023
Contact: "Zhiguo Niu" <zhiguo.niu@unisoc.com>
Description: Shows the total number of undiscard blocks.
What: /sys/fs/f2fs/<disk>/ckpt_thread_ioprio
Date: January 2021
Contact: "Daeho Jeong" <daehojeong@google.com>
@ -740,3 +755,9 @@ Description: When compress cache is on, it controls cached page
If cached page percent exceed threshold, then deny caching compress page.
The value should be in range of (0, 100], by default it was initialized
as 20(%).
What: /sys/fs/f2fs/<disk>/discard_io_aware
Date: November 2023
Contact: "Chao Yu" <chao@kernel.org>
Description: It controls to enable/disable IO aware feature for background discard.
By default, the value is 1 which indicates IO aware is on.

16
Documentation/Makefile
View File

@ -97,7 +97,21 @@ quiet_cmd_sphinx = SPHINX $@ --> file://$(abspath $(BUILDDIR)/$3/$4)
cp $(if $(patsubst /%,,$(DOCS_CSS)),$(abspath $(srctree)/$(DOCS_CSS)),$(DOCS_CSS)) $(BUILDDIR)/$3/_static/; \
fi
htmldocs:
YNL_INDEX:=$(srctree)/Documentation/networking/netlink_spec/index.rst
YNL_RST_DIR:=$(srctree)/Documentation/networking/netlink_spec
YNL_YAML_DIR:=$(srctree)/Documentation/netlink/specs
YNL_TOOL:=$(srctree)/tools/net/ynl/ynl-gen-rst.py
YNL_RST_FILES_TMP := $(patsubst %.yaml,%.rst,$(wildcard $(YNL_YAML_DIR)/*.yaml))
YNL_RST_FILES := $(patsubst $(YNL_YAML_DIR)%,$(YNL_RST_DIR)%, $(YNL_RST_FILES_TMP))
$(YNL_INDEX): $(YNL_RST_FILES)
$(Q)$(YNL_TOOL) -o $@ -x
$(YNL_RST_DIR)/%.rst: $(YNL_YAML_DIR)/%.yaml $(YNL_TOOL)
$(Q)$(YNL_TOOL) -i $< -o $@
htmldocs: $(YNL_INDEX)
@$(srctree)/scripts/sphinx-pre-install --version-check
@+$(foreach var,$(SPHINXDIRS),$(call loop_cmd,sphinx,html,$(var),,$(var)))

25
Documentation/RCU/checklist.rst
View File

@ -241,15 +241,22 @@ over a rather long period of time, but improvements are always welcome!
srcu_struct. The rules for the expedited RCU grace-period-wait
primitives are the same as for their non-expedited counterparts.
If the updater uses call_rcu_tasks() or synchronize_rcu_tasks(),
then the readers must refrain from executing voluntary
context switches, that is, from blocking. If the updater uses
call_rcu_tasks_trace() or synchronize_rcu_tasks_trace(), then
the corresponding readers must use rcu_read_lock_trace() and
rcu_read_unlock_trace(). If an updater uses call_rcu_tasks_rude()
or synchronize_rcu_tasks_rude(), then the corresponding readers
must use anything that disables preemption, for example,
preempt_disable() and preempt_enable().
Similarly, it is necessary to correctly use the RCU Tasks flavors:
a. If the updater uses synchronize_rcu_tasks() or
call_rcu_tasks(), then the readers must refrain from
executing voluntary context switches, that is, from
blocking.
b. If the updater uses call_rcu_tasks_trace()
or synchronize_rcu_tasks_trace(), then the
corresponding readers must use rcu_read_lock_trace()
and rcu_read_unlock_trace().
c. If an updater uses call_rcu_tasks_rude() or
synchronize_rcu_tasks_rude(), then the corresponding
readers must use anything that disables preemption,
for example, preempt_disable() and preempt_enable().
Mixing things up will result in confusion and broken kernels, and
has even resulted in an exploitable security issue. Therefore,

25
Documentation/RCU/rcu_dereference.rst
View File

@ -3,13 +3,26 @@
PROPER CARE AND FEEDING OF RETURN VALUES FROM rcu_dereference()
===============================================================
Most of the time, you can use values from rcu_dereference() or one of
the similar primitives without worries. Dereferencing (prefix "*"),
field selection ("->"), assignment ("="), address-of ("&"), addition and
subtraction of constants, and casts all work quite naturally and safely.
Proper care and feeding of address and data dependencies is critically
important to correct use of things like RCU. To this end, the pointers
returned from the rcu_dereference() family of primitives carry address and
data dependencies. These dependencies extend from the rcu_dereference()
macro's load of the pointer to the later use of that pointer to compute
either the address of a later memory access (representing an address
dependency) or the value written by a later memory access (representing
a data dependency).
It is nevertheless possible to get into trouble with other operations.
Follow these rules to keep your RCU code working properly:
Most of the time, these dependencies are preserved, permitting you to
freely use values from rcu_dereference(). For example, dereferencing
(prefix "*"), field selection ("->"), assignment ("="), address-of
("&"), casts, and addition or subtraction of constants all work quite
naturally and safely. However, because current compilers do not take
either address or data dependencies into account it is still possible
to get into trouble.
Follow these rules to preserve the address and data dependencies emanating
from your calls to rcu_dereference() and friends, thus keeping your RCU
readers working properly:
- You must use one of the rcu_dereference() family of primitives
to load an RCU-protected pointer, otherwise CONFIG_PROVE_RCU

2
Documentation/RCU/torture.rst
View File

@ -185,7 +185,7 @@ argument.
Not all changes require that all scenarios be run. For example, a change
to Tree SRCU might run only the SRCU-N and SRCU-P scenarios using the
--configs argument to kvm.sh as follows: "--configs 'SRCU-N SRCU-P'".
Large systems can run multiple copies of of the full set of scenarios,
Large systems can run multiple copies of the full set of scenarios,
for example, a system with 448 hardware threads can run five instances
of the full set concurrently. To make this happen::

11
Documentation/accel/qaic/aic100.rst
View File

@ -36,8 +36,9 @@ AIC100 DID (0xa100).
AIC100 does not implement FLR (function level reset).
AIC100 implements MSI but does not implement MSI-X. AIC100 requires 17 MSIs to
operate (1 for MHI, 16 for the DMA Bridge).
AIC100 implements MSI but does not implement MSI-X. AIC100 prefers 17 MSIs to
operate (1 for MHI, 16 for the DMA Bridge). Falling back to 1 MSI is possible in
scenarios where reserving 32 MSIs isn't feasible.
As a PCIe device, AIC100 utilizes BARs to provide host interfaces to the device
hardware. AIC100 provides 3, 64-bit BARs.
@ -220,10 +221,14 @@ of the defined channels, and their uses.
+----------------+---------+----------+----------------------------------------+
| QAIC_DEBUG | 18 & 19 | AMSS | Not used. |
+----------------+---------+----------+----------------------------------------+
| QAIC_TIMESYNC | 20 & 21 | SBL/AMSS | Used to synchronize timestamps in the |
| QAIC_TIMESYNC | 20 & 21 | SBL | Used to synchronize timestamps in the |
| | | | device side logs with the host time |
| | | | source. |
+----------------+---------+----------+----------------------------------------+
| QAIC_TIMESYNC | 22 & 23 | AMSS | Used to periodically synchronize |
| _PERIODIC | | | timestamps in the device side logs with|
| | | | the host time source. |
+----------------+---------+----------+----------------------------------------+
DMA Bridge
==========

37
Documentation/accel/qaic/qaic.rst
View File

@ -10,6 +10,9 @@ accelerator products.
Interrupts
==========
IRQ Storm Mitigation
--------------------
While the AIC100 DMA Bridge hardware implements an IRQ storm mitigation
mechanism, it is still possible for an IRQ storm to occur. A storm can happen
if the workload is particularly quick, and the host is responsive. If the host
@ -35,6 +38,26 @@ generates 100k IRQs per second (per /proc/interrupts) is reduced to roughly 64
IRQs over 5 minutes while keeping the host system stable, and having the same
workload throughput performance (within run to run noise variation).
Single MSI Mode
---------------
MultiMSI is not well supported on all systems; virtualized ones even less so
(circa 2023). Between hypervisors masking the PCIe MSI capability structure to
large memory requirements for vIOMMUs (required for supporting MultiMSI), it is
useful to be able to fall back to a single MSI when needed.
To support this fallback, we allow the case where only one MSI is able to be
allocated, and share that one MSI between MHI and the DBCs. The device detects
when only one MSI has been configured and directs the interrupts for the DBCs
to the interrupt normally used for MHI. Unfortunately this means that the
interrupt handlers for every DBC and MHI wake up for every interrupt that
arrives; however, the DBC threaded irq handlers only are started when work to be
done is detected (MHI will always start its threaded handler).
If the DBC is configured to force MSI interrupts, this can circumvent the
software IRQ storm mitigation mentioned above. Since the MSI is shared it is
never disabled, allowing each new entry to the FIFO to trigger a new interrupt.
Neural Network Control (NNC) Protocol
=====================================
@ -70,8 +93,15 @@ commands (does not impact QAIC).
uAPI
====
QAIC creates an accel device per phsyical PCIe device. This accel device exists
for as long as the PCIe device is known to Linux.
The PCIe device may not be in the state to accept requests from userspace at
all times. QAIC will trigger KOBJ_ONLINE/OFFLINE uevents to advertise when the
device can accept requests (ONLINE) and when the device is no longer accepting
requests (OFFLINE) because of a reset or other state transition.
QAIC defines a number of driver specific IOCTLs as part of the userspace API.
This section describes those APIs.
DRM_IOCTL_QAIC_MANAGE
This IOCTL allows userspace to send a NNC request to the QSM. The call will
@ -178,3 +208,8 @@ overrides this for that call. Default is 5000 (5 seconds).
Sets the polling interval in microseconds (us) when datapath polling is active.
Takes effect at the next polling interval. Default is 100 (100 us).
**timesync_delay_ms (unsigned int)**
Sets the time interval in milliseconds (ms) between two consecutive timesync
operations. Default is 1000 (1000 ms).

2
Documentation/admin-guide/abi-obsolete.rst
View File

@ -7,5 +7,5 @@ marked to be removed at some later point in time.
The description of the interface will document the reason why it is
obsolete and when it can be expected to be removed.
.. kernel-abi:: $srctree/Documentation/ABI/obsolete
.. kernel-abi:: ABI/obsolete
:rst:

2
Documentation/admin-guide/abi-removed.rst
View File

@ -1,5 +1,5 @@
ABI removed symbols
===================
.. kernel-abi:: $srctree/Documentation/ABI/removed
.. kernel-abi:: ABI/removed
:rst:

2
Documentation/admin-guide/abi-stable.rst
View File

@ -10,5 +10,5 @@ for at least 2 years.
Most interfaces (like syscalls) are expected to never change and always
be available.
.. kernel-abi:: $srctree/Documentation/ABI/stable
.. kernel-abi:: ABI/stable
:rst:

2
Documentation/admin-guide/abi-testing.rst
View File

@ -16,5 +16,5 @@ Programs that use these interfaces are strongly encouraged to add their
name to the description of these interfaces, so that the kernel
developers can easily notify them if any changes occur.
.. kernel-abi:: $srctree/Documentation/ABI/testing
.. kernel-abi:: ABI/testing
:rst:

6
Documentation/admin-guide/dynamic-debug-howto.rst
View File

@ -321,13 +321,13 @@ Examples
:#> ddcmd 'format "nfsd: READ" +p'
// enable messages in files of which the paths include string "usb"
:#> ddcmd 'file *usb* +p' > /proc/dynamic_debug/control
:#> ddcmd 'file *usb* +p'
// enable all messages
:#> ddcmd '+p' > /proc/dynamic_debug/control
:#> ddcmd '+p'
// add module, function to all enabled messages
:#> ddcmd '+mf' > /proc/dynamic_debug/control
:#> ddcmd '+mf'
// boot-args example, with newlines and comments for readability
Kernel command line: ...

17
Documentation/admin-guide/kernel-parameters.txt
View File

@ -1,3 +1,14 @@
accept_memory= [MM]
Format: { eager | lazy }
default: lazy
By default, unaccepted memory is accepted lazily to
avoid prolonged boot times. The lazy option will add
some runtime overhead until all memory is eventually
accepted. In most cases the overhead is negligible.
For some workloads or for debugging purposes
accept_memory=eager can be used to accept all memory
at once during boot.
acpi= [HW,ACPI,X86,ARM64,RISCV64]
Advanced Configuration and Power Interface
Format: { force | on | off | strict | noirq | rsdt |
@ -5302,6 +5313,12 @@
Dump ftrace buffer after reporting RCU CPU
stall warning.
rcupdate.rcu_cpu_stall_notifiers= [KNL]
Provide RCU CPU stall notifiers, but see the
warnings in the RCU_CPU_STALL_NOTIFIER Kconfig
option's help text. TL;DR: You almost certainly
do not want rcupdate.rcu_cpu_stall_notifiers.
rcupdate.rcu_cpu_stall_suppress= [KNL]
Suppress RCU CPU stall warning messages.

10
Documentation/admin-guide/media/index.rst
View File

@ -20,16 +20,8 @@ Documentation/driver-api/media/index.rst
- for driver development information and Kernel APIs used by
media devices;
The media subsystem
===================
.. only:: html
.. class:: toc-title
Table of Contents
.. toctree::
:caption: Table of Contents
:maxdepth: 2
:numbered:

72
Documentation/admin-guide/media/starfive_camss.rst Normal file
View File

@ -0,0 +1,72 @@
.. SPDX-License-Identifier: GPL-2.0
.. include:: <isonum.txt>
================================
Starfive Camera Subsystem driver
================================
Introduction
------------
This file documents the driver for the Starfive Camera Subsystem found on
Starfive JH7110 SoC. The driver is located under drivers/staging/media/starfive/
camss.
The driver implements V4L2, Media controller and v4l2_subdev interfaces. Camera
sensor using V4L2 subdev interface in the kernel is supported.
The driver has been successfully used on the Gstreamer 1.18.5 with v4l2src
plugin.
Starfive Camera Subsystem hardware
----------------------------------
The Starfive Camera Subsystem hardware consists of::
|\ +---------------+ +-----------+
+----------+ | \ | | | |
| | | | | | | |
| MIPI |----->| |----->| ISP |----->| |
| | | | | | | |
+----------+ | | | | | Memory |
|MUX| +---------------+ | Interface |
+----------+ | | | |
| | | |---------------------------->| |
| Parallel |----->| | | |
| | | | | |
+----------+ | / | |
|/ +-----------+
- MIPI: The MIPI interface, receiving data from a MIPI CSI-2 camera sensor.
- Parallel: The parallel interface, receiving data from a parallel sensor.
- ISP: The ISP, processing raw Bayer data from an image sensor and producing
YUV frames.
Topology
--------
The media controller pipeline graph is as follows:
.. _starfive_camss_graph:
.. kernel-figure:: starfive_camss_graph.dot
:alt: starfive_camss_graph.dot
:align: center
The driver has 2 video devices:
- capture_raw: The capture device, capturing image data directly from a sensor.
- capture_yuv: The capture device, capturing YUV frame data processed by the
ISP module
The driver has 3 subdevices:
- stf_isp: is responsible for all the isp operations, outputs YUV frames.
- cdns_csi2rx: a CSI-2 bridge supporting up to 4 CSI lanes in input, and 4
different pixel streams in output.
- imx219: an image sensor, image data is sent through MIPI CSI-2.

12
Documentation/admin-guide/media/starfive_camss_graph.dot Normal file
View File

@ -0,0 +1,12 @@
digraph board {
rankdir=TB
n00000001 [label="{{<port0> 0} | stf_isp\n/dev/v4l-subdev0 | {<port1> 1}}", shape=Mrecord, style=filled, fillcolor=green]
n00000001:port1 -> n00000008 [style=dashed]
n00000004 [label="capture_raw\n/dev/video0", shape=box, style=filled, fillcolor=yellow]
n00000008 [label="capture_yuv\n/dev/video1", shape=box, style=filled, fillcolor=yellow]
n0000000e [label="{{<port0> 0} | cdns_csi2rx.19800000.csi-bridge\n | {<port1> 1 | <port2> 2 | <port3> 3 | <port4> 4}}", shape=Mrecord, style=filled, fillcolor=green]
n0000000e:port1 -> n00000001:port0 [style=dashed]
n0000000e:port1 -> n00000004 [style=dashed]
n00000018 [label="{{} | imx219 6-0010\n/dev/v4l-subdev1 | {<port0> 0}}", shape=Mrecord, style=filled, fillcolor=green]
n00000018:port0 -> n0000000e:port0 [style=bold]
}

1
Documentation/admin-guide/media/v4l-drivers.rst
View File

@ -28,6 +28,7 @@ Video4Linux (V4L) driver-specific documentation
si470x
si4713
si476x
starfive_camss
vimc
visl
vivid

2
Documentation/admin-guide/media/visl.rst
View File

@ -71,6 +71,7 @@ The following codecs are supported:
- VP9
- H.264
- HEVC
- AV1
visl trace events
-----------------
@ -79,6 +80,7 @@ The trace events are defined on a per-codec basis, e.g.:
.. code-block:: bash
$ ls /sys/kernel/tracing/events/ | grep visl
visl_av1_controls
visl_fwht_controls
visl_h264_controls
visl_hevc_controls

5
Documentation/admin-guide/sysctl/net.rst
View File

@ -345,7 +345,10 @@ optmem_max
----------
Maximum ancillary buffer size allowed per socket. Ancillary data is a sequence
of struct cmsghdr structures with appended data.
of struct cmsghdr structures with appended data. TCP tx zerocopy also uses
optmem_max as a limit for its internal structures.
Default : 128 KB
fb_tunnels_only_for_init_net
----------------------------

2
Documentation/arch/x86/boot.rst
View File

@ -71,7 +71,7 @@ Protocol 2.13 (Kernel 3.14) Support 32- and 64-bit flags being set in
Protocol 2.14 BURNT BY INCORRECT COMMIT
ae7e1238e68f2a472a125673ab506d49158c1889
(x86/boot: Add ACPI RSDP address to setup_header)
("x86/boot: Add ACPI RSDP address to setup_header")
DO NOT USE!!! ASSUME SAME AS 2.13.
Protocol 2.15 (Kernel 5.5) Added the kernel_info and kernel_info.setup_type_max.

6
Documentation/bpf/btf.rst
View File

@ -272,10 +272,8 @@ In this case, if the base type is an int type, it must be a regular int type:
* ``BTF_INT_OFFSET()`` must be 0.
* ``BTF_INT_BITS()`` must be equal to ``{1,2,4,8,16} * 8``.
The following kernel patch introduced ``kind_flag`` and explained why both
modes exist:
https://github.com/torvalds/linux/commit/9d5f9f701b1891466fb3dbb1806ad97716f95cc3#diff-fa650a64fdd3968396883d2fe8215ff3
Commit 9d5f9f701b18 introduced ``kind_flag`` and explains why both modes
exist.
2.2.6 BTF_KIND_ENUM
~~~~~~~~~~~~~~~~~~~

2
Documentation/bpf/cpumasks.rst
View File

@ -352,7 +352,7 @@ can be used to query the contents of cpumasks.
.. kernel-doc:: kernel/bpf/cpumask.c
:identifiers: bpf_cpumask_first bpf_cpumask_first_zero bpf_cpumask_first_and
bpf_cpumask_test_cpu
bpf_cpumask_test_cpu bpf_cpumask_weight
.. kernel-doc:: kernel/bpf/cpumask.c
:identifiers: bpf_cpumask_equal bpf_cpumask_intersects bpf_cpumask_subset

21
Documentation/bpf/fs_kfuncs.rst Normal file
View File

@ -0,0 +1,21 @@
.. SPDX-License-Identifier: GPL-2.0
.. _fs_kfuncs-header-label:
=====================
BPF filesystem kfuncs
=====================
BPF LSM programs need to access filesystem data from LSM hooks. The following
BPF kfuncs can be used to get these data.
* ``bpf_get_file_xattr()``
* ``bpf_get_fsverity_digest()``
To avoid recursions, these kfuncs follow the following rules:
1. These kfuncs are only permitted from BPF LSM function.
2. These kfuncs should not call into other LSM hooks, i.e. security_*(). For
example, ``bpf_get_file_xattr()`` does not use ``vfs_getxattr()``, because
the latter calls LSM hook ``security_inode_getxattr``.

1
Documentation/bpf/index.rst
View File

@ -21,6 +21,7 @@ that goes into great technical depth about the BPF Architecture.
helpers
kfuncs
cpumasks
fs_kfuncs
programs
maps
bpf_prog_run

24
Documentation/bpf/kfuncs.rst
View File

@ -135,6 +135,30 @@ Either way, the returned buffer is either NULL, or of size buffer_szk. Without t
annotation, the verifier will reject the program if a null pointer is passed in with
a nonzero size.
2.2.5 __str Annotation
----------------------------
This annotation is used to indicate that the argument is a constant string.
An example is given below::
__bpf_kfunc bpf_get_file_xattr(..., const char *name__str, ...)
{
...
}
In this case, ``bpf_get_file_xattr()`` can be called as::
bpf_get_file_xattr(..., "xattr_name", ...);
Or::
const char name[] = "xattr_name"; /* This need to be global */
int BPF_PROG(...)
{
...
bpf_get_file_xattr(..., name, ...);
...
}
.. _BPF_kfunc_nodef:

9
Documentation/conf.py
View File

@ -47,7 +47,7 @@ from load_config import loadConfig
# -- General configuration ------------------------------------------------
# If your documentation needs a minimal Sphinx version, state it here.
needs_sphinx = '1.7'
needs_sphinx = '2.4.4'
# Add any Sphinx extension module names here, as strings. They can be
# extensions coming with Sphinx (named 'sphinx.ext.*') or your custom
@ -55,7 +55,7 @@ needs_sphinx = '1.7'
extensions = ['kerneldoc', 'rstFlatTable', 'kernel_include',
'kfigure', 'sphinx.ext.ifconfig', 'automarkup',
'maintainers_include', 'sphinx.ext.autosectionlabel',
'kernel_abi', 'kernel_feat']
'kernel_abi', 'kernel_feat', 'translations']
if major >= 3:
if (major > 3) or (minor > 0 or patch >= 2):
@ -106,6 +106,7 @@ if major >= 3:
"__weak",
"noinline",
"__fix_address",
"__counted_by",
# include/linux/memblock.h:
"__init_memblock",
@ -357,6 +358,10 @@ html_sidebars = { '**': ['searchbox.html', 'kernel-toc.html', 'sourcelink.html']
if html_theme == 'alabaster':
html_sidebars['**'].insert(0, 'about.html')
# The name of an image file (relative to this directory) to place at the top
# of the sidebar.
html_logo = 'images/logo.svg'
# Output file base name for HTML help builder.
htmlhelp_basename = 'TheLinuxKerneldoc'

2
Documentation/core-api/dma-api-howto.rst
View File

@ -8,7 +8,7 @@ Dynamic DMA mapping Guide
This is a guide to device driver writers on how to use the DMA API
with example pseudo-code. For a concise description of the API, see
DMA-API.txt.
Documentation/core-api/dma-api.rst.
CPU and DMA addresses
=====================

2
Documentation/core-api/dma-api.rst
View File

@ -448,7 +448,7 @@ DMA address entries returned.
Synchronise a single contiguous or scatter/gather mapping for the CPU
and device. With the sync_sg API, all the parameters must be the same
as those passed into the single mapping API. With the sync_single API,
as those passed into the sg mapping API. With the sync_single API,
you can use dma_handle and size parameters that aren't identical to
those passed into the single mapping API to do a partial sync.

2
Documentation/core-api/pin_user_pages.rst
View File

@ -153,6 +153,8 @@ NOTE: Some pages, such as DAX pages, cannot be pinned with longterm pins. That's
because DAX pages do not have a separate page cache, and so "pinning" implies
locking down file system blocks, which is not (yet) supported in that way.
.. _mmu-notifier-registration-case:
CASE 3: MMU notifier registration, with or without page faulting hardware
-------------------------------------------------------------------------
Device drivers can pin pages via get_user_pages*(), and register for mmu

2
Documentation/core-api/workqueue.rst
View File

@ -379,7 +379,7 @@ Workqueue currently supports the following affinity scopes.
cases. This is the default affinity scope.
``numa``
CPUs are grouped according to NUMA bounaries.
CPUs are grouped according to NUMA boundaries.
``system``
All CPUs are put in the same group. Workqueue makes no effort to process a

5
Documentation/crypto/api.rst
View File

@ -1,11 +1,8 @@
Programming Interface
=====================
.. class:: toc-title
Table of contents
.. toctree::
:caption: Table of contents
:maxdepth: 2
api-skcipher

9
Documentation/crypto/device_drivers/index.rst Normal file
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@ -0,0 +1,9 @@
.. SPDX-License-Identifier: GPL-2.0
Hardware Device Driver Specific Documentation
---------------------------------------------
.. toctree::
:maxdepth: 1
octeontx2

25
Documentation/crypto/device_drivers/octeontx2.rst Normal file
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@ -0,0 +1,25 @@
.. SPDX-License-Identifier: GPL-2.0
=========================
octeontx2 devlink support
=========================
This document describes the devlink features implemented by the ``octeontx2 CPT``
device drivers.
Parameters
==========
The ``octeontx2`` driver implements the following driver-specific parameters.
.. list-table:: Driver-specific parameters implemented
:widths: 5 5 5 85
* - Name
- Type
- Mode
- Description
* - ``t106_mode``
- u8
- runtime
- Used to configure CN10KA B0/CN10KB CPT to work as CN10KA A0/A1.

6
Documentation/crypto/index.rst
View File

@ -9,11 +9,8 @@ This documentation outlines the Linux kernel crypto API with its
concepts, details about developing cipher implementations, employment of the API
for cryptographic use cases, as well as programming examples.
.. class:: toc-title
Table of contents
.. toctree::
:caption: Table of contents
:maxdepth: 2
intro
@ -28,3 +25,4 @@ for cryptographic use cases, as well as programming examples.
api
api-samples
descore-readme
device_drivers/index

5
Documentation/dev-tools/index.rst
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@ -10,11 +10,8 @@ whole; patches welcome!
A brief overview of testing-specific tools can be found in
Documentation/dev-tools/testing-overview.rst
.. class:: toc-title
Table of contents
.. toctree::
:caption: Table of contents
:maxdepth: 2
testing-overview

12
Documentation/dev-tools/kunit/usage.rst
View File

@ -566,13 +566,9 @@ By reusing the same ``cases`` array from above, we can write the test as a
},
};
// Need a helper function to generate a name for each test case.
static void case_to_desc(const struct sha1_test_case *t, char *desc)
{
strcpy(desc, t->str);
}
// Creates `sha1_gen_params()` to iterate over `cases`.
KUNIT_ARRAY_PARAM(sha1, cases, case_to_desc);
// Creates `sha1_gen_params()` to iterate over `cases` while using
// the struct member `str` for the case description.
KUNIT_ARRAY_PARAM_DESC(sha1, cases, str);
// Looks no different from a normal test.
static void sha1_test(struct kunit *test)
@ -588,7 +584,7 @@ By reusing the same ``cases`` array from above, we can write the test as a
}
// Instead of KUNIT_CASE, we use KUNIT_CASE_PARAM and pass in the
// function declared by KUNIT_ARRAY_PARAM.
// function declared by KUNIT_ARRAY_PARAM or KUNIT_ARRAY_PARAM_DESC.
static struct kunit_case sha1_test_cases[] = {
KUNIT_CASE_PARAM(sha1_test, sha1_gen_params),
{}

2
Documentation/devicetree/bindings/Makefile
View File

@ -28,7 +28,7 @@ $(obj)/%.example.dts: $(src)/%.yaml check_dtschema_version FORCE
find_all_cmd = find $(srctree)/$(src) \( -name '*.yaml' ! \
-name 'processed-schema*' \)
find_cmd = $(find_all_cmd) | grep -F -e "$(subst :," -e ",$(DT_SCHEMA_FILES))"
find_cmd = $(find_all_cmd) | sed 's|^$(srctree)/$(src)/||' | grep -F -e "$(subst :," -e ",$(DT_SCHEMA_FILES))" | sed 's|^|$(srctree)/$(src)/|'
CHK_DT_DOCS := $(shell $(find_cmd))
quiet_cmd_yamllint = LINT $(src)

2
Documentation/devicetree/bindings/arm/calxeda/l2ecc.yaml
View File

@ -16,7 +16,7 @@ maintainers:
properties:
compatible:
const: "calxeda,hb-sregs-l2-ecc"
const: calxeda,hb-sregs-l2-ecc
reg:
maxItems: 1

1
Documentation/devicetree/bindings/arm/cpus.yaml
View File

@ -198,6 +198,7 @@ properties:
- qcom,kryo660
- qcom,kryo685
- qcom,kryo780
- qcom,oryon
- qcom,scorpion
enable-method:

22
Documentation/devicetree/bindings/arm/fsl.yaml
View File

@ -967,6 +967,7 @@ properties:
- menlo,mx8menlo # Verdin iMX8M Mini Module on i.MX8MM Menlo board
- toradex,verdin-imx8mm-nonwifi-dahlia # Verdin iMX8M Mini Module on Dahlia
- toradex,verdin-imx8mm-nonwifi-dev # Verdin iMX8M Mini Module on Verdin Development Board
- toradex,verdin-imx8mm-nonwifi-mallow # Verdin iMX8M Mini Module on Mallow
- toradex,verdin-imx8mm-nonwifi-yavia # Verdin iMX8M Mini Module on Yavia
- const: toradex,verdin-imx8mm-nonwifi # Verdin iMX8M Mini Module without Wi-Fi / BT
- const: toradex,verdin-imx8mm # Verdin iMX8M Mini Module
@ -977,6 +978,7 @@ properties:
- enum:
- toradex,verdin-imx8mm-wifi-dahlia # Verdin iMX8M Mini Wi-Fi / BT Module on Dahlia
- toradex,verdin-imx8mm-wifi-dev # Verdin iMX8M Mini Wi-Fi / BT M. on Verdin Development B.
- toradex,verdin-imx8mm-wifi-mallow # Verdin iMX8M Mini Wi-Fi / BT Module on Mallow
- toradex,verdin-imx8mm-wifi-yavia # Verdin iMX8M Mini Wi-Fi / BT Module on Yavia
- const: toradex,verdin-imx8mm-wifi # Verdin iMX8M Mini Wi-Fi / BT Module
- const: toradex,verdin-imx8mm # Verdin iMX8M Mini Module
@ -1022,7 +1024,10 @@ properties:
- description: Variscite VAR-SOM-MX8MN based boards
items:
- const: variscite,var-som-mx8mn-symphony
- enum:
- dimonoff,gateway-evk # i.MX8MN Dimonoff Gateway EVK Board
- rve,rve-gateway # i.MX8MN RVE Gateway Board
- variscite,var-som-mx8mn-symphony
- const: variscite,var-som-mx8mn
- const: fsl,imx8mn
@ -1048,6 +1053,9 @@ properties:
- gateworks,imx8mp-gw73xx-2x # i.MX8MP Gateworks Board
- gateworks,imx8mp-gw74xx # i.MX8MP Gateworks Board
- gateworks,imx8mp-gw7905-2x # i.MX8MP Gateworks Board
- skov,imx8mp-skov-revb-hdmi # SKOV i.MX8MP climate control without panel
- skov,imx8mp-skov-revb-lt6 # SKOV i.MX8MP climate control with 7” panel
- skov,imx8mp-skov-revb-mi1010ait-1cp1 # SKOV i.MX8MP climate control with 10.1" panel
- toradex,verdin-imx8mp # Verdin iMX8M Plus Modules
- toradex,verdin-imx8mp-nonwifi # Verdin iMX8M Plus Modules without Wi-Fi / BT
- toradex,verdin-imx8mp-wifi # Verdin iMX8M Plus Wi-Fi / BT Modules
@ -1100,6 +1108,7 @@ properties:
- enum:
- toradex,verdin-imx8mp-nonwifi-dahlia # Verdin iMX8M Plus Module on Dahlia
- toradex,verdin-imx8mp-nonwifi-dev # Verdin iMX8M Plus Module on Verdin Development Board
- toradex,verdin-imx8mp-nonwifi-mallow # Verdin iMX8M Plus Module on Mallow
- toradex,verdin-imx8mp-nonwifi-yavia # Verdin iMX8M Plus Module on Yavia
- const: toradex,verdin-imx8mp-nonwifi # Verdin iMX8M Plus Module without Wi-Fi / BT
- const: toradex,verdin-imx8mp # Verdin iMX8M Plus Module
@ -1110,6 +1119,7 @@ properties:
- enum:
- toradex,verdin-imx8mp-wifi-dahlia # Verdin iMX8M Plus Wi-Fi / BT Module on Dahlia
- toradex,verdin-imx8mp-wifi-dev # Verdin iMX8M Plus Wi-Fi / BT M. on Verdin Development B.
- toradex,verdin-imx8mp-wifi-mallow # Verdin iMX8M Plus Wi-Fi / BT Module on Mallow
- toradex,verdin-imx8mp-wifi-yavia # Verdin iMX8M Plus Wi-Fi / BT Module on Yavia
- const: toradex,verdin-imx8mp-wifi # Verdin iMX8M Plus Wi-Fi / BT Module
- const: toradex,verdin-imx8mp # Verdin iMX8M Plus Module
@ -1476,6 +1486,16 @@ properties:
- const: solidrun,lx2162a-som
- const: fsl,lx2160a
- description:
TQ-Systems TQMLX2160A is a series of socketable SOM featuring
LX2160A system-on-chip variants. MBLX2160A mainboard can be used a
starterkit.
items:
- enum:
- tq,lx2160a-tqmlx2160a-mblx2160a
- const: tq,lx2160a-tqmlx2160a
- const: fsl,lx2160a
- description: S32G2 based Boards
items:
- enum:

53
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@ -0,0 +1,53 @@
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
%YAML 1.2
---
$id: http://devicetree.org/schemas/arm/google.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Google Tensor platforms
maintainers:
- Peter Griffin <peter.griffin@linaro.org>
description: |
ARM platforms using SoCs designed by Google branded "Tensor" used in Pixel
devices.
Currently upstream this is devices using "gs101" SoC which is found in Pixel
6, Pixel 6 Pro and Pixel 6a.
Google have a few different names for the SoC:
- Marketing name ("Tensor")
- Codename ("Whitechapel")
- SoC ID ("gs101")
- Die ID ("S5P9845")
Likewise there are a couple of names for the actual device
- Marketing name ("Pixel 6")
- Codename ("Oriole")
Devicetrees should use the lowercased SoC ID and lowercased board codename,
e.g. gs101 and gs101-oriole.
properties:
$nodename:
const: '/'
compatible:
oneOf:
- description: Google Pixel 6 / Oriole
items:
- enum:
- google,gs101-oriole
- const: google,gs101
# Bootloader requires empty ect node to be present
ect:
type: object
additionalProperties: false
required:
- ect
additionalProperties: true
...

17
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View File

@ -82,6 +82,23 @@ properties:
ranges: true
patternProperties:
'^clock@':
type: object
additionalProperties: false
properties:
compatible:
enum:
- hisilicon,hi3620-clock
- hisilicon,hi3620-mmc-clock
reg:
maxItems: 1
'#clock-cells':
const: 1
required:
- compatible
- reg

22
Documentation/devicetree/bindings/arm/marvell/armada-7k-8k.yaml
View File

@ -60,4 +60,26 @@ properties:
- const: marvell,armada-ap807-quad
- const: marvell,armada-ap807
- description:
Alleycat5X (98DX35xx) Reference Design as COM Express Carrier plus
Armada CN9130 COM Express CPU module
items:
- const: marvell,cn9130-ac5x-carrier
- const: marvell,rd-ac5x-carrier
- const: marvell,cn9130-cpu-module
- const: marvell,cn9130
- const: marvell,armada-ap807-quad
- const: marvell,armada-ap807
- description:
Alleycat5X (98DX35xx) Reference Design as COM Express Carrier plus
Armada CN9131 COM Express CPU module
items:
- const: marvell,cn9131-ac5x-carrier
- const: marvell,rd-ac5x-carrier
- const: marvell,cn9131-cpu-module
- const: marvell,cn9131
- const: marvell,armada-ap807-quad
- const: marvell,armada-ap807
additionalProperties: true

25
Documentation/devicetree/bindings/arm/mediatek.yaml
View File

@ -174,6 +174,10 @@ properties:
- enum:
- mediatek,mt8186-evb
- const: mediatek,mt8186
- items:
- enum:
- mediatek,mt8188-evb
- const: mediatek,mt8188
- items:
- enum:
- mediatek,mt8192-evb
@ -235,6 +239,13 @@ properties:
items:
- const: google,kappa
- const: mediatek,mt8183
- description: Google Katsu (ASUS Chromebook Detachable CZ1)
items:
- enum:
- google,katsu-sku32
- google,katsu-sku38
- const: google,katsu
- const: mediatek,mt8183
- description: Google Kodama (Lenovo 10e Chromebook Tablet)
items:
- enum:
@ -244,6 +255,20 @@ properties:
- google,kodama-sku32
- const: google,kodama
- const: mediatek,mt8183
- description: Google Makomo (Lenovo 100e Chromebook 2nd Gen MTK 2)
items:
- enum:
- google,makomo-sku0
- google,makomo-sku1
- const: google,makomo
- const: mediatek,mt8183
- description: Google Pico (Acer Chromebook Spin 311)
items:
- enum:
- google,pico-sku1
- google,pico-sku2
- const: google,pico
- const: mediatek,mt8183
- description: Google Willow (Acer Chromebook 311 C722/C722T)
items:
- enum:

39
Documentation/devicetree/bindings/arm/mediatek/mediatek,audsys.txt
View File

@ -1,39 +0,0 @@
MediaTek AUDSYS controller
============================
The MediaTek AUDSYS controller provides various clocks to the system.
Required Properties:
- compatible: Should be one of:
- "mediatek,mt2701-audsys", "syscon"
- "mediatek,mt6765-audsys", "syscon"
- "mediatek,mt6779-audio", "syscon"
- "mediatek,mt7622-audsys", "syscon"
- "mediatek,mt7623-audsys", "mediatek,mt2701-audsys", "syscon"
- "mediatek,mt8167-audiosys", "syscon"
- "mediatek,mt8183-audiosys", "syscon"
- "mediatek,mt8192-audsys", "syscon"
- "mediatek,mt8516-audsys", "syscon"
- #clock-cells: Must be 1
The AUDSYS controller uses the common clk binding from
Documentation/devicetree/bindings/clock/clock-bindings.txt
The available clocks are defined in dt-bindings/clock/mt*-clk.h.
Required sub-nodes:
-------
For common binding part and usage, refer to
../sonud/mt2701-afe-pcm.txt.
Example:
audsys: clock-controller@11220000 {
compatible = "mediatek,mt7622-audsys", "syscon";
reg = <0 0x11220000 0 0x2000>;
#clock-cells = <1>;
afe: audio-controller {
...
};
};

153
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@ -0,0 +1,153 @@
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/arm/mediatek/mediatek,audsys.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: MediaTek AUDSYS controller
maintainers:
- Eugen Hristev <eugen.hristev@collabora.com>
description:
The MediaTek AUDSYS controller provides various clocks to the system.
properties:
compatible:
oneOf:
- items:
- enum:
- mediatek,mt2701-audsys
- mediatek,mt6765-audsys
- mediatek,mt6779-audsys
- mediatek,mt7622-audsys
- mediatek,mt8167-audsys
- mediatek,mt8173-audsys
- mediatek,mt8183-audsys
- mediatek,mt8186-audsys
- mediatek,mt8192-audsys
- mediatek,mt8516-audsys
- const: syscon
- items:
# Special case for mt7623 for backward compatibility
- const: mediatek,mt7623-audsys
- const: mediatek,mt2701-audsys
- const: syscon
reg:
maxItems: 1
'#clock-cells':
const: 1
audio-controller:
$ref: /schemas/sound/mediatek,mt2701-audio.yaml#
type: object
required:
- compatible
- '#clock-cells'
additionalProperties: false
examples:
- |
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/power/mt2701-power.h>
#include <dt-bindings/clock/mt2701-clk.h>
soc {
#address-cells = <2>;
#size-cells = <2>;
audsys: clock-controller@11220000 {
compatible = "mediatek,mt7622-audsys", "syscon";
reg = <0 0x11220000 0 0x2000>;
#clock-cells = <1>;
afe: audio-controller {
compatible = "mediatek,mt2701-audio";
interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_LOW>,
<GIC_SPI 132 IRQ_TYPE_LEVEL_LOW>;
interrupt-names = "afe", "asys";
power-domains = <&scpsys MT2701_POWER_DOMAIN_IFR_MSC>;
clocks = <&infracfg CLK_INFRA_AUDIO>,
<&topckgen CLK_TOP_AUD_MUX1_SEL>,
<&topckgen CLK_TOP_AUD_MUX2_SEL>,
<&topckgen CLK_TOP_AUD_48K_TIMING>,
<&topckgen CLK_TOP_AUD_44K_TIMING>,
<&topckgen CLK_TOP_AUD_K1_SRC_SEL>,
<&topckgen CLK_TOP_AUD_K2_SRC_SEL>,
<&topckgen CLK_TOP_AUD_K3_SRC_SEL>,
<&topckgen CLK_TOP_AUD_K4_SRC_SEL>,
<&topckgen CLK_TOP_AUD_K1_SRC_DIV>,
<&topckgen CLK_TOP_AUD_K2_SRC_DIV>,
<&topckgen CLK_TOP_AUD_K3_SRC_DIV>,
<&topckgen CLK_TOP_AUD_K4_SRC_DIV>,
<&topckgen CLK_TOP_AUD_I2S1_MCLK>,
<&topckgen CLK_TOP_AUD_I2S2_MCLK>,
<&topckgen CLK_TOP_AUD_I2S3_MCLK>,
<&topckgen CLK_TOP_AUD_I2S4_MCLK>,
<&audsys CLK_AUD_I2SO1>,
<&audsys CLK_AUD_I2SO2>,
<&audsys CLK_AUD_I2SO3>,
<&audsys CLK_AUD_I2SO4>,
<&audsys CLK_AUD_I2SIN1>,
<&audsys CLK_AUD_I2SIN2>,
<&audsys CLK_AUD_I2SIN3>,
<&audsys CLK_AUD_I2SIN4>,
<&audsys CLK_AUD_ASRCO1>,
<&audsys CLK_AUD_ASRCO2>,
<&audsys CLK_AUD_ASRCO3>,
<&audsys CLK_AUD_ASRCO4>,
<&audsys CLK_AUD_AFE>,
<&audsys CLK_AUD_AFE_CONN>,
<&audsys CLK_AUD_A1SYS>,
<&audsys CLK_AUD_A2SYS>,
<&audsys CLK_AUD_AFE_MRGIF>;
clock-names = "infra_sys_audio_clk",
"top_audio_mux1_sel",
"top_audio_mux2_sel",
"top_audio_a1sys_hp",
"top_audio_a2sys_hp",
"i2s0_src_sel",
"i2s1_src_sel",
"i2s2_src_sel",
"i2s3_src_sel",
"i2s0_src_div",
"i2s1_src_div",
"i2s2_src_div",
"i2s3_src_div",
"i2s0_mclk_en",
"i2s1_mclk_en",
"i2s2_mclk_en",
"i2s3_mclk_en",
"i2so0_hop_ck",
"i2so1_hop_ck",
"i2so2_hop_ck",
"i2so3_hop_ck",
"i2si0_hop_ck",
"i2si1_hop_ck",
"i2si2_hop_ck",
"i2si3_hop_ck",
"asrc0_out_ck",
"asrc1_out_ck",
"asrc2_out_ck",
"asrc3_out_ck",
"audio_afe_pd",
"audio_afe_conn_pd",
"audio_a1sys_pd",
"audio_a2sys_pd",
"audio_mrgif_pd";
assigned-clocks = <&topckgen CLK_TOP_AUD_MUX1_SEL>,
<&topckgen CLK_TOP_AUD_MUX2_SEL>,
<&topckgen CLK_TOP_AUD_MUX1_DIV>,
<&topckgen CLK_TOP_AUD_MUX2_DIV>;
assigned-clock-parents = <&topckgen CLK_TOP_AUD1PLL_98M>,
<&topckgen CLK_TOP_AUD2PLL_90M>;
assigned-clock-rates = <0>, <0>, <49152000>, <45158400>;
};
};
};

29
Documentation/devicetree/bindings/arm/mediatek/mediatek,ethsys.txt
View File

@ -1,29 +0,0 @@
Mediatek ethsys controller
============================
The Mediatek ethsys controller provides various clocks to the system.
Required Properties:
- compatible: Should be:
- "mediatek,mt2701-ethsys", "syscon"
- "mediatek,mt7622-ethsys", "syscon"
- "mediatek,mt7623-ethsys", "mediatek,mt2701-ethsys", "syscon"
- "mediatek,mt7629-ethsys", "syscon"
- "mediatek,mt7981-ethsys", "syscon"
- "mediatek,mt7986-ethsys", "syscon"
- #clock-cells: Must be 1
- #reset-cells: Must be 1
The ethsys controller uses the common clk binding from
Documentation/devicetree/bindings/clock/clock-bindings.txt
The available clocks are defined in dt-bindings/clock/mt*-clk.h.
Example:
ethsys: clock-controller@1b000000 {
compatible = "mediatek,mt2701-ethsys", "syscon";
reg = <0 0x1b000000 0 0x1000>;
#clock-cells = <1>;
#reset-cells = <1>;
};

1
Documentation/devicetree/bindings/arm/mediatek/mediatek,infracfg.yaml
View File

@ -30,6 +30,7 @@ properties:
- mediatek,mt7629-infracfg
- mediatek,mt7981-infracfg
- mediatek,mt7986-infracfg
- mediatek,mt7988-infracfg
- mediatek,mt8135-infracfg
- mediatek,mt8167-infracfg
- mediatek,mt8173-infracfg

3
Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml
View File

@ -32,6 +32,9 @@ properties:
- mediatek,mt8183-mmsys
- mediatek,mt8186-mmsys
- mediatek,mt8188-vdosys0
- mediatek,mt8188-vdosys1
- mediatek,mt8188-vppsys0
- mediatek,mt8188-vppsys1
- mediatek,mt8192-mmsys
- mediatek,mt8195-vdosys1
- mediatek,mt8195-vppsys0

1
Documentation/devicetree/bindings/arm/mediatek/mediatek,pericfg.yaml
View File

@ -28,6 +28,7 @@ properties:
- mediatek,mt8173-pericfg
- mediatek,mt8183-pericfg
- mediatek,mt8186-pericfg
- mediatek,mt8188-pericfg
- mediatek,mt8195-pericfg
- mediatek,mt8516-pericfg
- const: syscon

84
Documentation/devicetree/bindings/arm/msm/qcom,idle-state.txt
View File

@ -1,84 +0,0 @@
QCOM Idle States for cpuidle driver
ARM provides idle-state node to define the cpuidle states, as defined in [1].
cpuidle-qcom is the cpuidle driver for Qualcomm SoCs and uses these idle
states. Idle states have different enter/exit latency and residency values.
The idle states supported by the QCOM SoC are defined as -
* Standby
* Retention
* Standalone Power Collapse (Standalone PC or SPC)
* Power Collapse (PC)
Standby: Standby does a little more in addition to architectural clock gating.
When the WFI instruction is executed the ARM core would gate its internal
clocks. In addition to gating the clocks, QCOM cpus use this instruction as a
trigger to execute the SPM state machine. The SPM state machine waits for the
interrupt to trigger the core back in to active. This triggers the cache
hierarchy to enter standby states, when all cpus are idle. An interrupt brings
the SPM state machine out of its wait, the next step is to ensure that the
cache hierarchy is also out of standby, and then the cpu is allowed to resume
execution. This state is defined as a generic ARM WFI state by the ARM cpuidle
driver and is not defined in the DT. The SPM state machine should be
configured to execute this state by default and after executing every other
state below.
Retention: Retention is a low power state where the core is clock gated and
the memory and the registers associated with the core are retained. The
voltage may be reduced to the minimum value needed to keep the processor
registers active. The SPM should be configured to execute the retention
sequence and would wait for interrupt, before restoring the cpu to execution
state. Retention may have a slightly higher latency than Standby.
Standalone PC: A cpu can power down and warmboot if there is a sufficient time
between the time it enters idle and the next known wake up. SPC mode is used
to indicate a core entering a power down state without consulting any other
cpu or the system resources. This helps save power only on that core. The SPM
sequence for this idle state is programmed to power down the supply to the
core, wait for the interrupt, restore power to the core, and ensure the
system state including cache hierarchy is ready before allowing core to
resume. Applying power and resetting the core causes the core to warmboot
back into Elevation Level (EL) which trampolines the control back to the
kernel. Entering a power down state for the cpu, needs to be done by trapping
into a EL. Failing to do so, would result in a crash enforced by the warm boot
code in the EL for the SoC. On SoCs with write-back L1 cache, the cache has to
be flushed in s/w, before powering down the core.
Power Collapse: This state is similar to the SPC mode, but distinguishes
itself in that the cpu acknowledges and permits the SoC to enter deeper sleep
modes. In a hierarchical power domain SoC, this means L2 and other caches can
be flushed, system bus, clocks - lowered, and SoC main XO clock gated and
voltages reduced, provided all cpus enter this state. Since the span of low
power modes possible at this state is vast, the exit latency and the residency
of this low power mode would be considered high even though at a cpu level,
this essentially is cpu power down. The SPM in this state also may handshake
with the Resource power manager (RPM) processor in the SoC to indicate a
complete application processor subsystem shut down.
The idle-state for QCOM SoCs are distinguished by the compatible property of
the idle-states device node.
The devicetree representation of the idle state should be -
Required properties:
- compatible: Must be one of -
"qcom,idle-state-ret",
"qcom,idle-state-spc",
"qcom,idle-state-pc",
and "arm,idle-state".
Other required and optional properties are specified in [1].
Example:
idle-states {
CPU_SPC: spc {
compatible = "qcom,idle-state-spc", "arm,idle-state";
entry-latency-us = <150>;
exit-latency-us = <200>;
min-residency-us = <2000>;
};
};
[1]. Documentation/devicetree/bindings/cpu/idle-states.yaml

51
Documentation/devicetree/bindings/arm/qcom,coresight-remote-etm.yaml Normal file
View File

@ -0,0 +1,51 @@
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
%YAML 1.2
---
$id: http://devicetree.org/schemas/arm/qcom,coresight-remote-etm.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Qualcomm Coresight Remote ETM(Embedded Trace Macrocell)
maintainers:
- Jinlong Mao <quic_jinlmao@quicinc.com>
- Tao Zhang <quic_taozha@quicinc.com>
description:
Support for ETM trace collection on remote processor using coresight
framework. Enabling this will allow turning on ETM tracing on remote
processor like modem processor via sysfs and collecting the trace
via coresight TMC sinks.
properties:
compatible:
const: qcom,coresight-remote-etm
out-ports:
$ref: /schemas/graph.yaml#/properties/ports
additionalProperties: false
properties:
port:
description: Output connection to the CoreSight Trace bus.
$ref: /schemas/graph.yaml#/properties/port
required:
- compatible
- out-ports
additionalProperties: false
examples:
- |
etm {
compatible = "qcom,coresight-remote-etm";
out-ports {
port {
modem_etm0_out_funnel_modem: endpoint {
remote-endpoint = <&funnel_modem_in_modem_etm0>;
};
};
};
};
...

16
Documentation/devicetree/bindings/arm/qcom-soc.yaml
View File

@ -23,7 +23,7 @@ description: |
select:
properties:
compatible:
pattern: "^qcom,.*(apq|ipq|mdm|msm|qcm|qcs|sa|sc|sdm|sdx|sm)[0-9]+.*$"
pattern: "^qcom,.*(apq|ipq|mdm|msm|qcm|qcs|q[dr]u|sa|sc|sd[amx]|sm|x1e)[0-9]+.*$"
required:
- compatible
@ -31,17 +31,17 @@ properties:
compatible:
oneOf:
# Preferred naming style for compatibles of SoC components:
- pattern: "^qcom,(apq|ipq|mdm|msm|qcm|qcs|sa|sc|sdm|sdx|sm)[0-9]+(pro)?-.*$"
- pattern: "^qcom,(apq|ipq|mdm|msm|qcm|qcs|q[dr]u|sa|sc|sd[amx]|sm|x1e)[0-9]+(pro)?-.*$"
- pattern: "^qcom,(sa|sc)8[0-9]+[a-z][a-z]?-.*$"
# Legacy namings - variations of existing patterns/compatibles are OK,
# but do not add completely new entries to these:
- pattern: "^qcom,[ak]pss-wdt-(apq|ipq|mdm|msm|qcm|qcs|sa|sc|sdm|sdx|sm)[0-9]+.*$"
- pattern: "^qcom,gcc-(apq|ipq|mdm|msm|qcm|qcs|sa|sc|sdm|sdx|sm)[0-9]+.*$"
- pattern: "^qcom,mmcc-(apq|ipq|mdm|msm|qcm|qcs|sa|sc|sdm|sdx|sm)[0-9]+.*$"
- pattern: "^qcom,pcie-(apq|ipq|mdm|msm|qcm|qcs|sa|sc|sdm|sdx|sm)[0-9]+.*$"
- pattern: "^qcom,rpm-(apq|ipq|mdm|msm|qcm|qcs|sa|sc|sdm|sdx|sm)[0-9]+.*$"
- pattern: "^qcom,scm-(apq|ipq|mdm|msm|qcm|qcs|sa|sc|sdm|sdx|sm)[0-9]+.*$"
- pattern: "^qcom,[ak]pss-wdt-(apq|ipq|mdm|msm|qcm|qcs|q[dr]u|sa|sc|sd[amx]|sm)[0-9]+.*$"
- pattern: "^qcom,gcc-(apq|ipq|mdm|msm|qcm|qcs|q[dr]u|sa|sc|sd[amx]|sm)[0-9]+.*$"
- pattern: "^qcom,mmcc-(apq|ipq|mdm|msm|qcm|qcs|q[dr]u|sa|sc|sd[amx]|sm)[0-9]+.*$"
- pattern: "^qcom,pcie-(apq|ipq|mdm|msm|qcm|qcs|q[dr]u|sa|sc|sd[amx]|sm|x1e)[0-9]+.*$"
- pattern: "^qcom,rpm-(apq|ipq|mdm|msm|qcm|qcs|q[dr]u|sa|sc|sd[amx]|sm)[0-9]+.*$"
- pattern: "^qcom,scm-(apq|ipq|mdm|msm|qcm|qcs|q[dr]u|sa|sc|sd[amx]|sm|x1e)[0-9]+.*$"
- enum:
- qcom,dsi-ctrl-6g-qcm2290
- qcom,gpucc-sdm630

47
Documentation/devicetree/bindings/arm/qcom.yaml
View File

@ -87,29 +87,18 @@ description: |
sm8350
sm8450
sm8550
sm8650
x1e80100
The 'board' element must be one of the following strings:
adp
ap-al02-c2
ap-al02-c6
ap-al02-c7
ap-al02-c8
ap-al02-c9
ap-mi01.2
ap-mi01.3
ap-mi01.6
ap-mi01.9
cdp
cp01-c1
dragonboard
hk01
hk10-c1
hk10-c2
idp
liquid
rdp432-c2
mtp
qcp
qrd
rb2
ride
@ -138,7 +127,7 @@ description: |
There are many devices in the list below that run the standard ChromeOS
bootloader setup and use the open source depthcharge bootloader to boot the
OS. These devices do not use the scheme described above. For details, see:
https://docs.kernel.org/arm/google/chromebook-boot-flow.html
https://docs.kernel.org/arch/arm/google/chromebook-boot-flow.html
properties:
$nodename:
@ -186,11 +175,24 @@ properties:
- items:
- enum:
- microsoft,dempsey
- microsoft,makepeace
- microsoft,moneypenny
- samsung,s3ve3g
- const: qcom,msm8226
- items:
- enum:
- htc,memul
- microsoft,superman-lte
- microsoft,tesla
- motorola,peregrine
- const: qcom,msm8926
- const: qcom,msm8226
- items:
- enum:
- huawei,kiwi
- longcheer,l9100
- samsung,a7
- sony,kanuti-tulip
@ -397,6 +399,8 @@ properties:
- items:
- enum:
- fairphone,fp5
- qcom,qcm6490-idp
- qcom,qcs6490-rb3gen2
- const: qcom,qcm6490
- description: Qualcomm Technologies, Inc. Distributed Unit 1000 platform
@ -1009,6 +1013,7 @@ properties:
- sony,pdx203-generic
- sony,pdx206-generic
- xiaomi,elish
- xiaomi,pipa
- const: qcom,sm8250
- items:
@ -1034,6 +1039,18 @@ properties:
- qcom,sm8550-qrd
- const: qcom,sm8550
- items:
- enum:
- qcom,sm8650-mtp
- qcom,sm8650-qrd
- const: qcom,sm8650
- items:
- enum:
- qcom,x1e80100-crd
- qcom,x1e80100-qcp
- const: qcom,x1e80100
# Board compatibles go above
qcom,msm-id:

56
Documentation/devicetree/bindings/arm/rockchip.yaml
View File

@ -30,9 +30,11 @@ properties:
- const: amarula,vyasa-rk3288
- const: rockchip,rk3288
- description: Anbernic RG351M
- description: Anbernic RK3326 Handheld Gaming Console
items:
- const: anbernic,rg351m
- enum:
- anbernic,rg351m
- anbernic,rg351v
- const: rockchip,rk3326
- description: Anbernic RG353P
@ -95,22 +97,30 @@ properties:
- const: chipspark,rayeager-px2
- const: rockchip,rk3066a
- description: Cool Pi Compute Module 5(CM5) EVB
items:
- enum:
- coolpi,pi-cm5-evb
- const: coolpi,pi-cm5
- const: rockchip,rk3588
- description: Cool Pi 4 Model B
items:
- const: coolpi,pi-4b
- const: rockchip,rk3588s
- description: Edgeble Neural Compute Module 2(Neu2) SoM based boards
items:
- const: edgeble,neural-compute-module-2-io # Edgeble Neural Compute Module 2 IO Board
- const: edgeble,neural-compute-module-2 # Edgeble Neural Compute Module 2 SoM
- const: rockchip,rv1126
- description: Edgeble Neural Compute Module 6(Neu6) Model A SoM based boards
- description: Edgeble Neural Compute Module 6(Neu6) SoM based boards
items:
- const: edgeble,neural-compute-module-6a-io # Edgeble Neural Compute Module 6A IO Board
- const: edgeble,neural-compute-module-6a # Edgeble Neural Compute Module 6A SoM
- const: rockchip,rk3588
- description: Edgeble Neural Compute Module 6(Neu6) Model B SoM based boards
items:
- const: edgeble,neural-compute-module-6b-io # Edgeble Neural Compute Module 6B IO Board
- const: edgeble,neural-compute-module-6b # Edgeble Neural Compute Module 6B SoM
- const: edgeble,neural-compute-module-6a-io # Edgeble NCM6A-IO Board
- enum:
- edgeble,neural-compute-module-6a # Edgeble Neural Compute Module 6A SoM
- edgeble,neural-compute-module-6b # Edgeble Neural Compute Module 6B SoM
- const: rockchip,rk3588
- description: Elgin RV1108 R1
@ -237,6 +247,11 @@ properties:
- const: geekbuying,geekbox
- const: rockchip,rk3368
- description: Geniatech XPI-3128
items:
- const: geniatech,xpi-3128
- const: rockchip,rk3128
- description: Google Bob (Asus Chromebook Flip C101PA)
items:
- const: google,bob-rev13
@ -674,9 +689,12 @@ properties:
- const: pine64,soquartz
- const: rockchip,rk3566
- description: Powkiddy RGB30
- description: Powkiddy RK3566 Handheld Gaming Console
items:
- const: powkiddy,rgb30
- enum:
- powkiddy,rgb30
- powkiddy,rk2023
- powkiddy,x55
- const: rockchip,rk3566
- description: Radxa Compute Module 3(CM3)
@ -875,6 +893,11 @@ properties:
- const: tsd,rk3399-puma-haikou
- const: rockchip,rk3399
- description: Theobroma Systems RK3588-SBC Jaguar
items:
- const: tsd,rk3588-jaguar
- const: rockchip,rk3588
- description: Tronsmart Orion R68 Meta
items:
- const: tronsmart,orion-r68-meta
@ -922,6 +945,13 @@ properties:
- const: rockchip,rk3568-bpi-r2pro
- const: rockchip,rk3568
- description: Sonoff iHost Smart Home Hub
items:
- const: itead,sonoff-ihost
- enum:
- rockchip,rv1126
- rockchip,rv1109
additionalProperties: true
...

6
Documentation/devicetree/bindings/arm/samsung/samsung-boards.yaml
View File

@ -230,6 +230,12 @@ properties:
- samsung,exynosautov9-sadk # Samsung Exynos Auto v9 SADK
- const: samsung,exynosautov9
- description: Exynos Auto v920 based boards
items:
- enum:
- samsung,exynosautov920-sadk # Samsung Exynos Auto v920 SADK
- const: samsung,exynosautov920
required:
- compatible

5
Documentation/devicetree/bindings/arm/sprd/sprd.yaml
View File

@ -35,6 +35,11 @@ properties:
- sprd,ums512-1h10
- const: sprd,ums512
- items:
- enum:
- sprd,ums9620-2h10
- const: sprd,ums9620
additionalProperties: true
...

16
Documentation/devicetree/bindings/arm/stm32/stm32.yaml
View File

@ -82,29 +82,19 @@ properties:
- shiratech,stm32mp157a-iot-box # IoT Box
- shiratech,stm32mp157a-stinger96 # Stinger96
- st,stm32mp157c-ed1
- st,stm32mp157c-ed1-scmi
- st,stm32mp157a-dk1
- st,stm32mp157a-dk1-scmi
- st,stm32mp157c-dk2
- st,stm32mp157c-dk2-scmi
- const: st,stm32mp157
- items:
- const: st,stm32mp157a-dk1-scmi
- const: st,stm32mp157a-dk1
- const: st,stm32mp157
- items:
- const: st,stm32mp157c-dk2-scmi
- const: st,stm32mp157c-dk2
- const: st,stm32mp157
- items:
- const: st,stm32mp157c-ed1-scmi
- const: st,stm32mp157c-ed1
- const: st,stm32mp157
- items:
- const: st,stm32mp157c-ev1
- const: st,stm32mp157c-ed1
- const: st,stm32mp157
- items:
- const: st,stm32mp157c-ev1-scmi
- const: st,stm32mp157c-ev1
- const: st,stm32mp157c-ed1
- const: st,stm32mp157

10
Documentation/devicetree/bindings/arm/sunxi.yaml
View File

@ -868,6 +868,11 @@ properties:
- const: topwise,a721
- const: allwinner,sun4i-a10
- description: Transpeed 8K618-T
items:
- const: transpeed,8k618-t
- const: allwinner,sun50i-h618
- description: Utoo P66
items:
- const: utoo,p66
@ -1013,6 +1018,11 @@ properties:
- const: xunlong,orangepi-zero2
- const: allwinner,sun50i-h616
- description: Xunlong OrangePi Zero 2W
items:
- const: xunlong,orangepi-zero2w
- const: allwinner,sun50i-h618
- description: Xunlong OrangePi Zero 3
items:
- const: xunlong,orangepi-zero3

2
Documentation/devicetree/bindings/arm/ti/k3.yaml
View File

@ -50,6 +50,7 @@ properties:
- enum:
- toradex,verdin-am62-nonwifi-dahlia # Verdin AM62 Module on Dahlia
- toradex,verdin-am62-nonwifi-dev # Verdin AM62 Module on Verdin Development Board
- toradex,verdin-am62-nonwifi-mallow # Verdin AM62 Module on Mallow
- toradex,verdin-am62-nonwifi-yavia # Verdin AM62 Module on Yavia
- const: toradex,verdin-am62-nonwifi # Verdin AM62 Module without Wi-Fi / BT
- const: toradex,verdin-am62 # Verdin AM62 Module
@ -60,6 +61,7 @@ properties:
- enum:
- toradex,verdin-am62-wifi-dahlia # Verdin AM62 Wi-Fi / BT Module on Dahlia
- toradex,verdin-am62-wifi-dev # Verdin AM62 Wi-Fi / BT M. on Verdin Development B.
- toradex,verdin-am62-wifi-mallow # Verdin AM62 Wi-Fi / BT Module on Mallow
- toradex,verdin-am62-wifi-yavia # Verdin AM62 Wi-Fi / BT Module on Yavia
- const: toradex,verdin-am62-wifi # Verdin AM62 Wi-Fi / BT Module
- const: toradex,verdin-am62 # Verdin AM62 Module

2
Documentation/devicetree/bindings/arm/ti/omap.yaml
View File

@ -134,6 +134,8 @@ properties:
- amazon,omap4-kc1 # Amazon Kindle Fire (first generation)
- motorola,droid4 # Motorola Droid 4 XT894
- motorola,droid-bionic # Motorola Droid Bionic XT875
- motorola,xyboard-mz609
- motorola,xyboard-mz617
- ti,omap4-panda
- ti,omap4-sdp
- const: ti,omap4430

2
Documentation/devicetree/bindings/auxdisplay/hit,hd44780.yaml
View File

@ -113,7 +113,7 @@ examples:
hd44780 {
compatible = "hit,hd44780";
display-height-chars = <2>;
display-width-chars = <16>;
display-width-chars = <16>;
data-gpios = <&pcf8574 4 0>,
<&pcf8574 5 0>,
<&pcf8574 6 0>,

5
Documentation/devicetree/bindings/cache/qcom,llcc.yaml vendored
View File

@ -33,6 +33,8 @@ properties:
- qcom,sm8350-llcc
- qcom,sm8450-llcc
- qcom,sm8550-llcc
- qcom,sm8650-llcc
- qcom,x1e80100-llcc
reg:
minItems: 2
@ -64,6 +66,7 @@ allOf:
compatible:
contains:
enum:
- qcom,qdu1000-llcc
- qcom,sc7180-llcc
- qcom,sm6350-llcc
then:
@ -101,9 +104,9 @@ allOf:
compatible:
contains:
enum:
- qcom,qdu1000-llcc
- qcom,sc8180x-llcc
- qcom,sc8280xp-llcc
- qcom,x1e80100-llcc
then:
properties:
reg:

6
Documentation/devicetree/bindings/cache/sifive,ccache0.yaml vendored
View File

@ -38,7 +38,9 @@ properties:
- sifive,fu740-c000-ccache
- const: cache
- items:
- const: starfive,jh7110-ccache
- enum:
- starfive,jh7100-ccache
- starfive,jh7110-ccache
- const: sifive,ccache0
- const: cache
- items:
@ -88,6 +90,7 @@ allOf:
contains:
enum:
- sifive,fu740-c000-ccache
- starfive,jh7100-ccache
- starfive,jh7110-ccache
- microchip,mpfs-ccache
@ -111,6 +114,7 @@ allOf:
contains:
enum:
- sifive,fu740-c000-ccache
- starfive,jh7100-ccache
- starfive,jh7110-ccache
then:

2
Documentation/devicetree/bindings/clock/baikal,bt1-ccu-pll.yaml
View File

@ -125,7 +125,7 @@ examples:
clk25m: clock-oscillator-25m {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <25000000>;
clock-frequency = <25000000>;
clock-output-names = "clk25m";
};
...

138
Documentation/devicetree/bindings/clock/brcm,kona-ccu.txt
View File

@ -1,138 +0,0 @@
Broadcom Kona Family Clocks
This binding is associated with Broadcom SoCs having "Kona" style
clock control units (CCUs). A CCU is a clock provider that manages
a set of clock signals. Each CCU is represented by a node in the
device tree.
This binding uses the common clock binding:
Documentation/devicetree/bindings/clock/clock-bindings.txt
Required properties:
- compatible
Shall have a value of the form "brcm,<model>-<which>-ccu",
where <model> is a Broadcom SoC model number and <which> is
the name of a defined CCU. For example:
"brcm,bcm11351-root-ccu"
The compatible strings used for each supported SoC family
are defined below.
- reg
Shall define the base and range of the address space
containing clock control registers
- #clock-cells
Shall have value <1>. The permitted clock-specifier values
are defined below.
- clock-output-names
Shall be an ordered list of strings defining the names of
the clocks provided by the CCU.
Device tree example:
slave_ccu: slave_ccu {
compatible = "brcm,bcm11351-slave-ccu";
reg = <0x3e011000 0x0f00>;
#clock-cells = <1>;
clock-output-names = "uartb",
"uartb2",
"uartb3",
"uartb4";
};
ref_crystal_clk: ref_crystal {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <26000000>;
};
uart@3e002000 {
compatible = "brcm,bcm11351-dw-apb-uart", "snps,dw-apb-uart";
reg = <0x3e002000 0x1000>;
clocks = <&slave_ccu BCM281XX_SLAVE_CCU_UARTB3>;
interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
reg-shift = <2>;
reg-io-width = <4>;
};
BCM281XX family
---------------
CCU compatible string values for SoCs in the BCM281XX family are:
"brcm,bcm11351-root-ccu"
"brcm,bcm11351-aon-ccu"
"brcm,bcm11351-hub-ccu"
"brcm,bcm11351-master-ccu"
"brcm,bcm11351-slave-ccu"
The following table defines the set of CCUs and clock specifiers for
BCM281XX family clocks. When a clock consumer references a clocks,
its symbolic specifier (rather than its numeric index value) should
be used. These specifiers are defined in:
"include/dt-bindings/clock/bcm281xx.h"
CCU Clock Type Index Specifier
--- ----- ---- ----- ---------
root frac_1m peri 0 BCM281XX_ROOT_CCU_FRAC_1M
aon hub_timer peri 0 BCM281XX_AON_CCU_HUB_TIMER
aon pmu_bsc peri 1 BCM281XX_AON_CCU_PMU_BSC
aon pmu_bsc_var peri 2 BCM281XX_AON_CCU_PMU_BSC_VAR
hub tmon_1m peri 0 BCM281XX_HUB_CCU_TMON_1M
master sdio1 peri 0 BCM281XX_MASTER_CCU_SDIO1
master sdio2 peri 1 BCM281XX_MASTER_CCU_SDIO2
master sdio3 peri 2 BCM281XX_MASTER_CCU_SDIO3
master sdio4 peri 3 BCM281XX_MASTER_CCU_SDIO4
master dmac peri 4 BCM281XX_MASTER_CCU_DMAC
master usb_ic peri 5 BCM281XX_MASTER_CCU_USB_IC
master hsic2_48m peri 6 BCM281XX_MASTER_CCU_HSIC_48M
master hsic2_12m peri 7 BCM281XX_MASTER_CCU_HSIC_12M
slave uartb peri 0 BCM281XX_SLAVE_CCU_UARTB
slave uartb2 peri 1 BCM281XX_SLAVE_CCU_UARTB2
slave uartb3 peri 2 BCM281XX_SLAVE_CCU_UARTB3
slave uartb4 peri 3 BCM281XX_SLAVE_CCU_UARTB4
slave ssp0 peri 4 BCM281XX_SLAVE_CCU_SSP0
slave ssp2 peri 5 BCM281XX_SLAVE_CCU_SSP2
slave bsc1 peri 6 BCM281XX_SLAVE_CCU_BSC1
slave bsc2 peri 7 BCM281XX_SLAVE_CCU_BSC2
slave bsc3 peri 8 BCM281XX_SLAVE_CCU_BSC3
slave pwm peri 9 BCM281XX_SLAVE_CCU_PWM
BCM21664 family
---------------
CCU compatible string values for SoCs in the BCM21664 family are:
"brcm,bcm21664-root-ccu"
"brcm,bcm21664-aon-ccu"
"brcm,bcm21664-master-ccu"
"brcm,bcm21664-slave-ccu"
The following table defines the set of CCUs and clock specifiers for
BCM21664 family clocks. When a clock consumer references a clocks,
its symbolic specifier (rather than its numeric index value) should
be used. These specifiers are defined in:
"include/dt-bindings/clock/bcm21664.h"
CCU Clock Type Index Specifier
--- ----- ---- ----- ---------
root frac_1m peri 0 BCM21664_ROOT_CCU_FRAC_1M
aon hub_timer peri 0 BCM21664_AON_CCU_HUB_TIMER
master sdio1 peri 0 BCM21664_MASTER_CCU_SDIO1
master sdio2 peri 1 BCM21664_MASTER_CCU_SDIO2
master sdio3 peri 2 BCM21664_MASTER_CCU_SDIO3
master sdio4 peri 3 BCM21664_MASTER_CCU_SDIO4
master sdio1_sleep peri 4 BCM21664_MASTER_CCU_SDIO1_SLEEP
master sdio2_sleep peri 5 BCM21664_MASTER_CCU_SDIO2_SLEEP
master sdio3_sleep peri 6 BCM21664_MASTER_CCU_SDIO3_SLEEP
master sdio4_sleep peri 7 BCM21664_MASTER_CCU_SDIO4_SLEEP
slave uartb peri 0 BCM21664_SLAVE_CCU_UARTB
slave uartb2 peri 1 BCM21664_SLAVE_CCU_UARTB2
slave uartb3 peri 2 BCM21664_SLAVE_CCU_UARTB3
slave uartb4 peri 3 BCM21664_SLAVE_CCU_UARTB4
slave bsc1 peri 4 BCM21664_SLAVE_CCU_BSC1
slave bsc2 peri 5 BCM21664_SLAVE_CCU_BSC2
slave bsc3 peri 6 BCM21664_SLAVE_CCU_BSC3
slave bsc4 peri 7 BCM21664_SLAVE_CCU_BSC4

181
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@ -0,0 +1,181 @@
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
%YAML 1.2
---
$id: http://devicetree.org/schemas/clock/brcm,kona-ccu.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Broadcom Kona family clock control units (CCU)
maintainers:
- Florian Fainelli <florian.fainelli@broadcom.com>
- Ray Jui <rjui@broadcom.com>
- Scott Branden <sbranden@broadcom.com>
description: |
Broadcom "Kona" style clock control unit (CCU) is a clock provider that
manages a set of clock signals.
All available clock IDs are defined in
- include/dt-bindings/clock/bcm281xx.h for BCM281XX family
- include/dt-bindings/clock/bcm21664.h for BCM21664 family
properties:
compatible:
enum:
- brcm,bcm11351-aon-ccu
- brcm,bcm11351-hub-ccu
- brcm,bcm11351-master-ccu
- brcm,bcm11351-root-ccu
- brcm,bcm11351-slave-ccu
- brcm,bcm21664-aon-ccu
- brcm,bcm21664-master-ccu
- brcm,bcm21664-root-ccu
- brcm,bcm21664-slave-ccu
reg:
maxItems: 1
'#clock-cells':
const: 1
clock-output-names:
minItems: 1
maxItems: 10
required:
- compatible
- reg
- '#clock-cells'
- clock-output-names
allOf:
- if:
properties:
compatible:
contains:
const: brcm,bcm11351-aon-ccu
then:
properties:
clock-output-names:
items:
- const: hub_timer
- const: pmu_bsc
- const: pmu_bsc_var
- if:
properties:
compatible:
contains:
const: brcm,bcm11351-hub-ccu
then:
properties:
clock-output-names:
const: tmon_1m
- if:
properties:
compatible:
contains:
const: brcm,bcm11351-master-ccu
then:
properties:
clock-output-names:
items:
- const: sdio1
- const: sdio2
- const: sdio3
- const: sdio4
- const: usb_ic
- const: hsic2_48m
- const: hsic2_12m
- if:
properties:
compatible:
contains:
enum:
- brcm,bcm11351-root-ccu
- brcm,bcm21664-root-ccu
then:
properties:
clock-output-names:
const: frac_1m
- if:
properties:
compatible:
contains:
const: brcm,bcm11351-slave-ccu
then:
properties:
clock-output-names:
items:
- const: uartb
- const: uartb2
- const: uartb3
- const: uartb4
- const: ssp0
- const: ssp2
- const: bsc1
- const: bsc2
- const: bsc3
- const: pwm
- if:
properties:
compatible:
contains:
const: brcm,bcm21664-aon-ccu
then:
properties:
clock-output-names:
const: hub_timer
- if:
properties:
compatible:
contains:
const: brcm,bcm21664-master-ccu
then:
properties:
clock-output-names:
items:
- const: sdio1
- const: sdio2
- const: sdio3
- const: sdio4
- const: sdio1_sleep
- const: sdio2_sleep
- const: sdio3_sleep
- const: sdio4_sleep
- if:
properties:
compatible:
contains:
const: brcm,bcm21664-slave-ccu
then:
properties:
clock-output-names:
items:
- const: uartb
- const: uartb2
- const: uartb3
- const: bsc1
- const: bsc2
- const: bsc3
- const: bsc4
additionalProperties: false
examples:
- |
clock-controller@3e011000 {
compatible = "brcm,bcm11351-slave-ccu";
reg = <0x3e011000 0x0f00>;
#clock-cells = <1>;
clock-output-names = "uartb",
"uartb2",
"uartb3",
"uartb4",
"ssp0",
"ssp2",
"bsc1",
"bsc2",
"bsc3",
"pwm";
};
...

42
Documentation/devicetree/bindings/clock/fsl,imx93-anatop.yaml Normal file
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@ -0,0 +1,42 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/clock/fsl,imx93-anatop.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: NXP i.MX93 ANATOP Clock Module
maintainers:
- Peng Fan <peng.fan@nxp.com>
description: |
NXP i.MX93 ANATOP module which contains PLL and OSC to Clock Controller
Module.
properties:
compatible:
items:
- const: fsl,imx93-anatop
reg:
maxItems: 1
'#clock-cells':
const: 1
required:
- compatible
- reg
- '#clock-cells'
additionalProperties: false
examples:
- |
clock-controller@44480000 {
compatible = "fsl,imx93-anatop";
reg = <0x44480000 0x2000>;
#clock-cells = <1>;
};
...

106
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@ -0,0 +1,106 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/clock/google,gs101-clock.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Google GS101 SoC clock controller
maintainers:
- Peter Griffin <peter.griffin@linaro.org>
description: |
Google GS101 clock controller is comprised of several CMU units, generating
clocks for different domains. Those CMU units are modeled as separate device
tree nodes, and might depend on each other. The root clock in that clock tree
is OSCCLK (24.576 MHz). That external clock must be defined as a fixed-rate
clock in dts.
CMU_TOP is a top-level CMU, where all base clocks are prepared using PLLs and
dividers; all other leaf clocks (other CMUs) are usually derived from CMU_TOP.
Each clock is assigned an identifier and client nodes can use this identifier
to specify the clock which they consume. All clocks available for usage
in clock consumer nodes are defined as preprocessor macros in
'dt-bindings/clock/gs101.h' header.
properties:
compatible:
enum:
- google,gs101-cmu-top
- google,gs101-cmu-apm
- google,gs101-cmu-misc
clocks:
minItems: 1
maxItems: 2
clock-names:
minItems: 1
maxItems: 2
"#clock-cells":
const: 1
reg:
maxItems: 1
required:
- compatible
- "#clock-cells"
- clocks
- clock-names
- reg
allOf:
- if:
properties:
compatible:
contains:
enum:
- google,gs101-cmu-top
- google,gs101-cmu-apm
then:
properties:
clocks:
items:
- description: External reference clock (24.576 MHz)
clock-names:
items:
- const: oscclk
- if:
properties:
compatible:
contains:
const: google,gs101-cmu-misc
then:
properties:
clocks:
items:
- description: Misc bus clock (from CMU_TOP)
- description: Misc sss clock (from CMU_TOP)
clock-names:
items:
- const: dout_cmu_misc_bus
- const: dout_cmu_misc_sss
additionalProperties: false
examples:
# Clock controller node for CMU_TOP
- |
#include <dt-bindings/clock/google,gs101.h>
cmu_top: clock-controller@1e080000 {
compatible = "google,gs101-cmu-top";
reg = <0x1e080000 0x8000>;
#clock-cells = <1>;
clocks = <&ext_24_5m>;
clock-names = "oscclk";
};
...

20
Documentation/devicetree/bindings/clock/hi3620-clock.txt
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@ -1,20 +0,0 @@
* Hisilicon Hi3620 Clock Controller
The Hi3620 clock controller generates and supplies clock to various
controllers within the Hi3620 SoC.
Required Properties:
- compatible: should be one of the following.
- "hisilicon,hi3620-clock" - controller compatible with Hi3620 SoC.
- "hisilicon,hi3620-mmc-clock" - controller specific for Hi3620 mmc.
- reg: physical base address of the controller and length of memory mapped
region.
- #clock-cells: should be 1.
Each clock is assigned an identifier and client nodes use this identifier
to specify the clock which they consume.
All these identifier could be found in <dt-bindings/clock/hi3620-clock.h>.

1
Documentation/devicetree/bindings/clock/mediatek,apmixedsys.yaml
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@ -22,6 +22,7 @@ properties:
- mediatek,mt7622-apmixedsys
- mediatek,mt7981-apmixedsys
- mediatek,mt7986-apmixedsys
- mediatek,mt7988-apmixedsys
- mediatek,mt8135-apmixedsys
- mediatek,mt8173-apmixedsys
- mediatek,mt8516-apmixedsys

55
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@ -0,0 +1,55 @@
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
%YAML 1.2
---
$id: http://devicetree.org/schemas/clock/mediatek,ethsys.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Mediatek ethsys controller
description:
The available clocks are defined in dt-bindings/clock/mt*-clk.h.
maintainers:
- James Liao <jamesjj.liao@mediatek.com>
properties:
compatible:
oneOf:
- items:
- enum:
- mediatek,mt2701-ethsys
- mediatek,mt7622-ethsys
- mediatek,mt7629-ethsys
- mediatek,mt7981-ethsys
- mediatek,mt7986-ethsys
- mediatek,mt7988-ethsys
- const: syscon
- items:
- const: mediatek,mt7623-ethsys
- const: mediatek,mt2701-ethsys
- const: syscon
reg:
maxItems: 1
"#clock-cells":
const: 1
"#reset-cells":
const: 1
required:
- reg
- "#clock-cells"
- "#reset-cells"
additionalProperties: false
examples:
- |
clock-controller@1b000000 {
compatible = "mediatek,mt2701-ethsys", "syscon";
reg = <0x1b000000 0x1000>;
#clock-cells = <1>;
#reset-cells = <1>;
};

52
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@ -0,0 +1,52 @@
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/clock/mediatek,mt7988-ethwarp.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: MediaTek MT7988 ethwarp Controller
maintainers:
- Daniel Golle <daniel@makrotopia.org>
description:
The Mediatek MT7988 ethwarp controller provides clocks and resets for the
Ethernet related subsystems found the MT7988 SoC.
The clock values can be found in <dt-bindings/clock/mt*-clk.h>.
properties:
compatible:
items:
- const: mediatek,mt7988-ethwarp
reg:
maxItems: 1
'#clock-cells':
const: 1
'#reset-cells':
const: 1
required:
- compatible
- reg
- '#clock-cells'
- '#reset-cells'
additionalProperties: false
examples:
- |
#include <dt-bindings/reset/ti-syscon.h>
soc {
#address-cells = <2>;
#size-cells = <2>;
clock-controller@15031000 {
compatible = "mediatek,mt7988-ethwarp";
reg = <0 0x15031000 0 0x1000>;
#clock-cells = <1>;
#reset-cells = <1>;
};
};

48
Documentation/devicetree/bindings/clock/mediatek,mt7988-xfi-pll.yaml Normal file
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@ -0,0 +1,48 @@
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/clock/mediatek,mt7988-xfi-pll.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: MediaTek MT7988 XFI PLL Clock Controller
maintainers:
- Daniel Golle <daniel@makrotopia.org>
description:
The MediaTek XFI PLL controller provides the 156.25MHz clock for the
Ethernet SerDes PHY from the 40MHz top_xtal clock.
properties:
compatible:
const: mediatek,mt7988-xfi-pll
reg:
maxItems: 1
resets:
maxItems: 1
'#clock-cells':
const: 1
required:
- compatible
- reg
- resets
- '#clock-cells'
additionalProperties: false
examples:
- |
soc {
#address-cells = <2>;
#size-cells = <2>;
clock-controller@11f40000 {
compatible = "mediatek,mt7988-xfi-pll";
reg = <0 0x11f40000 0 0x1000>;
resets = <&watchdog 16>;
#clock-cells = <1>;
};
};

2
Documentation/devicetree/bindings/clock/mediatek,mt8188-clock.yaml
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@ -43,8 +43,6 @@ properties:
- mediatek,mt8188-vdecsys
- mediatek,mt8188-vdecsys-soc
- mediatek,mt8188-vencsys
- mediatek,mt8188-vppsys0
- mediatek,mt8188-vppsys1
- mediatek,mt8188-wpesys
- mediatek,mt8188-wpesys-vpp0

2
Documentation/devicetree/bindings/clock/mediatek,topckgen.yaml
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@ -37,6 +37,8 @@ properties:
- mediatek,mt7629-topckgen
- mediatek,mt7981-topckgen
- mediatek,mt7986-topckgen
- mediatek,mt7988-mcusys
- mediatek,mt7988-topckgen
- mediatek,mt8167-topckgen
- mediatek,mt8183-topckgen
- const: syscon

1
Documentation/devicetree/bindings/clock/qcom,a53pll.yaml
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@ -16,6 +16,7 @@ description:
properties:
compatible:
enum:
- qcom,ipq5018-a53pll
- qcom,ipq5332-a53pll
- qcom,ipq6018-a53pll
- qcom,ipq8074-a53pll

18
Documentation/devicetree/bindings/clock/qcom,camcc-sm8250.yaml
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@ -15,6 +15,9 @@ description: |
See also:: include/dt-bindings/clock/qcom,camcc-sm8250.h
allOf:
- $ref: qcom,gcc.yaml#
properties:
compatible:
const: qcom,sm8250-camcc
@ -33,15 +36,6 @@ properties:
- const: bi_tcxo_ao
- const: sleep_clk
'#clock-cells':
const: 1
'#reset-cells':
const: 1
'#power-domain-cells':
const: 1
power-domains:
items:
- description: MMCX power domain
@ -56,14 +50,10 @@ properties:
required:
- compatible
- reg
- clocks
- clock-names
- '#clock-cells'
- '#reset-cells'
- '#power-domain-cells'
additionalProperties: false
unevaluatedProperties: false
examples:
- |

57
Documentation/devicetree/bindings/clock/qcom,gcc-ipq6018.yaml Normal file
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@ -0,0 +1,57 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/clock/qcom,gcc-ipq6018.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Qualcomm Global Clock & Reset Controller on IPQ6018
maintainers:
- Stephen Boyd <sboyd@kernel.org>
- Taniya Das <quic_tdas@quicinc.com>
- Robert Marko <robimarko@gmail.com>
description: |
Qualcomm global clock control module provides the clocks, resets and power
domains on IPQ6018.
See also::
include/dt-bindings/clock/qcom,gcc-ipq6018.h
include/dt-bindings/reset/qcom,gcc-ipq6018.h
allOf:
- $ref: qcom,gcc.yaml#
properties:
compatible:
const: qcom,gcc-ipq6018
clocks:
items:
- description: board XO clock
- description: sleep clock
clock-names:
items:
- const: xo
- const: sleep_clk
required:
- compatible
- clocks
- clock-names
unevaluatedProperties: false
examples:
- |
clock-controller@1800000 {
compatible = "qcom,gcc-ipq6018";
reg = <0x01800000 0x80000>;
clocks = <&xo>, <&sleep_clk>;
clock-names = "xo", "sleep_clk";
#clock-cells = <1>;
#power-domain-cells = <1>;
#reset-cells = <1>;
};
...

4
Documentation/devicetree/bindings/clock/qcom,gcc-ipq8074.yaml
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@ -27,11 +27,15 @@ properties:
items:
- description: board XO clock
- description: sleep clock
- description: Gen3 QMP PCIe PHY PIPE clock
- description: Gen2 QMP PCIe PHY PIPE clock
clock-names:
items:
- const: xo
- const: sleep_clk
- const: pcie0_pipe
- const: pcie1_pipe
required:
- compatible

3
Documentation/devicetree/bindings/clock/qcom,gcc-other.yaml
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@ -15,8 +15,6 @@ description: |
domains.
See also::
include/dt-bindings/clock/qcom,gcc-ipq6018.h
include/dt-bindings/reset/qcom,gcc-ipq6018.h
include/dt-bindings/clock/qcom,gcc-msm8953.h
include/dt-bindings/clock/qcom,gcc-mdm9607.h
@ -26,7 +24,6 @@ allOf:
properties:
compatible:
enum:
- qcom,gcc-ipq6018
- qcom,gcc-mdm9607
required:

68
Documentation/devicetree/bindings/clock/qcom,qdu1000-ecpricc.yaml Normal file
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@ -0,0 +1,68 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/clock/qcom,qdu1000-ecpricc.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Qualcomm ECPRI Clock & Reset Controller for QDU1000 and QRU1000
maintainers:
- Taniya Das <quic_tdas@quicinc.com>
- Imran Shaik <quic_imrashai@quicinc.com>
description: |
Qualcomm ECPRI Specification V2.0 Common Public Radio Interface clock control
module which supports the clocks, resets on QDU1000 and QRU1000
See also:: include/dt-bindings/clock/qcom,qdu1000-ecpricc.h
properties:
compatible:
enum:
- qcom,qdu1000-ecpricc
reg:
maxItems: 1
clocks:
items:
- description: Board XO source
- description: GPLL0 source from GCC
- description: GPLL1 source from GCC
- description: GPLL2 source from GCC
- description: GPLL3 source from GCC
- description: GPLL4 source from GCC
- description: GPLL5 source from GCC
'#clock-cells':
const: 1
'#reset-cells':
const: 1
required:
- compatible
- reg
- clocks
- '#clock-cells'
- '#reset-cells'
additionalProperties: false
examples:
- |
#include <dt-bindings/clock/qcom,qdu1000-gcc.h>
#include <dt-bindings/clock/qcom,rpmh.h>
clock-controller@280000 {
compatible = "qcom,qdu1000-ecpricc";
reg = <0x00280000 0x31c00>;
clocks = <&rpmhcc RPMH_CXO_CLK>,
<&gcc GCC_ECPRI_CC_GPLL0_CLK_SRC>,
<&gcc GCC_ECPRI_CC_GPLL1_EVEN_CLK_SRC>,
<&gcc GCC_ECPRI_CC_GPLL2_EVEN_CLK_SRC>,
<&gcc GCC_ECPRI_CC_GPLL3_CLK_SRC>,
<&gcc GCC_ECPRI_CC_GPLL4_CLK_SRC>,
<&gcc GCC_ECPRI_CC_GPLL5_EVEN_CLK_SRC>;
#clock-cells = <1>;
#reset-cells = <1>;
};

2
Documentation/devicetree/bindings/clock/qcom,rpmhcc.yaml
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@ -35,6 +35,8 @@ properties:
- qcom,sm8350-rpmh-clk
- qcom,sm8450-rpmh-clk
- qcom,sm8550-rpmh-clk
- qcom,sm8650-rpmh-clk
- qcom,x1e80100-rpmh-clk
clocks:
maxItems: 1

18
Documentation/devicetree/bindings/clock/qcom,sc7180-camcc.yaml
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@ -15,6 +15,9 @@ description: |
See also:: include/dt-bindings/clock/qcom,camcc-sc7180.h
allOf:
- $ref: qcom,gcc.yaml#
properties:
compatible:
const: qcom,sc7180-camcc
@ -31,28 +34,15 @@ properties:
- const: iface
- const: xo
'#clock-cells':
const: 1
'#reset-cells':
const: 1
'#power-domain-cells':
const: 1
reg:
maxItems: 1
required:
- compatible
- reg
- clocks
- clock-names
- '#clock-cells'
- '#reset-cells'
- '#power-domain-cells'
additionalProperties: false
unevaluatedProperties: false
examples:
- |

18
Documentation/devicetree/bindings/clock/qcom,sc7280-camcc.yaml
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@ -15,6 +15,9 @@ description: |
See also:: include/dt-bindings/clock/qcom,camcc-sc7280.h
allOf:
- $ref: qcom,gcc.yaml#
properties:
compatible:
const: qcom,sc7280-camcc
@ -31,28 +34,15 @@ properties:
- const: bi_tcxo_ao
- const: sleep_clk
'#clock-cells':
const: 1
'#reset-cells':
const: 1
'#power-domain-cells':
const: 1
reg:
maxItems: 1
required:
- compatible
- reg
- clocks
- clock-names
- '#clock-cells'
- '#reset-cells'
- '#power-domain-cells'
additionalProperties: false
unevaluatedProperties: false
examples:
- |

18
Documentation/devicetree/bindings/clock/qcom,sdm845-camcc.yaml
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@ -15,6 +15,9 @@ description: |
See also:: include/dt-bindings/clock/qcom,camcc-sm845.h
allOf:
- $ref: qcom,gcc.yaml#
properties:
compatible:
const: qcom,sdm845-camcc
@ -27,28 +30,15 @@ properties:
items:
- const: bi_tcxo
'#clock-cells':
const: 1
'#reset-cells':
const: 1
'#power-domain-cells':
const: 1
reg:
maxItems: 1
required:
- compatible
- reg
- clocks
- clock-names
- '#clock-cells'
- '#reset-cells'
- '#power-domain-cells'
additionalProperties: false
unevaluatedProperties: false
examples:
- |

20
Documentation/devicetree/bindings/clock/qcom,sm8450-camcc.yaml
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@ -16,10 +16,15 @@ description: |
See also::
include/dt-bindings/clock/qcom,sm8450-camcc.h
include/dt-bindings/clock/qcom,sm8550-camcc.h
include/dt-bindings/clock/qcom,sc8280xp-camcc.h
allOf:
- $ref: qcom,gcc.yaml#
properties:
compatible:
enum:
- qcom,sc8280xp-camcc
- qcom,sm8450-camcc
- qcom,sm8550-camcc
@ -40,29 +45,16 @@ properties:
description:
A phandle to an OPP node describing required MMCX performance point.
'#clock-cells':
const: 1
'#reset-cells':
const: 1
'#power-domain-cells':
const: 1
reg:
maxItems: 1
required:
- compatible
- reg
- clocks
- power-domains
- required-opps
- '#clock-cells'
- '#reset-cells'
- '#power-domain-cells'
additionalProperties: false
unevaluatedProperties: false
examples:
- |

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