The ROHM BD96801 "scalable PMIC" provides two physical IRQs. The ERRB
handling can in many cases be omitted because it is used to inform fatal
IRQs, which usually kill the power from the SOC.
There may however be use-cases where the SOC has a 'back-up' emergency
power source which allows some very short time of operation to try to
gracefully shut down sensitive hardware. Furthermore, it is possible the
processor controlling the PMIC is not powered by the PMIC. In such cases
handling the ERRB IRQs may be beneficial.
Add support for ERRB IRQs.
Signed-off-by: Matti Vaittinen <mazziesaccount@gmail.com>
Link: https://lore.kernel.org/r/dda4464443fba81f79d5f8d73947dbd63083cff2.1727931468.git.mazziesaccount@gmail.com
Signed-off-by: Lee Jones <lee@kernel.org>
The maple tree register cache uses a more modern data structure than the
rbtree cache and makes implementation decisions more suited to modern
hardware, switch the bd96801 driver to it to take advantage of this newer
code. No functional changes.
Signed-off-by: Mark Brown <broonie@kernel.org>
Reviewed-by: Matti Vaittinen <mazziesaccount@gmail.com>
Link: https://lore.kernel.org/r/20240924-mfd-bd96801-maple-v1-1-04fe33e1f009@kernel.org
Signed-off-by: Lee Jones <lee@kernel.org>
