Commit Graph

940 Commits

Author SHA1 Message Date
Linus Torvalds
55cb93fd24 Driver core changes for 6.13-rc1
Here is a small set of driver core changes for 6.13-rc1.
 
 Nothing major for this merge cycle, except for the 2 simple merge
 conflicts are here just to make life interesting.
 
 Included in here are:
   - sysfs core changes and preparations for more sysfs api cleanups that
     can come through all driver trees after -rc1 is out
   - fw_devlink fixes based on many reports and debugging sessions
   - list_for_each_reverse() removal, no one was using it!
   - last-minute seq_printf() format string bug found and fixed in many
     drivers all at once.
   - minor bugfixes and changes full details in the shortlog
 
 As mentioned above, there is 2 merge conflicts with your tree, one is
 where the file is removed (easy enough to resolve), the second is a
 build time error, that has been found in linux-next and the fix can be
 seen here:
 	https://lore.kernel.org/r/20241107212645.41252436@canb.auug.org.au
 
 Other than that, the changes here have been in linux-next with no other
 reported issues.
 
 Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
 -----BEGIN PGP SIGNATURE-----
 
 iG0EABECAC0WIQT0tgzFv3jCIUoxPcsxR9QN2y37KQUCZ0lEog8cZ3JlZ0Brcm9h
 aC5jb20ACgkQMUfUDdst+ym+0ACgw6wN+LkLVIHWhxTq5DYHQ0QCxY8AoJrRIcKe
 78h0+OU3OXhOy8JGz62W
 =oI5S
 -----END PGP SIGNATURE-----

Merge tag 'driver-core-6.13-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/driver-core

Pull driver core updates from Greg KH:
 "Here is a small set of driver core changes for 6.13-rc1.

  Nothing major for this merge cycle, except for the two simple merge
  conflicts are here just to make life interesting.

  Included in here are:

   - sysfs core changes and preparations for more sysfs api cleanups
     that can come through all driver trees after -rc1 is out

   - fw_devlink fixes based on many reports and debugging sessions

   - list_for_each_reverse() removal, no one was using it!

   - last-minute seq_printf() format string bug found and fixed in many
     drivers all at once.

   - minor bugfixes and changes full details in the shortlog"

* tag 'driver-core-6.13-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/driver-core: (35 commits)
  Fix a potential abuse of seq_printf() format string in drivers
  cpu: Remove spurious NULL in attribute_group definition
  s390/con3215: Remove spurious NULL in attribute_group definition
  perf: arm-ni: Remove spurious NULL in attribute_group definition
  driver core: Constify bin_attribute definitions
  sysfs: attribute_group: allow registration of const bin_attribute
  firmware_loader: Fix possible resource leak in fw_log_firmware_info()
  drivers: core: fw_devlink: Fix excess parameter description in docstring
  driver core: class: Correct WARN() message in APIs class_(for_each|find)_device()
  cacheinfo: Use of_property_present() for non-boolean properties
  cdx: Fix cdx_mmap_resource() after constifying attr in ->mmap()
  drivers: core: fw_devlink: Make the error message a bit more useful
  phy: tegra: xusb: Set fwnode for xusb port devices
  drm: display: Set fwnode for aux bus devices
  driver core: fw_devlink: Stop trying to optimize cycle detection logic
  driver core: Constify attribute arguments of binary attributes
  sysfs: bin_attribute: add const read/write callback variants
  sysfs: implement all BIN_ATTR_* macros in terms of __BIN_ATTR()
  sysfs: treewide: constify attribute callback of bin_attribute::llseek()
  sysfs: treewide: constify attribute callback of bin_attribute::mmap()
  ...
2024-11-29 11:43:29 -08:00
Miquel Raynal
34267d3c26 SPI NOR introduces byte swap support for 8D-8D-8D mode and a user for
it: macronix. SPI NOR flashes may swap the bytes on a 16-bit boundary
 when configured in Octal DTR mode. For such cases the byte order is
 propagated through SPI MEM to the SPI controllers so that the controllers
 swap the bytes back at runtime. This avoids breaking the boot sequence
 because of the endianness problems that appear when the bootloaders use
 1-1-1 and the kernel uses 8D-8D-8D with byte swap support. Along with the
 SPI MEM byte swap support we queue a patch for the SPI MXIC controller
 that swaps the bytes back at runtime.
 -----BEGIN PGP SIGNATURE-----
 
 iQEzBAABCgAdFiEEHUIqys8OyG1eHf7fS1VPR6WNFOkFAmczG/oACgkQS1VPR6WN
 FOnTCAf/YjH9AimQAFJLRKoGqsf6boh1JppcRh1YTRS+D6+Ap9+s1gJoZZYs5VWA
 vNfBzGqDXknBvpmOgoXnuDu2zFs9FUvdN5Kf7w6LiS5qtz7uOxHdVoDQyDgnN6w5
 9ts7qF7LViBHg/HgTEzQT2Zj6qmvIwUbccIkmJeehWjEP/urzOML5nPnM9g4HZVB
 W8B5KQ4TiOY1GxkXvIP6EQS6mDKznP3yl2Hnsmk0HPpSm6D807O2zvT+z1SCxpjy
 C8+mYRKsRxHoFGL6UzWgqREGBn2wzF7Ral1CR9SpSZZLLtr6S0shqRzKiiH8eiZK
 1hFpXzMS3OWi4a/5724AWaqcR0Qgqw==
 =jf3Q
 -----END PGP SIGNATURE-----

Merge tag 'spi-nor/for-6.13' of git://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux into mtd/next

SPI NOR introduces byte swap support for 8D-8D-8D mode and a user for
it: macronix. SPI NOR flashes may swap the bytes on a 16-bit boundary
when configured in Octal DTR mode. For such cases the byte order is
propagated through SPI MEM to the SPI controllers so that the controllers
swap the bytes back at runtime. This avoids breaking the boot sequence
because of the endianness problems that appear when the bootloaders use
1-1-1 and the kernel uses 8D-8D-8D with byte swap support. Along with the
SPI MEM byte swap support we queue a patch for the SPI MXIC controller
that swaps the bytes back at runtime.

# -----BEGIN PGP SIGNATURE-----
#
# iQEzBAABCgAdFiEEHUIqys8OyG1eHf7fS1VPR6WNFOkFAmczG/oACgkQS1VPR6WN
# FOnTCAf/YjH9AimQAFJLRKoGqsf6boh1JppcRh1YTRS+D6+Ap9+s1gJoZZYs5VWA
# vNfBzGqDXknBvpmOgoXnuDu2zFs9FUvdN5Kf7w6LiS5qtz7uOxHdVoDQyDgnN6w5
# 9ts7qF7LViBHg/HgTEzQT2Zj6qmvIwUbccIkmJeehWjEP/urzOML5nPnM9g4HZVB
# W8B5KQ4TiOY1GxkXvIP6EQS6mDKznP3yl2Hnsmk0HPpSm6D807O2zvT+z1SCxpjy
# C8+mYRKsRxHoFGL6UzWgqREGBn2wzF7Ral1CR9SpSZZLLtr6S0shqRzKiiH8eiZK
# 1hFpXzMS3OWi4a/5724AWaqcR0Qgqw==
# =jf3Q
# -----END PGP SIGNATURE-----
# gpg: Signature made Tue 12 Nov 2024 10:12:26 AM CET
# gpg:                using RSA key 1D422ACACF0EC86D5E1DFEDF4B554F47A58D14E9
# gpg: Good signature from "Tudor Ambarus (4096-bit rsa key) <tudor.ambarus@microchip.com>" [full]
# gpg:                 aka "Tudor Ambarus <tudor.ambarus@gmail.com>" [full]
# gpg: tudor.ambarus@microchip.com: Verified 15 signatures in the past 5 years.
#      Encrypted 0 messages.
# gpg: tudor.ambarus@gmail.com: Verified 15 signatures in the past 5 years.
#      Encrypted 0 messages.
2024-11-19 12:15:24 +01:00
Cheng Ming Lin
98d1fb94ce
mtd: spi-nor: core: replace dummy buswidth from addr to data
The default dummy cycle for Macronix SPI NOR flash in Octal Output
Read Mode(1-1-8) is 20.

Currently, the dummy buswidth is set according to the address bus width.
In the 1-1-8 mode, this means the dummy buswidth is 1. When converting
dummy cycles to bytes, this results in 20 x 1 / 8 = 2 bytes, causing the
host to read data 4 cycles too early.

Since the protocol data buswidth is always greater than or equal to the
address buswidth. Setting the dummy buswidth to match the data buswidth
increases the likelihood that the dummy cycle-to-byte conversion will be
divisible, preventing the host from reading data prematurely.

Fixes: 0e30f47232 ("mtd: spi-nor: add support for DTR protocol")
Cc: stable@vger.kernel.org
Reviewed-by: Pratyush Yadav <pratyush@kernel.org>
Signed-off-by: Cheng Ming Lin <chengminglin@mxic.com.tw>
Link: https://lore.kernel.org/r/20241112075242.174010-2-linchengming884@gmail.com
Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org>
2024-11-12 10:31:17 +02:00
Tudor Ambarus
f8f6224948
mtd: spi-nor: winbond: add "w/ and w/o SFDP" comment
Commit d35df77707 ("mtd: spi-nor: winbond: fix w25q128 regression")
upstream fixed a regression for flavors of 0xef4018 flash that don't
define SFDP tables. Add a comment on the flash definition highlighting
that there are flavors of flashes with and without SFDP support.
It spares developers searching the entire git log for when we'll better
handle these cases.

Acked-by: Pratyush Yadav <pratyush@kernel.org>
Link: https://lore.kernel.org/r/20241029080049.96679-1-tudor.ambarus@linaro.org
Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org>
2024-11-11 12:26:04 +02:00
Thomas Weißschuh
b626816fdd sysfs: treewide: constify attribute callback of bin_is_visible()
The is_bin_visible() callbacks should not modify the struct
bin_attribute passed as argument.
Enforce this by marking the argument as const.

As there are not many callback implementers perform this change
throughout the tree at once.

Signed-off-by: Thomas Weißschuh <linux@weissschuh.net>
Acked-by: Martin K. Petersen <martin.petersen@oracle.com>
Acked-by: Jason Gunthorpe <jgg@nvidia.com>
Acked-by: Ira Weiny <ira.weiny@intel.com>
Acked-by: Krzysztof Wilczyński <kw@linux.com>
Link: https://lore.kernel.org/r/20241103-sysfs-const-bin_attr-v2-5-71110628844c@weissschuh.net
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2024-11-05 14:00:28 +01:00
Takahiro Kuwano
b61c35e340 mtd: spi-nor: spansion: Use nor->addr_nbytes in octal DTR mode in RD_ANY_REG_OP
In octal DTR mode, RD_ANY_REG_OP needs to use 4-byte address regardless
of flash's internal address mode. Use nor->addr_nbytes which is set to 4
during setup.

Fixes: eff9604390 ("mtd: spi-nor: spansion: add octal DTR support in RD_ANY_REG_OP")
Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com>
Link: https://lore.kernel.org/r/20241016000837.17951-1-Takahiro.Kuwano@infineon.com
Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org>
2024-10-29 08:23:00 +00:00
Uwe Kleine-König
f8470006c4 mtd: Switch back to struct platform_driver::remove()
After commit 0edb555a65 ("platform: Make platform_driver::remove()
return void") .remove() is (again) the right callback to implement for
platform drivers.

Convert all platform drivers below drivers/mtd to use .remove(), with
the eventual goal to drop struct platform_driver::remove_new(). As
.remove() and .remove_new() have the same prototypes, conversion is done
by just changing the structure member name in the driver initializer.

Signed-off-by: Uwe Kleine-König <u.kleine-koenig@baylibre.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20241007205803.444994-10-u.kleine-koenig@baylibre.com
2024-10-21 11:58:07 +02:00
AlvinZhou
afe1ea1344
mtd: spi-nor: add support for Macronix Octal flash
Add manufacturer ID 0xc2 at the end of ID table to allow manufacturer
fixups to be applied for any Macronix flash. This spares us of adding
new flash entries for flashes that can be initialized solely based on
the SFDP data, but still need the manufacturer hooks to set parameters
that can't be discovered at SFDP parsing time.

The ID is added in order to set the octal DTR methods. SFDP defines a
"Command Sequences to Change to Octal DDR (8D-8D-8D) Mode" which can
enable the octal DTR mode. Until that is parsed and used, use the
local defined method.

Suggested-by: Michael Walle <mwalle@kernel.org>
Signed-off-by: JaimeLiao <jaimeliao@mxic.com.tw>
Signed-off-by: AlvinZhou <alvinzhou@mxic.com.tw>
Link: https://lore.kernel.org/r/20240926141956.2386374-7-alvinzhou.tw@gmail.com
[ta: update commit message and comment in the code]
Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org>
2024-10-04 10:40:48 +03:00
Tudor Ambarus
46b6256a68
mtd: spi-nor: sfdp: Get the 8D-8D-8D byte order from BFPT
Parse BFPT in order to retrieve the byte order in 8D-8D-8D mode.

This info flag will be used as a basis to determine whether
there is byte swapping of data for SPI NOR flash in octal
DTR mode.

The controller driver will check whether byte swapping is supported
to determine whether the corresponding operation are supported,
thus avoiding the generation of unexpected data order.

Merge Tudor's patch and add modifications for suiting newer version
of Linux kernel.

Reviewed-by: Michael Walle <mwalle@kernel.org>
Signed-off-by: JaimeLiao <jaimeliao@mxic.com.tw>
Signed-off-by: AlvinZhou <alvinzhou@mxic.com.tw>
Link: https://lore.kernel.org/r/20240926141956.2386374-5-alvinzhou.tw@gmail.com
Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org>
2024-10-02 10:28:40 +03:00
Tudor Ambarus
6a42bc97cc
mtd: spi-nor: core: Allow specifying the byte order in Octal DTR mode
Macronix swaps bytes on a 16-bit boundary when configured in Octal DTR.
The byte order of 16-bit words is swapped when read or written in 8D-8D-8D
mode compared to STR modes. Allow operations to specify the byte order in
DTR mode, so that controllers can swap the bytes back at run-time to
address the flash's endianness requirements, if they are capable. If the
controller is not capable of swapping the bytes, the protocol is downgrade
via spi_nor_spimem_adjust_hwcaps(). When available, the swapping of the
bytes is always done regardless if it's a data or register access, so that
it comply with the JESD216 requirements: "Byte order of 16-bit words is
swapped when read in 8D-8D-8D mode compared to 1-1-1".

Merge Tudor's patch and add modifications for suiting newer version
of Linux kernel.

Suggested-by: Michael Walle <mwalle@kernel.org>
Signed-off-by: JaimeLiao <jaimeliao@mxic.com.tw>
Signed-off-by: AlvinZhou <alvinzhou@mxic.com.tw>
Link: https://lore.kernel.org/r/20240926141956.2386374-4-alvinzhou.tw@gmail.com
Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org>
2024-10-02 10:23:56 +03:00
AlvinZhou
ccac858d2b
mtd: spi-nor: add Octal DTR support for Macronix flash
Create Macronix specify method for enable Octal DTR mode and
set 20 dummy cycles to allow running at the maximum supported
frequency for Macronix Octal flash.

Use number of dummy cycles which is parse by SFDP then convert
it to bit pattern and set in CR2 register.
Set CR2 register for enable octal DTR mode.

Use Read ID to confirm that enabling/disabling octal DTR mode
was successful.

Macronix ID format is A-A-B-B-C-C in octal DTR mode.
To ensure the successful enablement of octal DTR mode, confirm
that the 6-byte data is entirely correct.

Co-developed-by: Tudor Ambarus <tudor.ambarus@linaro.org>
Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org>
Signed-off-by: JaimeLiao <jaimeliao@mxic.com.tw>
Signed-off-by: AlvinZhou <alvinzhou@mxic.com.tw>
Link: https://lore.kernel.org/r/20240926141956.2386374-2-alvinzhou.tw@gmail.com
2024-10-02 10:22:49 +03:00
Michael Walle
ac5bfa968b mtd: spi-nor: fix flash probing
Fix flash probing by name. Flash entries without a name are allowed
since commit 15eb8303bb ("mtd: spi-nor: mark the flash name as
obsolete"). But it was just until recently that a flash entry without a
name was actually introduced. This triggers a bug in the legacy probe by
name path. Skip entries without a name to fix it.

Fixes: 2095e7da8049 ("mtd: spi-nor: spansion: Add support for S28HS256T")
Reported-by: Jon Hunter <jonathanh@nvidia.com>
Closes: https://lore.kernel.org/r/66c8ebb0-1324-4ad9-9926-8d4eb7e1e63a@nvidia.com/
Tested-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Michael Walle <mwalle@kernel.org>
Reviewed-by: Tudor Ambarus <tudor.ambarus@linaro.org>
Reviewed-by: Pratyush Yadav <pratyush@kernel.org>
Signed-off-by: Pratyush Yadav <pratyush@kernel.org>
Link: https://lore.kernel.org/r/20240909072854.812206-1-mwalle@kernel.org
2024-09-14 17:56:31 +02:00
Takahiro Kuwano
1dc6cd4f94 mtd: spi-nor: spansion: Add support for S28HS256T
Infineon S28HS256T is 256Mb Octal SPI device which has same
functionalities with 512Mb and 1Gb parts.

Link: https://www.infineon.com/dgdl/Infineon-S28HS256T_S28HL256T_256Mb_SEMPER_Flash_Octal_interface_1_8V_3-DataSheet-v02_00-EN.pdf?fileId=8ac78c8c8fc2dd9c018fc66787aa0657
Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com>
Reviewed-by: Michael Walle <mwalle@kernel.org>
Signed-off-by: Pratyush Yadav <pratyush@kernel.org>
Link: https://lore.kernel.org/r/20240830080428.6994-1-Takahiro.Kuwano@infineon.com
2024-09-14 17:56:31 +02:00
Michael Walle
a84d45217c mtd: spi-nor: winbond: add Zetta ZD25Q128C support
Zetta normally uses BAh as its vendor ID. But for the ZD25Q128C they
took the one from Winbond and messed up the size parameters in SFDP.
Most functions seem compatible with the W25Q128, we just have to fix up
the size.

Link: http://www.zettadevice.com/upload/file/20150821/DS_Zetta_25Q128_RevA.pdf
Link: https://www.lcsc.com/datasheet/lcsc_datasheet_2312081757_Zetta-ZD25Q128CSIGT_C19626875.pdf
Signed-off-by: Michael Walle <mwalle@kernel.org>
Reviewed-by: Pratyush Yadav <pratyush@kernel.org>
Signed-off-by: Pratyush Yadav <pratyush@kernel.org>
Link: https://lore.kernel.org/r/20240804221535.291923-1-mwalle@kernel.org
2024-09-14 17:56:31 +02:00
Brian Norris
86fd0e6410 mtd: spi-nor: micron-st: Add n25q064a WP support
These flash chips are used on Google / TP-Link / ASUS OnHub devices, and
OnHub devices are write-protected by default (same as any other
ChromeOS/Chromebook system). I've referred to datasheets, and tested on
OnHub devices.

Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Reviewed-by: Michael Walle <mwalle@kernel.org>
Signed-off-by: Pratyush Yadav <pratyush@kernel.org>
Link: https://lore.kernel.org/r/20240726185825.142733-1-computersforpeace@gmail.com
2024-09-14 17:56:31 +02:00
Csókás, Bence
18bcb4aa54 mtd: spi-nor: sst: Factor out common write operation to sst_nor_write_data()
Writing to the Flash in `sst_nor_write()` is a 3-step process:
first an optional one-byte write to get 2-byte-aligned, then the
bulk of the data is written out in vendor-specific 2-byte writes.
Finally, if there's a byte left over, another one-byte write.
This was implemented 3 times in the body of `sst_nor_write()`.
To reduce code duplication, factor out these sub-steps to their
own function.

Signed-off-by: Csókás, Bence <csokas.bence@prolan.hu>
Reviewed-by: Pratyush Yadav <pratyush@kernel.org>
[pratyush@kernel.org: fixup whitespace, use %zu instead of %i in WARN()]
Signed-off-by: Pratyush Yadav <pratyush@kernel.org>
Link: https://lore.kernel.org/r/20240710091401.1282824-1-csokas.bence@prolan.hu
2024-09-14 17:56:31 +02:00
Michael Walle
d35df77707 mtd: spi-nor: winbond: fix w25q128 regression
Commit 83e824a4a5 ("mtd: spi-nor: Correct flags for Winbond w25q128")
removed the flags for non-SFDP devices. It was assumed that it wasn't in
use anymore. This wasn't true. Add the no_sfdp_flags as well as the size
again.

We add the additional flags for dual and quad read because they have
been reported to work properly by Hartmut using both older and newer
versions of this flash, the similar flashes with 64Mbit and 256Mbit
already have these flags and because it will (luckily) trigger our
legacy SFDP parsing, so newer versions with SFDP support will still get
the parameters from the SFDP tables.

Reported-by: Hartmut Birr <e9hack@gmail.com>
Closes: https://lore.kernel.org/r/CALxbwRo_-9CaJmt7r7ELgu+vOcgk=xZcGHobnKf=oT2=u4d4aA@mail.gmail.com/
Fixes: 83e824a4a5 ("mtd: spi-nor: Correct flags for Winbond w25q128")
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Michael Walle <mwalle@kernel.org>
Acked-by: Tudor Ambarus <tudor.ambarus@linaro.org>
Reviewed-by: Esben Haabendal <esben@geanix.com>
Reviewed-by: Pratyush Yadav <pratyush@kernel.org>
Signed-off-by: Pratyush Yadav <pratyush@kernel.org>
Link: https://lore.kernel.org/r/20240621120929.2670185-1-mwalle@kernel.org
2024-06-21 17:49:36 +02:00
Michael Walle
e159079a8b mtd: spi-nor: simplify spi_nor_get_flash_info()
Rework spi_nor_get_flash_info() to make it look more straight forward
and esp. don't return early. The latter is a preparation to check for
deprecated flashes.

Signed-off-by: Michael Walle <mwalle@kernel.org>
Reviewed-by: Pratyush Yadav <pratyush@kernel.org>
Signed-off-by: Pratyush Yadav <pratyush@kernel.org>
Link: https://lore.kernel.org/r/20240603134055.1859863-1-mwalle@kernel.org
2024-06-18 11:42:19 +02:00
Michael Walle
2d95d13248 mtd: spi-nor: get rid of SPI_NOR_NO_FR
The Everspin FRAM devices are the only user of the NO_FR flag. Drop the
global flag and instead use a manufacturer fixup for the Everspin
flashes to drop the fast read support.

Signed-off-by: Michael Walle <mwalle@kernel.org>
Reviewed-by: Tudor Ambarus <tudor.ambarus@linaro.org>
Reviewed-by: Pratyush Yadav <pratyush@kernel.org>
[pratyush@kernel.org: s/evervision/everspin/g in code and commit message]
Signed-off-by: Pratyush Yadav <pratyush@kernel.org>
Link: https://lore.kernel.org/r/20240419141249.609534-5-mwalle@kernel.org
2024-05-27 17:07:15 +02:00
Michael Walle
d323a41884 mtd: spi-nor: remove .setup() callback
With the removal of the Xilinx flashes, there is no more flash driver
using that hook. The original intention was to let the driver configure
special requirements like page size an opcodes.  This is already
possible by other means and it is unlikely a flash will overwrite the
(more or less complex) setup function.

Signed-off-by: Michael Walle <mwalle@kernel.org>
Reviewed-by: Pratyush Yadav <pratyush@kernel.org>
Acked-by: Tudor Ambarus <tudor.ambarus@linaro.org>
Signed-off-by: Pratyush Yadav <pratyush@kernel.org>
Link: https://lore.kernel.org/r/20240419141249.609534-4-mwalle@kernel.org
2024-05-27 17:07:15 +02:00
Michael Walle
9539d12d9f mtd: spi-nor: get rid of non-power-of-2 page size handling
The Xilinx flashes were the only users of page sizes that were not power
of 2. Support for them has been dropped, thus we can also get rid of the
special page size handling for it.

Signed-off-by: Michael Walle <mwalle@kernel.org>
Acked-by: Tudor Ambarus <tudor.ambarus@linaro.org>
Reviewed-by: Pratyush Yadav <pratyush@kernel.org>
[pratyush@kernel.org: fixup minor typos and grammar in commit message]
Signed-off-by: Pratyush Yadav <pratyush@kernel.org>
Link: https://lore.kernel.org/r/20240419141249.609534-3-mwalle@kernel.org
2024-05-27 16:58:45 +02:00
Michael Walle
be1d1a7657 mtd: spi-nor: Remove support for Xilinx S3AN flashes
These flashes are kind of an oddball for the very old Xilinx Spartan 3
FPGAs to store their bitstream. More importantly, they reuse the Atmel
JEDEC manufacturer ID and in fact the at45db081d already blocks the use
of the 3S700AN flash chip. It's time to sunset support for these
flashes.

Signed-off-by: Michael Walle <mwalle@kernel.org>
Acked-by: Tudor Ambarus <tudor.ambarus@linaro.org>
Reviewed-by: Pratyush Yadav <pratyush@kernel.org>
Cc: Ricardo Ribalda <ribalda@kernel.org>
Acked-by: Ricardo Ribalda <ribalda@chromium.org>
Signed-off-by: Pratyush Yadav <pratyush@kernel.org>
Link: https://lore.kernel.org/r/20240419141249.609534-2-mwalle@kernel.org
2024-05-27 16:39:21 +02:00
Michael Walle
c84b3925c7 mtd: spi-nor: replace unnecessary div64_u64() with div_u64()
Both occurrences of div64_u64() just have a u8 or u32 divisor. Use
div_u64() instead. Many 32 bit architectures can optimize this variant
better than a full 64 bit divide.

Reported-by: Dan Carpenter <dan.carpenter@linaro.org>
Link: https://lore.kernel.org/r/9ba7f4e6-2b8b-44a3-9cac-9ed6e50f1700@moroto.mountain/
Signed-off-by: Michael Walle <mwalle@kernel.org>
Reviewed-by: Pratyush Yadav <pratyush@kernel.org>
[pratyush@kernel.org: touched up commit message]
Signed-off-by: Pratyush Yadav <pratyush@kernel.org>
Link: https://lore.kernel.org/r/20240429121113.803703-1-mwalle@kernel.org
2024-04-29 17:36:48 +02:00
Muhammad Usama Anjum
2842dc9bc1 mtd: spi-nor: core: correct type of i
The i should be signed to find out the end of the loop. Otherwise,
i >= 0 is always true and loop becomes infinite. Make its type to be
int.

Fixes: 6a9eda3441 ("mtd: spi-nor: core: set mtd->eraseregions for non-uniform erase map")
Signed-off-by: Muhammad Usama Anjum <usama.anjum@collabora.com>
Reviewed-by: Tudor Ambarus <tudor.ambarus@linaro.org>
Reviewed-by: Michael Walle <mwalle@kernel.org>
Reviewed-by: Dan Carpenter <dan.carpenter@linaro.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20240304090103.818092-1-usama.anjum@collabora.com
2024-03-13 23:22:19 +01:00
Takahiro Kuwano
6a9eda3441
mtd: spi-nor: core: set mtd->eraseregions for non-uniform erase map
Some of Infineon SPI NOR flash devices support hybrid sector layout that
overlays 4KB sectors on a 256KB sector and SPI NOR framework recognizes
that by parsing SMPT and construct params->erase_map. The hybrid sector
layout is similar to CFI flash devices that have small sectors on top
and/or bottom address. In case of CFI flash devices, the erase map
information is parsed through CFI table and populated into
mtd->eraseregions so that users can create MTD partitions that aligned
with small sector boundaries. This patch provides the same capability to
SPI NOR flash devices that have non-uniform erase map.

Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com>
Reviewed-by: Michael Walle <mwalle@kernel.org>
Link: https://lore.kernel.org/r/35d0962986e493b06c13bdf7ada8130a9966dc02.1708404584.git.Takahiro.Kuwano@infineon.com
Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org>
2024-02-26 13:29:09 +02:00
Takahiro Kuwano
2865ed0e2c
mtd: spi-nor: core: get rid of SNOR_OVERLAID_REGION flag
Only SNOR_OVERLAID_REGION is defined for flags in the spi_nor_erase_region
structure. It can be replaced by a boolean parameter.

Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com>
Reviewed-by: Michael Walle <mwalle@kernel.org>
Link: https://lore.kernel.org/r/076416d5dc8328dec72d31db12b9bec96bf0ac66.1708404584.git.Takahiro.Kuwano@infineon.com
Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org>
2024-02-26 13:28:15 +02:00
Takahiro Kuwano
df6e36edac
mtd: spi-nor: core: get rid of SNOR_LAST_REGION flag
Introduce n_regions in spi_nor_erase_map structure and remove
SNOR_LAST_REGION flag. Loop logics that depend on the flag are also
reworked to use n_regions as loop condition.

Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com>
Suggested-by: Tudor Ambarus <tudor.ambarus@linaro.org>
Suggested-by: Michael Walle <mwalle@kernel.org>
Reviewed-by: Michael Walle <mwalle@kernel.org>
Link: https://lore.kernel.org/r/eded84294bd81e966d6f423e578fc2cfb9a4a5b6.1708404584.git.Takahiro.Kuwano@infineon.com
[ta: update spi_nor_init_erase_cmd_list() and break the for loop sooner.]
Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org>
2024-02-26 13:17:43 +02:00
Takahiro Kuwano
0e164238bb
mtd: spi-nor: core: rework struct spi_nor_erase_region
Encoding bitmask flags into offset worsen the code readability. The
erase type mask and flags should be stored in dedicated members. Also,
erase_map.uniform_erase_type can be removed as it is redundant.

Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com>
Suggested-by: Michael Walle <mwalle@kernel.org>
Reviewed-by: Michael Walle <mwalle@kernel.org>
Link: https://lore.kernel.org/r/8e5e9e4081ed9f16ea9dce30693304a4b54d19b1.1708404584.git.Takahiro.Kuwano@infineon.com
[ta: remove spi_nor_region_end()]
Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org>
2024-02-26 12:35:05 +02:00
Linus Torvalds
35f11a3710 * MTD
Apart from preventing the mtdblk to run on top of ftl or ubiblk (which
 may cause security issues and has no meaning anyway), there are a few
 misc fixes.
 
 * Raw NAND
 
 Two meaningful changes this time. The conversion of the brcmnand driver
 to the ->exec_op() API, this series brought additional changes to the
 core in order to help controller drivers to handle themselves the WP pin
 during destructive operations when relevant.
 
 There is also a series bringing important fixes to the sequential read
 feature.
 
 As always, there is as well a whole bunch of miscellaneous W=1 fixes,
 together with a few runtime fixes (double free, timeout value, OOB
 layout, missing register initialization) and the usual load of remove
 callbacks turned into void (which led to switch the txx9ndfmc driver to
 use module_platform_driver()).
 
 * SPI NOR
 
 SPI NOR comes with die erase support for multi die flashes, with new
 octal protocols (1-1-8 and 1-8-8) parsed from SFDP and with an updated
 documentation about what the contributors shall consider when proposing
 flash additions or updates.
 
 Michael Walle stepped out from the reviewer role to maintainer.
 -----BEGIN PGP SIGNATURE-----
 
 iQEzBAABCgAdFiEE9HuaYnbmDhq/XIDIJWrqGEe9VoQFAmWFeUsACgkQJWrqGEe9
 VoSBzQgAsUDieAMF4zIo5QN6l+8DpDMrkOK1Z5l4B/3goA2ZUz4cs80Kj/53l/kO
 tD8Ckn5SA82ZrVZiCJS5D8yplB+4+IWFU9dV/TcoINafLew5R/bBqo4XwgfVgvwy
 a4PuFlV9eedDW18cfbZA29TsnKoWdGaWxsyY+Gceukm94VuQbaZIPs3wkmBdWEOM
 V+FZaWg7vLW99x2XFDNpBqKFSzjTPAt1W5WM2ASdrb3pSKVOlt02qFlvMFwodVeR
 YExYwd1BNNsn9I6lKF/07a5wdX4NygXzqIpYytIaTzeBV3iRgN59uMfWbOh6tHeu
 MOEnmWoc3RwsyBXlBTKGafk2DTB6zg==
 =gbYM
 -----END PGP SIGNATURE-----

Merge tag 'mtd/for-6.8' of git://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux

Pull mtd updates from Miquel Raynal:
 "MTD:

   - Apart from preventing the mtdblk to run on top of ftl or ubiblk
     (which may cause security issues and has no meaning anyway), there
     are a few misc fixes.

  Raw NAND:

   - Two meaningful changes this time. The conversion of the brcmnand
     driver to the ->exec_op() API, this series brought additional
     changes to the core in order to help controller drivers to handle
     themselves the WP pin during destructive operations when relevant.

   - There is also a series bringing important fixes to the sequential
     read feature.

   - As always, there is as well a whole bunch of miscellaneous W=1
     fixes, together with a few runtime fixes (double free, timeout
     value, OOB layout, missing register initialization) and the usual
     load of remove callbacks turned into void (which led to switch the
     txx9ndfmc driver to use module_platform_driver()).

  SPI NOR:

   - SPI NOR comes with die erase support for multi die flashes, with
     new octal protocols (1-1-8 and 1-8-8) parsed from SFDP and with an
     updated documentation about what the contributors shall consider
     when proposing flash additions or updates.

   - Michael Walle stepped out from the reviewer role to maintainer"

* tag 'mtd/for-6.8' of git://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux: (39 commits)
  mtd: rawnand: Clarify conditions to enable continuous reads
  mtd: rawnand: Prevent sequential reads with on-die ECC engines
  mtd: rawnand: Fix core interference with sequential reads
  mtd: rawnand: Prevent crossing LUN boundaries during sequential reads
  mtd: Fix gluebi NULL pointer dereference caused by ftl notifier
  dt-bindings: mtd: partitions: u-boot: Fix typo
  mtd: rawnand: s3c2410: fix Excess struct member description kernel-doc warnings
  MAINTAINERS: change my mail to the kernel.org one
  mtd: spi-nor: sfdp: get the 1-1-8 and 1-8-8 protocol from SFDP
  mtd: spi-nor: drop superfluous debug prints
  mtd: spi-nor: sysfs: hide the flash name if not set
  mtd: spi-nor: mark the flash name as obsolete
  mtd: spi-nor: print flash ID instead of name
  mtd: maps: vmu-flash: Fix the (mtd core) switch to ref counters
  mtd: ssfdc: Remove an unused variable
  mtd: rawnand: diskonchip: fix a potential double free in doc_probe
  mtd: rawnand: rockchip: Add missing title to a kernel doc comment
  mtd: rawnand: rockchip: Rename a structure
  mtd: rawnand: pl353: Fix kernel doc
  mtd: spi-nor: micron-st: Add support for mt25qu01g
  ...
2024-01-09 15:40:59 -08:00
JaimeLiao
af2792abd4
mtd: spi-nor: sfdp: get the 1-1-8 and 1-8-8 protocol from SFDP
BFPT 17th DWORD contains the information about 1-1-8 and 1-8-8.
Parse BFPT DWORD[17] instruction to determine whether flash
supports 1-1-8 and 1-8-8, and set its dummy cycles accordingly.

Validated only the 1-1-8 read using a macronix flash with
Xilinx board zynq-picozed.

Signed-off-by: JaimeLiao <jaimeliao@mxic.com.tw>
Reviewed-by: Michael Walle <mwalle@kernel.org>
Link: https://lore.kernel.org/r/20231219102103.92738-2-jaimeliao.tw@gmail.com
[ta: update commit message, get rid of extra dereference]
Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org>
2023-12-20 10:44:00 +02:00
Tudor Ambarus
fe18e22fa7
mtd: spi-nor: drop superfluous debug prints
The mtd data shall be obtained with the mtd ioctls or with
new debugfs entries if one cares. Drop the debug prints.

Reviewed-by: Michael Walle <michael@walle.cc>
Link: https://lore.kernel.org/r/20231215082138.16063-5-tudor.ambarus@linaro.org
Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org>
2023-12-19 05:09:09 +02:00
JaimeLiao
fc2efaf90a
mtd: spi-nor: sysfs: hide the flash name if not set
The flash name is not reliable as we saw flash ID collisions.
Hide the flash name if not set.

Signed-off-by: JaimeLiao <jaimeliao@mxic.com.tw>
Reviewed-by: Michael Walle <michael@walle.cc>
[ta: update commit subject and description and the sysfs description]
Link: https://lore.kernel.org/r/20231215082138.16063-4-tudor.ambarus@linaro.org
Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org>
2023-12-19 05:08:23 +02:00
Tudor Ambarus
15eb8303bb
mtd: spi-nor: mark the flash name as obsolete
The flash name is unreliable as we saw flash ID collisions. Mark the
name as obsolete.

Reviewed-by: Michael Walle <michael@walle.cc>
Link: https://lore.kernel.org/r/20231215082138.16063-3-tudor.ambarus@linaro.org
Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org>
2023-12-19 04:43:12 +02:00
Tudor Ambarus
9fcb099934
mtd: spi-nor: print flash ID instead of name
We saw flash ID collisions which make the flash name unreliable. Print
the manufacturer and device ID instead of the flash name.

Lower the print to dev_dbg to stop polluting the kernel log.

Suggested-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Michael Walle <michael@walle.cc>
Link: https://lore.kernel.org/r/20231215082138.16063-2-tudor.ambarus@linaro.org
Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org>
2023-12-19 04:43:00 +02:00
Fabio Estevam
c692ba6de1
mtd: spi-nor: micron-st: Add support for mt25qu01g
Add support for the MT25QU01G 128MB Micron Serial NOR Flash Memory
model.

Link: https://www.micron.com/-/media/client/global/documents/products/data-sheet/nor-flash/serial-nor/mt25q/die-rev-b/mt25q_qlkt_u_01g_bbb_0.pdf
Signed-off-by: Fabio Estevam <festevam@denx.de>
[ta: introduce die erase]
Link: https://lore.kernel.org/r/20231125123529.55686-6-tudor.ambarus@linaro.org
Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org>
2023-12-06 11:25:17 +02:00
Tudor Ambarus
06de1257aa
mtd: spi-nor: remove NO_CHIP_ERASE flag
There's no flash using it and we'd like to rely instead on SFDP data,
thus remove it.

Tested-by: Fabio Estevam <festevam@denx.de>
Link: https://lore.kernel.org/r/20231125123529.55686-5-tudor.ambarus@linaro.org
Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org>
2023-12-06 11:25:08 +02:00
Tudor Ambarus
53919a968b
mtd: spi-nor: micron-st: enable die erase for multi die flashes
Enable die erase for multi die flashes, it will speed the erase time.

Unfortunately, Micron does not provide a 4-byte opcode equivalent for
the die erase. The SFDP 4BAIT table fails to consider the die erase too,
the standard can be improved. Thus we're forced to enter in the 4 byte
address mode in order to benefit of the die erase.

Tested on n25q00. This flash defines the 4BAIT SFDP table, thus it will
use the 4BAIT opcodes for reads, page programs or erases, with the
exception that it will use the die erase command in the 4 byte address
mode.

Link: https://media-www.micron.com/-/media/client/global/documents/products/data-sheet/nor-flash/serial-nor/n25q/n25q_1gb_3v_65nm.pdf?rev=b6eba74759984f749f8c039bc5bc47b7
Link: https://media-www.micron.com/-/media/client/global/documents/products/data-sheet/nor-flash/serial-nor/mt25q/die-rev-b/mt25q_qlkt_l_02g_cbb_0.pdf?rev=43f7f66fc8da4d7d901b35fa51284c8f
Link: https://lore.kernel.org/r/20231125123529.55686-4-tudor.ambarus@linaro.org
Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org>
2023-12-06 11:25:07 +02:00
Tudor Ambarus
461d0babb5
mtd: spi-nor: spansion: enable die erase for multi die flashes
Enable die erase for spansion multi die flashes.

Tested-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com>
Link: https://lore.kernel.org/r/20231125123529.55686-3-tudor.ambarus@linaro.org
Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org>
2023-12-06 11:25:07 +02:00
Tudor Ambarus
9641423174
mtd: spi-nor: add erase die (chip) capability
JESD216 mentions die erase, but does not provide an opcode for it.
Check BFPT dword 11, bits 30:24, "Chip Erase, Typical time", it says:

"Typical time to erase one chip (die). User must poll device busy to
determine if the operation has completed. For a device consisting of
multiple dies, that are individually accessed, the time is for each die
to which a chip erase command is applied."

So when a flash consists of a single die, this is the erase time for the
full chip (die) erase, and when it consists of multiple dies, it's the
die erase time. Chip and die are the same thing.

Add support for die erase. For now, benefit of the die erase when addr
and len are aligned with die size. This could be improved however for
the uniform and non-uniform erases cases to use the die erase when
possible. For example if one requests that an erase of a 2 die device
starting from the last 64KB of the first die to the end of the flash
size, we could use just 2 commands, a 64KB erase and a die erase.
This improvement is left as an exercise for the reader.

Tested-by: Fabio Estevam <festevam@denx.de>
Link: https://lore.kernel.org/r/20231125123529.55686-2-tudor.ambarus@linaro.org
Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org>
2023-12-06 11:24:42 +02:00
Chia-Lin Kao (AceLan)
7a030abc01
mtd: spi-nor: Stop reporting warning message when soft reset is not suported
When the software reset command isn't supported, we now stop reporting
the warning message to avoid unnecessary warnings and potential confusion.

Reviewed-by: Dhruva Gole <d-gole@ti.com>
Reviewed-by: Michael Walle <michael@walle.cc>
Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Acked-by: Pratyush Yadav <pratyush@kernel.org>
Signed-off-by: "Chia-Lin Kao (AceLan)" <acelan.kao@canonical.com>
Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com>
Acked-by: Tudor Ambarus <tudor.ambarus@linaro.org>
Link: https://lore.kernel.org/r/20231129064311.272422-2-acelan.kao@canonical.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2023-11-30 12:12:40 +00:00
Chia-Lin Kao (AceLan)
cff49d58f5
spi: Unify error codes by replacing -ENOTSUPP with -EOPNOTSUPP
This commit updates the SPI subsystem, particularly affecting "SPI MEM"
drivers and core parts, by replacing the -ENOTSUPP error code with
-EOPNOTSUPP.

The key motivations for this change are as follows:
1. The spi-nor driver currently uses EOPNOTSUPP, whereas calls to spi-mem
might return ENOTSUPP. This update aims to unify the error reporting
within the SPI subsystem for clarity and consistency.

2. The use of ENOTSUPP has been flagged by checkpatch as inappropriate,
mainly being reserved for NFS-related errors. To align with kernel coding
standards and recommendations, this change is being made.

3. By using EOPNOTSUPP, we provide more specific context to the error,
indicating that a particular operation is not supported. This helps
differentiate from the more generic ENOTSUPP error, allowing drivers to
better handle and respond to different error scenarios.

Risks and Considerations:
While this change is primarily intended as a code cleanup and error code
unification, there is a minor risk of breaking user-space applications
that rely on specific return codes for unsupported operations. However,
this risk is considered low, as such use-cases are unlikely to be common
or critical. Nevertheless, developers and users should be aware of this
change, especially if they have scripts or tools that specifically handle
SPI error codes.

This commit does not introduce any functional changes to the SPI subsystem
or the affected drivers.

Signed-off-by: "Chia-Lin Kao (AceLan)" <acelan.kao@canonical.com>
Acked-by: Tudor Ambarus <tudor.ambarus@linaro.org>
Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Acked-by: Miquel Raynal <miquel.raynal@bootlin.com>
Acked-by: Michael Walle <michael@walle.cc>
Link: https://lore.kernel.org/r/20231129064311.272422-1-acelan.kao@canonical.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2023-11-30 12:12:39 +00:00
Tudor Ambarus
075ede8d20
mtd: spi-nor: use kernel sized types instead of c99 types
The kernel offers and prefers the kernel sized types instead of the c99
types when not in the uapi directory, use them.

Link: https://lore.kernel.org/r/20231101145853.524045-2-tudor.ambarus@linaro.org
Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org>
2023-11-15 08:07:04 +02:00
Miquel Raynal
3a8ab4a13d For SPI NOR we cleaned the flash info entries in order to have
them slimmer and self explanatory. In order to make the entries
 as slim as possible, we introduced sane default values so that
 the actual flash entries don't need to specify them. We now use
 a flexible macro to specify the flash ID instead of the previous
 INFOx() macros that had hardcoded ID lengths.
 
 Instead of:
 -       { "w25q512nwm", INFO(0xef8020, 0, 64 * 1024, 0)
 -               OTP_INFO(256, 3, 0x1000, 0x1000) },
 
 We now use:
 +               .id = SNOR_ID(0xef, 0x80, 0x20),
 +               .name = "w25q512nwm",
 +               .otp = SNOR_OTP(256, 3, 0x1000, 0x1000),
 
 We also removed some flash entries: the very old Catalyst
 SPI EEPROMs that were introduced once with the SPI-NOR subsystem,
 and a Fujitsu MRAM. Both should use the at25 EEPROM driver.
 The latter even has device tree bindings for the at25 driver.
 
 We made sure that the conversion didn't introduce any unwanted
 changes by comparing the .rodata segment before and after the
 conversion. The patches landed in linux-next immediately after
 v6.6-rc2, we haven't seen any regressions yet.
 
 Apart of the autumn cleaning we introduced a new flash entry,
 at25ff321a, and added block protection support for mt25qu512a.
 -----BEGIN PGP SIGNATURE-----
 
 iQEzBAABCgAdFiEEHUIqys8OyG1eHf7fS1VPR6WNFOkFAmUvhfgACgkQS1VPR6WN
 FOlQUAf/ZFUi5nktXOERKghKIwQulTIWdxsV2ZitezzFEPeObHaXR/kiF53mKbyS
 txutJglHFYpsLaLptGwrUja2bWVI5OEZCLknIsRRPH4wy3aWlyef1yonl6//U/O9
 lWLEKcUFgsmJKTe+Ga6BWJFBlExCfhPM6Hu9q3O/z0cV107fNdHBo41p9Xvn2B3l
 miNyxhsojdXfDIFexjZHC+kYS5cQv9fRLyBKDvWoAsjSj9HoPt9Y/46x2TKfsJ83
 d8JJH8ABwk6hpgjcTECorqcljsB6FdQ80s+0klmrfqO1UBt0ptrS/OwcmYMuivZn
 urpGYUAWFgFGivBb+nUfG/VgAQ3E7w==
 =qzxq
 -----END PGP SIGNATURE-----

Merge tag 'spi-nor/for-6.7' into mtd/next

For SPI NOR we cleaned the flash info entries in order to have
them slimmer and self explanatory. In order to make the entries
as slim as possible, we introduced sane default values so that
the actual flash entries don't need to specify them. We now use
a flexible macro to specify the flash ID instead of the previous
INFOx() macros that had hardcoded ID lengths.

Instead of:
-       { "w25q512nwm", INFO(0xef8020, 0, 64 * 1024, 0)
-               OTP_INFO(256, 3, 0x1000, 0x1000) },

We now use:
+               .id = SNOR_ID(0xef, 0x80, 0x20),
+               .name = "w25q512nwm",
+               .otp = SNOR_OTP(256, 3, 0x1000, 0x1000),

We also removed some flash entries: the very old Catalyst
SPI EEPROMs that were introduced once with the SPI-NOR subsystem,
and a Fujitsu MRAM. Both should use the at25 EEPROM driver.
The latter even has device tree bindings for the at25 driver.

We made sure that the conversion didn't introduce any unwanted
changes by comparing the .rodata segment before and after the
conversion. The patches landed in linux-next immediately after
v6.6-rc2, we haven't seen any regressions yet.

Apart of the autumn cleaning we introduced a new flash entry,
at25ff321a, and added block protection support for mt25qu512a.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2023-11-04 11:50:13 +01:00
Mamta Shukla
6823a83834
mtd: spi-nor: micron-st: use SFDP table for mt25qu512a
Parse SFDP table to get size and functions of mt25qu512a. BFPT wrongly
advertises 16bit SR support and made the locking fail. Add a post BFPT
fixup hook to clear the 16bit SR support.

cat /sys/bus/spi/devices/spi-PRP0001:00/spi-nor/jedec_id
20bb20104400

cat /sys/bus/spi/devices/spi-PRP0001:00/spi-nor/manufacturer
st

cat /sys/bus/spi/devices/spi-PRP0001:00/spi-nor/partname
mt25qu512a

xxd -p  /sys/bus/spi/devices/spi-PRP0001:00/spi-nor/sfdp
53464450060101ff00060110300000ff84000102800000ffffffffffffff
ffffffffffffffffffffffffffffffffffffe520fbffffffff1f29eb276b
273b27bbffffffffffff27bbffff29eb0c2010d80f520000244a99008b8e
03e1ac0127387a757a75fbbdd55c4a0f82ff81bd3d36ffffffffffffffff
ffffffffffffffffffe7ffff21dcffff

md5sum  /sys/bus/spi/devices/spi-PRP0001:00/spi-nor/sfdp
610efba1647e00ac6db18beb11e84c04
/sys/bus/spi/devices/spi-PRP0001:00/spi-nor/sfdp

Signed-off-by: Mamta Shukla <mamta.shukla@leica-geosystems.com>
Reviewed-by: Pratyush Yadav <pratyush@kernel.org>
Link: https://lore.kernel.org/r/20231017074711.12167-2-tudor.ambarus@linaro.org
Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org>
2023-10-18 07:47:22 +03:00
Mamta Shukla
a2a3e5430e
mtd: spi-nor: micron-st: enable lock/unlock for mt25qu512a
mt25qu512a supports locking/unlocking through the SR BP bits. Enable
locking support. Tested with mtd-utils- flash_lock/flash_unlock on
MT25QU512ABB8E12.

Signed-off-by: Mamta Shukla <mamta.shukla@leica-geosystems.com>
Link: https://lore.kernel.org/r/20231017074711.12167-1-tudor.ambarus@linaro.org
Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org>
2023-10-18 07:47:19 +03:00
Uwe Kleine-König
3ee355dbc7 mtd: spi-nor: nxp-spifi: Convert to platform remove callback returning void
The .remove() callback for a platform driver returns an int which makes
many driver authors wrongly assume it's possible to do error handling by
returning an error code. However the value returned is ignored (apart
from emitting a warning) and this typically results in resource leaks.

To improve here there is a quest to make the remove callback return
void. In the first step of this quest all drivers are converted to
.remove_new(), which already returns void. Eventually after all drivers
are converted, .remove_new() will be renamed to .remove().

Trivially convert this driver from always returning zero in the remove
callback to the void returning variant.

Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Acked-by: Tudor Ambarus <tudor.ambarus@linaro.org>
Link: https://lore.kernel.org/linux-mtd/20231008200143.196369-21-u.kleine-koenig@pengutronix.de
2023-10-16 10:56:48 +02:00
Uwe Kleine-König
ac2bc65982 mtd: spi-nor: hisi-sfc: Convert to platform remove callback returning void
The .remove() callback for a platform driver returns an int which makes
many driver authors wrongly assume it's possible to do error handling by
returning an error code. However the value returned is ignored (apart
from emitting a warning) and this typically results in resource leaks.

To improve here there is a quest to make the remove callback return
void. In the first step of this quest all drivers are converted to
.remove_new(), which already returns void. Eventually after all drivers
are converted, .remove_new() will be renamed to .remove().

Trivially convert this driver from always returning zero in the remove
callback to the void returning variant.

Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Acked-by: Tudor Ambarus <tudor.ambarus@linaro.org>
Link: https://lore.kernel.org/linux-mtd/20231008200143.196369-20-u.kleine-koenig@pengutronix.de
2023-10-16 10:56:48 +02:00
Nicolas Ferre
8f407eda17
mtd: spi-nor: atmel: add at25ff321a entry
Add the at25ff321a 4MB SPI flash which is able to provide
SFDP information.
Link: https://www.renesas.com/us/en/document/dst/at25ff321a-datasheet

Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Link: https://lore.kernel.org/r/20230926131655.51224-1-nicolas.ferre@microchip.com
Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org>
2023-09-27 11:42:49 +03:00
Michael Walle
914efd602a
mtd: spi-nor: core: get rid of the INFOx() macros
Now that all flash_info tables are converted to the new format, remove
the old INFOx() macros.

Signed-off-by: Michael Walle <mwalle@kernel.org>
Link: https://lore.kernel.org/r/20230807-mtd-flash-info-db-rework-v3-41-e60548861b10@kernel.org
Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org>
2023-09-19 18:59:22 +03:00
Michael Walle
1d4c725453
mtd: spi-nor: atmel: drop duplicate entry
The Atmel AT26DF321 and AT25DF321 have the same ID. Both were just
discovered by reading their IDs, that is, there is no probing by name.
Thus only the first one (the AT25DF321) in the list was ever probed.
Luckily, the AT25DF is also the newer series. Drop the AT26DF321.

Signed-off-by: Michael Walle <mwalle@kernel.org>
Link: https://lore.kernel.org/r/20230807-mtd-flash-info-db-rework-v3-40-e60548861b10@kernel.org
Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org>
2023-09-19 18:59:22 +03:00