2 Commits

Author	SHA1	Message	Date
Conor Dooley	65e936372d	gpio: mpfs: add CoreGPIO support ... coreGPIO, which the "hard" core in PolarFire SoC is based on, has different offsets for inp/outp. Add some match_data handling to account for the differences. Signed-off-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20241113-jovial-atlantic-cd07f05eb2e5@spud Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>	2024-11-13 16:29:27 +01:00
Lewis Hanly	a987b78f36	gpio: mpfs: add polarfire soc gpio support ... Add a driver to support the Polarfire SoC gpio controller. Interrupt controller support is unavailable for now and will be added at a later date. Signed-off-by: Lewis Hanly <lewis.hanly@microchip.com> Co-developed-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Conor Dooley <conor.dooley@microchip.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20241104-tiny-evaluate-9336020b4b6a@spud Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>	2024-11-06 14:40:08 +01:00