The stack frame "format" field needs to be explicitly set on thread creation
on ColdFire. For a normal long word aligned user stack pointer the frame
format is 0x4.
We were doing this for non-MMU ColdFire, but not for the case with MMU enabled.
So fix it so we always do it if targeting ColdFire.
The old code happend to rely on the stack frame format being inhereted from
the process calling exec. Furture changes means that may not always work,
so we really do want to set it explicitly.
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
Conflicts:
drivers/net/team/team.c
drivers/net/usb/qmi_wwan.c
net/batman-adv/bat_iv_ogm.c
net/ipv4/fib_frontend.c
net/ipv4/route.c
net/l2tp/l2tp_netlink.c
The team, fib_frontend, route, and l2tp_netlink conflicts were simply
overlapping changes.
qmi_wwan and bat_iv_ogm were of the "use HEAD" variety.
With help from Antonio Quartulli.
Signed-off-by: David S. Miller <davem@davemloft.net>
Use the mapping of Elf_[SPE]hdr, Elf_Addr, Elf_Sym, Elf_Dyn, Elf_Rel/Rela,
ELF_R_TYPE() and ELF_R_SYM() to either the 32-bit version or the 64-bit version
into asm-generic/module.h for all arches bar MIPS.
Also, use the generic definition mod_arch_specific where possible.
To this end, I've defined three new config bools:
(*) HAVE_MOD_ARCH_SPECIFIC
Arches define this if they don't want to use the empty generic
mod_arch_specific struct.
(*) MODULES_USE_ELF_RELA
Arches define this if their modules can contain RELA records. This causes
the Elf_Rela mapping to be emitted and allows apply_relocate_add() to be
defined by the arch rather than have the core emit an error message.
(*) MODULES_USE_ELF_REL
Arches define this if their modules can contain REL records. This causes
the Elf_Rel mapping to be emitted and allows apply_relocate() to be
defined by the arch rather than have the core emit an error message.
Note that it is possible to allow both REL and RELA records: m68k and mips are
two arches that do this.
With this, some arch asm/module.h files can be deleted entirely and replaced
with a generic-y marker in the arch Kbuild file.
Additionally, I have removed the bits from m32r and score that handle the
unsupported type of relocation record as that's now handled centrally.
Signed-off-by: David Howells <dhowells@redhat.com>
Acked-by: Sam Ravnborg <sam@ravnborg.org>
Signed-off-by: Rusty Russell <rusty@rustcorp.com.au>
Convert the ColdFire 54xx CPU General Timer register address definitions to
include the MCF_MBAR peripheral region offset. This makes them consistent
with all other 54xx address register definitions (in m54xxsim.h).
The goal is to reduce different definitions used (some including offsets and
others not) causing bugs when used incorrectly.
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
The Pin Assignment register definitions for the ColdFire 54xx CPU family are
inconsistently named and defined compared to the other ColdFire part
definitions. Rename them with the same prefix as used on other parts,
MCFGPIO_PAR_, and make their definitions include the MCF_MBAR periphperal
region offset.
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
The multi-function pin setup code for the FEC ethernet module is using just
plain wrong. Looks like it was cut-and-pasted from other init code. It has
hard coded register addresses that are incorrect for the 523x, and it is
manipulating bits that don't make sense.
Add proper register definitions for the Pin Assignment registers of the 532x,
and then use them to fix the setup code for the FEC hardware module.
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Move the base address defines of the ColdFire 54xx CPU slice timers into the
54xx specific header (m54xxsim.h). They are CPU specific, and belong with the
CPU specific defines. Also make them relative to the MBAR peripheral region,
making the define the absolute address.
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Get rid of the use of local IO access macros and switch to using the standard
read*/write* family of access functions for the ColdFire m532x setup code.
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
The ColdFire 532x CPU register definitions for the multi-function setup
pins are inconsistently defined compared with other ColdFire parts. Modify
the register defintions to be just the addresses, not pointers. This also
fixes the erroneous use in one case of using these values in the UART setup
code for the 532x.
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
There are a lot of unused and uneccessary definitions in the header to
support the ColdFire 532x CPU family. Remove the junk.
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Currently the setup code for the FEC multi-function pins on the ColdFire 528x
has the addresses hard coded in the code. Use the register defines that
already exist for this.
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Remove the last address definitions relative to the IPSBAR peripheral region
for the ColdFire 527x family. This involved cleaning up some magic numbers
used in the code part, and making them proper register definitions in the 527x
specific header.
This is part of the process of cleaning up the ColdFire register definitions
to make them consistently use absolute addresses for the primary registers.
This will reduce the occasional bugs caused by inconsistent definition of
the register addresses.
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
The registers used to configure and set the multifunction pins on the 5272
ColdFire are defined as absolute addresses. So the use of them does not need
to be offset relative to the peripheral region address.
Fix two cases of incorrect usage of these addresses. Both affect UART
initialization, one in the common UART pin setup code, the other in the
NETtel board specific UART signal handling.
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Make the ColdFire 5249 MBAR peripheral register definitions absolute
addresses, instead of offsets into the region.
The various ColdFire parts use different methods to address the internal
registers, some are absolute, some are relative to peripheral regions
which can be mapped at different address ranges (such as the MBAR and IPSBAR
registers). We don't want to deal with this in the code when we are
accessing these registers, so make all register definitions the absolute
address - factoring out whether it is an offset into a peripheral region.
This makes them all consistently defined, and reduces the occasional bugs
caused by inconsistent definition of the register addresses.
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Make the remaining definitions of the 5272 ColdFire registers absolute
addresses. Currently some are relative to the MBAR peripheral region.
The various ColdFire parts use different methods to address the internal
registers, some are absolute, some are relative to peripheral regions
which can be mapped at different address ranges (such as the MBAR and IPSBAR
registers). We don't want to deal with this in the code when we are
accessing these registers, so make all register definitions the absolute
address - factoring out whether it is an offset into a peripheral region.
This makes them all consistently defined, and reduces the occasional bugs
caused by inconsistent definition of the register addresses.
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Make all definitions of the ColdFire MPARK and IRQ Assignment registers
absolute addresses. Currently some are relative to the MBAR peripheral
region.
The various ColdFire parts use different methods to address the internal
registers, some are absolute, some are relative to peripheral regions
which can be mapped at different address ranges (such as the MBAR and IPSBAR
registers). We don't want to deal with this in the code when we are
accessing these registers, so make all register definitions the absolute
address - factoring out whether it is an offset into a peripheral region.
This makes them all consistently defined, and reduces the occasional bugs
caused by inconsistent definition of the register addresses.
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Make all definitions of the ColdFire Chip Select registers absolute addresses.
Currently some are relative to the MBAR peripheral region.
The various ColdFire parts use different methods to address the internal
registers, some are absolute, some are relative to peripheral regions
which can be mapped at different address ranges (such as the MBAR and IPSBAR
registers). We don't want to deal with this in the code when we are
accessing these registers, so make all register definitions the absolute
address - factoring out whether it is an offset into a peripheral region.
This makes them all consistently defined, and reduces the occasional bugs
caused by inconsistent definition of the register addresses.
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Make all definitions of the ColdFire Interrupt Source registers absolute
addresses. Currently some are relative to the MBAR peripheral region.
The various ColdFire parts use different methods to address the internal
registers, some are absolute, some are relative to peripheral regions
which can be mapped at different address ranges (such as the MBAR and IPSBAR
registers). We don't want to deal with this in the code when we are
accessing these registers, so make all register definitions the absolute
address - factoring out whether it is an offset into a peripheral region.
This makes them all consistently defined, and reduces the occasional bugs
caused by inconsistent definition of the register addresses.
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Make all definitions of the ColdFire Pin Assignment registers absolute
addresses. Currently some are relative to the MBAR peripheral region.
The various ColdFire parts use different methods to address the internal
registers, some are absolute, some are relative to peripheral regions
which can be mapped at different address ranges (such as the MBAR and IPSBAR
registers). We don't want to deal with this in the code when we are
accessing these registers, so make all register definitions the absolute
address - factoring out whether it is an offset into a peripheral region.
This makes them all consistently defined, and reduces the occasional bugs
caused by inconsistent definition of the register addresses.
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Make all definitions of the ColdFire Software watchdog registers absolute
addresses. Currently some are relative to the MBAR peripheral region.
The various ColdFire parts use different methods to address the internal
registers, some are absolute, some are relative to peripheral regions
which can be mapped at different address ranges (such as the MBAR and IPSBAR
registers). We don't want to deal with this in the code when we are
accessing these registers, so make all register definitions the absolute
address - factoring out whether it is an offset into a peripheral region.
This makes them all consistently defined, and reduces the occasional bugs
caused by inconsistent definition of the register addresses.
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Make all definitions of the ColdFire Reset and System registers absolute
addresses. Currently some are relative to the MBAR peripheral region.
The various ColdFire parts use different methods to address the internal
registers, some are absolute, some are relative to peripheral regions
which can be mapped at different address ranges (such as the MBAR and IPSBAR
registers). We don't want to deal with this in the code when we are
accessing these registers, so make all register definitions the abolsute
address - factoring out whether it is an offset into a peripheral region.
This makes them all consistently defined, and reduces the occasional bugs
caused by inconsistent definition of the register addresses.
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Make all definitions of the ColdFire Interrupt Mask and Pending registers
absolute addresses. Currently some are relative to the MBAR peripheral region.
The various ColdFire parts use different methods to address the internal
registers, some are absolute, some are relative to peripheral regions
which can be mapped at different address ranges (such as the MBAR and IPSBAR
registers). We don't want to deal with this in the code when we are
accessing these registers, so make all register definitions the absolute
address - factoring out whether it is an offset into a peripheral region.
This makes them all consistently defined, and reduces the occasional bugs
caused by inconsistent definition of the register addresses.
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Let the compiler choose which register to use in the cache flushing
asm statements, instead of imposing %d0.
Additionally, fix two typo's.
Signed-off-by: Philippe De Muyter <phdm@macqel.be>
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
DRAGEN2 should obviously be CONFIG_DRAGEN2, but the screen.h entry it
triggers only references files that are nowhere to be found in the
current tree. Besides, nothing uses screen.h. So just drop all that.
Signed-off-by: Paul Bolle <pebolle@tiscali.nl>
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
In the old times, the whole idle task was considered
as an RCU quiescent state. But as RCU became more and
more successful overtime, some RCU read side critical
section have been added even in the code of some
architectures idle tasks, for tracing for example.
So nowadays, rcu_idle_enter() and rcu_idle_exit() must
be called by the architecture to tell RCU about the part
in the idle loop that doesn't make use of rcu read side
critical sections, typically the part that puts the CPU
in low power mode.
This is necessary for RCU to find the quiescent states in
idle in order to complete grace periods.
Add this missing pair of calls in the m68k's idle loop.
Reported-by: Paul E. McKenney <paulmck@linux.vnet.ibm.com>
Signed-off-by: Frederic Weisbecker <fweisbec@gmail.com>
Acked-by: Geert Uytterhoeven <geert@linux-m68k.org>
Cc: m68k <linux-m68k@lists.linux-m68k.org>
Cc: <stable@vger.kernel.org> # 3.3+
Signed-off-by: Paul E. McKenney <paulmck@linux.vnet.ibm.com>
Reviewed-by: Josh Triplett <josh@joshtriplett.org>
Most architectures implement this in exactly the same way. Instead of
having each architecture duplicate this function, provide a single
implementation in the core and make it a weak symbol so that it can be
overridden on architectures where it is required.
Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
The managed clk functions are currently only available when the generic clk
lookup framework is build. But the managed clk functions are merely wrappers
around clk_get and clk_put and do not depend on any specifics of the generic
lookup functions and there are still quite a few custom implementations of the
clk API. So make the managed functions available whenever the clk API is
implemented.
The patch also removes the custom implementation of devm_clk_get for the
coldfire platform.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
Acked-by: Greg Ungerer <gerg@uclinux.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
It was scheduled to be removed for a long time.
Cc: Pablo Neira Ayuso <pablo@netfilter.org>
Cc: Patrick McHardy <kaber@trash.net>
Cc: "David S. Miller" <davem@davemloft.net>
Cc: netfilter@vger.kernel.org
Signed-off-by: Cong Wang <xiyou.wangcong@gmail.com>
Signed-off-by: Pablo Neira Ayuso <pablo@netfilter.org>
The semantic patch that makes this change is available
in scripts/coccinelle/api/ptr_ret.cocci.
More information about semantic patching is available at
http://coccinelle.lip6.fr/
Signed-off-by: Thomas Meyer <thomas@m3y3r.de>
Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
The semantic patch that makes this change is available
in scripts/coccinelle/api/ptr_ret.cocci.
More information about semantic patching is available at
http://coccinelle.lip6.fr/
Signed-off-by: Thomas Meyer <thomas@m3y3r.de>
Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
The semantic patch that makes this change is available
in scripts/coccinelle/api/ptr_ret.cocci.
More information about semantic patching is available at
http://coccinelle.lip6.fr/
Signed-off-by: Thomas Meyer <thomas@m3y3r.de>
Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
There is no specific atomic64 support code for any m68k CPUs, so we should
select CONFIG_GENERIC_ATOMC64 for all. Remove the existing per CPU selection
of this and select it for all m68k.
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Acked-by: Fengguang Wu <fengguang.wu@intel.com>
Acked-by: Geert Uytterhoeven <geert@linux-m68k.org>
Every tty driver needs tty_port for each line. So let us add one to
nfcon too. And link it so that the tty layer knows about it.
Signed-off-by: Jiri Slaby <jslaby@suse.cz>
Cc: Geert Uytterhoeven <geert@linux-m68k.org>
Cc: linux-m68k@lists.linux-m68k.org
Acked-by: Alan Cox <alan@linux.intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Pull m68k updates from Geert Uytterhoeven.
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/linux-m68k:
m68k: Make sys_atomic_cmpxchg_32 work on classic m68k
m68k/apollo: Rename "timer" to "apollo_timer"
zorro: Remove unused zorro_bus.devices
m68k: Remove never used asm/shm.h
m68k/sun3: Remove unselectable code in prom_init()
m68k: Use asm-generic version of <asm/sections.h>
m68k: Replace m68k-specific _[se]bss by generic __bss_{start,stop}
mtd/uclinux: Use generic __bss_stop instead of _ebss
m68knommu: Allow ColdFire CPUs to use unaligned accesses
m68k: Remove five unused headers
m68k: CPU32 does not support unaligned accesses
m68k: Introduce config option CPU_HAS_NO_UNALIGNED
m68k: delay, muldi3 - Use CONFIG_CPU_HAS_NO_MULDIV64
m68k: Move CPU_HAS_* config options
m68k: Remove duplicate FPU config option
m68knommu: Clean up printing of sections
m68k: Use asm-generic version of <asm/types.h>
m68k: Use Kbuild logic to import asm-generic headers
User space access must always go through uaccess accessors, since on
classic m68k user space and kernel space are completely separate.
Signed-off-by: Andreas Schwab <schwab@linux-m68k.org>
Tested-by: Thorsten Glaser <tg@debian.org>
Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
Cc: stable@vger.kernel.org
Rather than #define the options manually in the architecture code, add
Kconfig options for them and select them there instead. This also allows
us to select the compat IPC version parsing automatically for platforms
using the old compat IPC interface.
Reported-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Chris Metcalf <cmetcalf@tilera.com>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Pull m68knommu arch update from Greg Ungerer:
"Quite a varied set of changes this time.
- A little more merge cleanup, this time the assembler entry code.
- New sub-architecture support for the ColdFire 5251/5253 and 5441x
CPU families.
- Specific clk support code for the ColdFire 520x and 532x CPU
familes.
- Refactoring of the ColdFire GPIO support.
- PCI bus support for some ColdFire CPUS that have PCI hardware (54xx
family). This showed up a few problems with ColdFire cache,
allocating coherent memory and bi-directional DMA support. Fixes
for those too."
* 'for-next' of git://git.kernel.org/pub/scm/linux/kernel/git/gerg/m68knommu: (21 commits)
m68k: allow PCI bus to be enabled for ColdFire m54xx CPUs
m68k: add PCI bus code support for the ColdFire M54xx SoC family
m68k: add IO access definitions to support PCI on ColdFire platforms
m68k: add PCI bus support definitions for the ColdFire M54xx SoC family
m68k: common PCI support definitions and code
m68k: add support for DMA_BIDIRECTIONAL in dma support functions
m68k: fix ColdFire clear cache operation
m68k: use simpler dma_alloc_coherent() for ColdFire CPUs
m68knommu: platform support for 8390 based ethernet used on some boards
m68knommu: Add clk definitions for m532x.
m68knommu: Add clk definitions for m520x.
m68knommu: Add rtc device for m5441x.
m68knommu: add definitions for the third interrupt controller on devices that don't have a third interrupt controller.
m68knommu: Add support for the Coldfire m5441x.
m68knommu: use MCF_IRQ_PIT1 instead of MCFINT_VECBASE + MCFINT_PIT1
coldfire-qspi: Add support for the Coldfire 5251/5253.
m68knommu: Add support for the Coldfire 5251/5253
m68knommu: refactor Coldfire GPIO not to require GPIOLIB, eliminate mcf_gpio_chips.
m68k: merge the MMU and non-MMU versions of the entry.S code
m68k: use jbsr to call functions instead of bsrl
...
Pull trivial tree from Jiri Kosina:
"Trivial updates all over the place as usual."
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jikos/trivial: (29 commits)
Fix typo in include/linux/clk.h .
pci: hotplug: Fix typo in pci
iommu: Fix typo in iommu
video: Fix typo in drivers/video
Documentation: Add newline at end-of-file to files lacking one
arm,unicore32: Remove obsolete "select MISC_DEVICES"
module.c: spelling s/postition/position/g
cpufreq: Fix typo in cpufreq driver
trivial: typo in comment in mksysmap
mach-omap2: Fix typo in debug message and comment
scsi: aha152x: Fix sparse warning and make printing pointer address more portable.
Change email address for Steve Glendinning
Btrfs: fix typo in convert_extent_bit
via: Remove bogus if check
netprio_cgroup.c: fix comment typo
backlight: fix memory leak on obscure error path
Documentation: asus-laptop.txt references an obsolete Kconfig item
Documentation: ManagementStyle: fixed typo
mm/vmscan: cleanup comment error in balance_pgdat
mm: cleanup on the comments of zone_reclaim_stat
...
