The current memory-barriers.txt does not address the possibility of
a write to a dereferenced pointer. This should be rare, but when it
happens, we need that write -not- to be clobbered by the initialization.
This commit therefore adds an example showing a data dependency ordering
a later data-dependent write.
Reported-by: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com>
Signed-off-by: Paul E. McKenney <paulmck@linux.vnet.ibm.com>
Commit #1ebee8017d84 (rcu: Eliminate array-index-based RCU primitives)
eliminated the primitives supporting RCU-protected array indexes, but
failed to update Documentation/memory-barriers.txt accordingly. This
commit therefore removes the discussion of RCU-protected array indexes.
Signed-off-by: Paul E. McKenney <paulmck@linux.vnet.ibm.com>
This commit fixes a couple of "Compiler Barrier" section references to
be "COMPILER BARRIER". This makes it easier to find the section in
the usual text editors.
Signed-off-by: Paul E. McKenney <paulmck@linux.vnet.ibm.com>
The summary of the "CONTROL DEPENDENCIES" section incorrectly states that
barrier() may be used to prevent compiler reordering when more than one
leg of the control-dependent "if" statement start with identical stores.
This is incorrect at high optimization levels. This commit therefore
updates the summary to match the detailed description.
Reported by: Jianyu Zhan <nasa4836@gmail.com>
Signed-off-by: Paul E. McKenney <paulmck@linux.vnet.ibm.com>
Rename DSA port_join_bridge and port_leave_bridge routines to
respectively port_bridge_join and port_bridge_leave in order to respect
an implicit Port::Bridge namespace.
Signed-off-by: Vivien Didelot <vivien.didelot@savoirfairelinux.com>
Acked-by: Jiri Pirko <jiri@mellanox.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
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Orangefs: merge to v4.5
Merge tag 'v4.5' of git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux into current
Linux 4.5
The Cavium Thunder SoCs have multiple MIDO buses that are part of a
single PCI device. To model this in the device tree we call the PCI
parent device a "cavium,thunder-8890-mdio-nexus", it has several
children, one for each MDIO bus.
The MDIO bus hardware is identical to that found in the OCTEON SoCs,
so we use that code for things that are not part of the PCI driver
probe/remove
Signed-off-by: David Daney <david.daney@cavium.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Some new development in PHYLIB added new function pointers to the struct
phy_driver, document these.
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Buffer manager (BM) is a dedicated hardware unit that can be used by all
ethernet ports of Armada XP and 38x SoC's. It allows to offload CPU on RX
path by sparing DRAM access on refilling buffer pool, hardware-based
filling of descriptor ring data and better memory utilization due to HW
arbitration for using 'short' pools for small packets.
Tests performed with A388 SoC working as a network bridge between two
packet generators showed increase of maximum processed 64B packets by
~20k (~555k packets with BM enabled vs ~535 packets without BM). Also
when pushing 1500B-packets with a line rate achieved, CPU load decreased
from around 25% without BM to 20% with BM.
BM comprise up to 4 buffer pointers' (BP) rings kept in DRAM, which
are called external BP pools - BPPE. Allocating and releasing buffer
pointers (BP) to/from BPPE is performed indirectly by write/read access
to a dedicated internal SRAM, where internal BP pools (BPPI) are placed.
BM hardware controls status of BPPE automatically, as well as assigning
proper buffers to RX descriptors. For more details please refer to
Functional Specification of Armada XP or 38x SoC.
In order to enable support for a separate hardware block, common for all
ports, a new driver has to be implemented ('mvneta_bm'). It provides
initialization sequence of address space, clocks, registers, SRAM,
empty pools' structures and also obtaining optional configuration
from DT (please refer to device tree binding documentation). mvneta_bm
exposes also a necessary API to mvneta driver, as well as a dedicated
structure with BM information (bm_priv), whose presence is used as a
flag notifying of BM usage by port. It has to be ensured that mvneta_bm
probe is executed prior to the ones in ports' driver. In case BM is not
used or its probe fails, mvneta falls back to use software buffer
management.
A sequence executed in mvneta_probe function is modified in order to have
an access to needed resources before possible port's BM initialization is
done. According to port-pools mapping provided by DT appropriate registers
are configured and the buffer pools are filled. RX path is modified
accordingly. Becaues the hardware allows a wide variety of configuration
options, following assumptions are made:
* using BM mechanisms can be selectively disabled/enabled basing
on DT configuration among the ports
* 'long' pool's single buffer size is tied to port's MTU
* using 'long' pool by port is obligatory and it cannot be shared
* using 'short' pool for smaller packets is optional
* one 'short' pool can be shared among all ports
This commit enables hardware buffer management operation cooperating with
existing mvneta driver. New device tree binding documentation is added and
the one of mvneta is updated accordingly.
[gregory.clement@free-electrons.com: removed the suspend/resume part]
Signed-off-by: Marcin Wojtas <mw@semihalf.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Some SRAM users may require non-bufferable access to the memory, which is
impossible, because devm_ioremap_wc() is used for setting sram->virt_base.
This commit adds optional flag 'no-memory-wc', which allow to choose remap
method, using DT property. Documentation is updated accordingly.
Signed-off-by: Marcin Wojtas <mw@semihalf.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Document the devicetree bindings for the real time clock found
on Microchip PIC32 class devices.
Signed-off-by: Joshua Henderson <joshua.henderson@microchip.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
clock offset may be set and read in decimal parts per billion
attribute is /sys/class/rtc/rtcN/offset
The attribute is only visible for rtcs that have set_offset implemented.
Signed-off-by: Joshua Clayton <stillcompiling@gmail.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
DS3231 has programmable square-wave output signal.
This enables to use this feature as a clock provider of
common clock framework.
Signed-off-by: Akinobu Mita <akinobu.mita@gmail.com>
Reviewed-by: Michael Turquette <mturquette@baylibre.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Add the binding documentation for the Epson RX6110 RTC.
Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
We disabled the ability to enable this driver back in October of 2013,
we should be able to safely remove it at this point. The initial goal
was to remove it in 3.15, so now is the time.
Signed-off-by: Jens Axboe <axboe@fb.com>
* pm-cpufreq: (94 commits)
intel_pstate: Do not skip samples partially
intel_pstate: Remove freq calculation from intel_pstate_calc_busy()
intel_pstate: Move intel_pstate_calc_busy() into get_target_pstate_use_performance()
intel_pstate: Optimize calculation for max/min_perf_adj
intel_pstate: Remove extra conversions in pid calculation
cpufreq: Move scheduler-related code to the sched directory
Revert "cpufreq: postfix policy directory with the first CPU in related_cpus"
cpufreq: Reduce cpufreq_update_util() overhead a bit
cpufreq: Select IRQ_WORK if CPU_FREQ_GOV_COMMON is set
cpufreq: Remove 'policy->governor_enabled'
cpufreq: Rename __cpufreq_governor() to cpufreq_governor()
cpufreq: Relocate handle_update() to kill its declaration
cpufreq: governor: Drop unnecessary checks from show() and store()
cpufreq: governor: Fix race in dbs_update_util_handler()
cpufreq: governor: Make gov_set_update_util() static
cpufreq: governor: Narrow down the dbs_data_mutex coverage
cpufreq: governor: Make dbs_data_mutex static
cpufreq: governor: Relocate definitions of tuners structures
cpufreq: governor: Move per-CPU data to the common code
cpufreq: governor: Make governor private data per-policy
...
The main thing in terms of the core this time around has been some
additional framework work for dynamic topologies (though we *still*
don't appear to have a stable ABI for the topology code, it's probably
worth considering if this will ever happen...). Otherwise the work has
almost all been in the drivers:
- HDMI support for Sky Lake, along with other fixes and enhancements
for the Intel drivers.
- Lots of improvements to the Renesas drivers.
- Capture support for Qualcomm drivers.
- Support for TI DaVinci DRA7xxx devices.
- New machine drivers for Freescale systems with Cirrus CODECs,
Mediatek systems with RT5650 CODECs.
- New CPU drivers for Allwinner S/PDIF controllers
- New CODEC drivers for Maxim MAX9867 and MAX98926 and Realtek RT5514.
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Merge tag 'asoc-v4.6' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound into for-linus
ASoC: Updates for v4.6
The main thing in terms of the core this time around has been some
additional framework work for dynamic topologies (though we *still*
don't appear to have a stable ABI for the topology code, it's probably
worth considering if this will ever happen...). Otherwise the work has
almost all been in the drivers:
- HDMI support for Sky Lake, along with other fixes and enhancements
for the Intel drivers.
- Lots of improvements to the Renesas drivers.
- Capture support for Qualcomm drivers.
- Support for TI DaVinci DRA7xxx devices.
- New machine drivers for Freescale systems with Cirrus CODECs,
Mediatek systems with RT5650 CODECs.
- New CPU drivers for Allwinner S/PDIF controllers
- New CODEC drivers for Maxim MAX9867 and MAX98926 and Realtek RT5514.
Freescale updates from Scott:
"Highlights include 8xx optimizations, 32-bit checksum optimizations,
86xx consolidation, e5500/e6500 cpu hotplug, more fman and other dt
bits, and minor fixes/cleanup."
Si-En Technology was acquired by ISSI in 2011, and it appears that
the IS31FL3218/IS31FL3216 are just rebranded SN3218/SN3216 devices.
Add the "si-en,sn3218" and "si-en,sn3216" compatible strings into the
IS31FL32XX driver as aliases for the issi equivalents, and update
binding documentation.
Datasheets:
IS31FL3218: http://www.issi.com/WW/pdf/31FL3218.pdf
SN3218: http://www.si-en.com/uploadpdf/s2011517171720.pdf
IS31FL3216: http://www.issi.com/WW/pdf/31FL3216.pdf
SN3216: http://www.si-en.com/uploadpdf/SN3216201152410148.pdf
Signed-off-by: David Rivshin <drivshin@allworx.com>
Acked-by: Rob Herring <robh@kernel.org>
Tested-by: Stefan Wahren <stefan.wahren@i2se.com>
Signed-off-by: Jacek Anaszewski <j.anaszewski@samsung.com>
Si-En Technology is a fabless design house which offers
audio amplifiers, LED drivers and sensors.
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Jacek Anaszewski <j.anaszewski@samsung.com>
This adds a binding description for the is31fl3236/35/18/16 I2C LED
controllers.
Signed-off-by: David Rivshin <drivshin@allworx.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Jacek Anaszewski <j.anaszewski@samsung.com>
ISSI is the stock ticker Integrated Silicon Solutions Inc.
Company website: http://www.issi.com
Signed-off-by: David Rivshin <drivshin@allworx.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Jacek Anaszewski <j.anaszewski@samsung.com>
Major changes:
ath10k
* dt: add bindings for ipq4019 wifi block
* start adding support for qca4019 chip
ath9k
* add device ID for Toshiba WLM-20U2/GN-1080
* allow more than one interface on DFS channels
bcma
* move flash detection code to ChipCommon core driver
brcmfmac
* IPv6 Neighbor discovery offload
* driver settings that can be populated from different sources
* country code setting in firmware
* length checks to validate firmware events
* new way to determine device memory size needed for BCM4366
* various offloads during Wake on Wireless LAN (WoWLAN)
* full Management Frame Protection (MFP) support
iwlwifi
* add support for thermal device / cooling device
* improvements in scheduled scan without profiles
* new firmware support (-21.ucode)
* add MSIX support for 9000 devices
* enable MU-MIMO and take care of firmware restart
* add support for large SKBs in mvm to reach A-MSDU
* add support for filtering frames from a BA session
* start implementing the new Rx path for 9000 devices
* enable the new Radio Resource Management (RRM) nl80211 feature flag
* add a new module paramater to disable VHT
* build infrastructure for Dynamic Queue Allocation
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Merge tag 'wireless-drivers-next-for-davem-2016-03-09' of git://git.kernel.org/pub/scm/linux/kernel/git/kvalo/wireless-drivers-next
Kalle Valo says:
====================
wireless-drivers patches for 4.6
Major changes:
ath10k
* dt: add bindings for ipq4019 wifi block
* start adding support for qca4019 chip
ath9k
* add device ID for Toshiba WLM-20U2/GN-1080
* allow more than one interface on DFS channels
bcma
* move flash detection code to ChipCommon core driver
brcmfmac
* IPv6 Neighbor discovery offload
* driver settings that can be populated from different sources
* country code setting in firmware
* length checks to validate firmware events
* new way to determine device memory size needed for BCM4366
* various offloads during Wake on Wireless LAN (WoWLAN)
* full Management Frame Protection (MFP) support
iwlwifi
* add support for thermal device / cooling device
* improvements in scheduled scan without profiles
* new firmware support (-21.ucode)
* add MSIX support for 9000 devices
* enable MU-MIMO and take care of firmware restart
* add support for large SKBs in mvm to reach A-MSDU
* add support for filtering frames from a BA session
* start implementing the new Rx path for 9000 devices
* enable the new Radio Resource Management (RRM) nl80211 feature flag
* add a new module paramater to disable VHT
* build infrastructure for Dynamic Queue Allocation
====================
Signed-off-by: David S. Miller <davem@davemloft.net>
Tronsmart Vega S95 Pro, Meta and Telos TV boxes.
- Add new DTS to enable support for the boards
- Add documentation for compatibles and vendor prefix
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Merge tag 'for-v4.6/gxbb-dt' of https://github.com/carlocaione/linux-meson into next/dt64
This series adds initial support for the Amlogic S905 based
Tronsmart Vega S95 Pro, Meta and Telos TV boxes.
- Add new DTS to enable support for the boards
- Add documentation for compatibles and vendor prefix
* tag 'for-v4.6/gxbb-dt' of https://github.com/carlocaione/linux-meson:
ARM64: dts: amlogic: Add Tronsmart Vega S95 configs
Documentation: devicetree: amlogic: Document Tronsmart Vega S95 boards
ARM64: dts: Prepare configs for Amlogic Meson GXBaby
Documentation: devicetree: amlogic: Document Meson GXBaby
devicetree: bindings: Add vendor prefix for Tronsmart
Signed-off-by: Olof Johansson <olof@lixom.net>
1. Remove separate ARCH_EXYNOS7 symbol and consolidate it into
one ARCH_EXYNOS.
This depends on clk tree: removal of last presence of ARCH_EXYNOS7.
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Merge tag 'samsung-soc64-4.6-2' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into next/arm64
Samsung Exynos ARM64 improvements for v4.6:
1. Remove separate ARCH_EXYNOS7 symbol and consolidate it into
one ARCH_EXYNOS.
This depends on clk tree: removal of last presence of ARCH_EXYNOS7.
* tag 'samsung-soc64-4.6-2' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
arm64: EXYNOS: Consolidate ARCH_EXYNOS7 symbol into ARCH_EXYNOS
clk: samsung: Don't build ARMv8 clock drivers on ARMv7
clk: samsung: Enable COMPILE_TEST for Samsung clocks
clk: Move vendor's Kconfig into CCF menu section
clk: mediatek: Fix memory leak on clock init fail
clk: move the common clock's to_clk_*(_hw) macros to clk-provider.h
clk: xgene: Remove return from void function
clk: xgene: Add SoC and PMD PLL clocks with v2 hardware
Documentation: Update APM X-Gene clock binding for v2 hardware
clk: s2mps11: remove redundant code
clk: s2mps11: remove redundant static variables declaration
clk: s2mps11: allocate only one structure for clock init
clk: s2mps11: merge two for loops in one
clk-divider: make sure read-only dividers do not write to their register
clk: tango4: rename ARCH_TANGOX to ARCH_TANGO
clk: scpi: Fix checking return value of platform_device_register_simple()
clk: mvebu: Mark ioremapped memory as __iomem
Signed-off-by: Olof Johansson <olof@lixom.net>
Add support for the Armada 7K and 8K SoCs and the Armada 8040 DB board
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Merge tag 'mvebu-dt64-4.6-2' of git://git.infradead.org/linux-mvebu into next/dt64
mvebu dt64 for 4.6 (part 2)
Add support for the Armada 7K and 8K SoCs and the Armada 8040 DB board
* tag 'mvebu-dt64-4.6-2' of git://git.infradead.org/linux-mvebu:
arm64: dts: marvell: re-order Device Tree nodes for Armada AP806
arm64: dts: marvell: update Armada AP806 clock description
arm64: dts: marvell: add Device Tree files for Armada 7K/8K
Signed-off-by: Olof Johansson <olof@lixom.net>
Hinawa [https://github.com/takaswie/libhinawa/] is a library for
access to IEEE 1394 devices. As a gobject introspection library, it
facilitates writing applications in high-level programming languages.
Besides generic I/O via /dev/fw* (firewire-cdev ABI), it also supports
control of IEEE 1394 audio hardware via ALSA hwdep ABIs which are
provided by sound/firewire drivers.
Signed-off-by: Stefan Richter <stefanr@s5r6.in-berlin.de>
Modify the documentation to match the actual parameter as implemented in
kernel/module.c:273.
Signed-off-by: James Johnston <johnstonj.public@codenest.com>
Reviewed-by: David Howells <dhowells@redhat.com>
Signed-off-by: Jonathan Corbet <corbet@lwn.net>
Renesas sound driver user needs to read its datasheet when create DT.
But it is difficult to understand, because it has many modules
(SRC/CTU/MIX/DVC/SSIU/SSI/AudioDMAC/AudioDMACperiperi),
and many features (Asynchronous/Synchronous mode on SRC, CTU matrix,
DVC volume settings feature, Multi-SSI/TDM-SSI, etc).
This patch adds simplified explanation to help setting/understanding.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Now the noltlbs kernel parameter is also applicable to PPC8xx
Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
Signed-off-by: Scott Wood <oss@buserror.net>
