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PCI Express Interface PMU includes various performance counters to monitor the data that is transmitted over the PCIe link. The counters track various inbound and outbound transactions which includes separate counters for posted/non-posted/completion TLPs. Also, inbound and outbound memory read requests along with their latencies can also be monitored. Address Translation Services(ATS)events such as ATS Translation, ATS Page Request, ATS Invalidation along with their corresponding latencies are also supported. The performance counters are 64 bits wide. For instance, perf stat -e ib_tlp_pr <workload> tracks the inbound posted TLPs for the workload. Co-developed-by: Linu Cherian <lcherian@marvell.com> Signed-off-by: Linu Cherian <lcherian@marvell.com> Signed-off-by: Gowthami Thiagarajan <gthiagarajan@marvell.com> Link: https://lore.kernel.org/r/20241028055309.17893-1-gthiagarajan@marvell.com Signed-off-by: Will Deacon <will@kernel.org>
57 lines
2.9 KiB
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57 lines
2.9 KiB
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=================================================================
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Marvell Odyssey PEM Performance Monitoring Unit (PMU UNCORE)
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=================================================================
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The PCI Express Interface Units(PEM) are associated with a corresponding
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monitoring unit. This includes performance counters to track various
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characteristics of the data that is transmitted over the PCIe link.
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The counters track inbound and outbound transactions which
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includes separate counters for posted/non-posted/completion TLPs.
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Also, inbound and outbound memory read requests along with their
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latencies can also be monitored. Address Translation Services(ATS)events
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such as ATS Translation, ATS Page Request, ATS Invalidation along with
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their corresponding latencies are also tracked.
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There are separate 64 bit counters to measure posted/non-posted/completion
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tlps in inbound and outbound transactions. ATS events are measured by
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different counters.
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The PMU driver exposes the available events and format options under sysfs,
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/sys/bus/event_source/devices/mrvl_pcie_rc_pmu_<>/events/
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/sys/bus/event_source/devices/mrvl_pcie_rc_pmu_<>/format/
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Examples::
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# perf list | grep mrvl_pcie_rc_pmu
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mrvl_pcie_rc_pmu_<>/ats_inv/ [Kernel PMU event]
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mrvl_pcie_rc_pmu_<>/ats_inv_latency/ [Kernel PMU event]
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mrvl_pcie_rc_pmu_<>/ats_pri/ [Kernel PMU event]
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mrvl_pcie_rc_pmu_<>/ats_pri_latency/ [Kernel PMU event]
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mrvl_pcie_rc_pmu_<>/ats_trans/ [Kernel PMU event]
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mrvl_pcie_rc_pmu_<>/ats_trans_latency/ [Kernel PMU event]
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mrvl_pcie_rc_pmu_<>/ib_inflight/ [Kernel PMU event]
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mrvl_pcie_rc_pmu_<>/ib_reads/ [Kernel PMU event]
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mrvl_pcie_rc_pmu_<>/ib_req_no_ro_ebus/ [Kernel PMU event]
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mrvl_pcie_rc_pmu_<>/ib_req_no_ro_ncb/ [Kernel PMU event]
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mrvl_pcie_rc_pmu_<>/ib_tlp_cpl_partid/ [Kernel PMU event]
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mrvl_pcie_rc_pmu_<>/ib_tlp_dwords_cpl_partid/ [Kernel PMU event]
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mrvl_pcie_rc_pmu_<>/ib_tlp_dwords_npr/ [Kernel PMU event]
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mrvl_pcie_rc_pmu_<>/ib_tlp_dwords_pr/ [Kernel PMU event]
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mrvl_pcie_rc_pmu_<>/ib_tlp_npr/ [Kernel PMU event]
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mrvl_pcie_rc_pmu_<>/ib_tlp_pr/ [Kernel PMU event]
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mrvl_pcie_rc_pmu_<>/ob_inflight_partid/ [Kernel PMU event]
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mrvl_pcie_rc_pmu_<>/ob_merges_cpl_partid/ [Kernel PMU event]
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mrvl_pcie_rc_pmu_<>/ob_merges_npr_partid/ [Kernel PMU event]
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mrvl_pcie_rc_pmu_<>/ob_merges_pr_partid/ [Kernel PMU event]
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mrvl_pcie_rc_pmu_<>/ob_reads_partid/ [Kernel PMU event]
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mrvl_pcie_rc_pmu_<>/ob_tlp_cpl_partid/ [Kernel PMU event]
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mrvl_pcie_rc_pmu_<>/ob_tlp_dwords_cpl_partid/ [Kernel PMU event]
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mrvl_pcie_rc_pmu_<>/ob_tlp_dwords_npr_partid/ [Kernel PMU event]
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mrvl_pcie_rc_pmu_<>/ob_tlp_dwords_pr_partid/ [Kernel PMU event]
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mrvl_pcie_rc_pmu_<>/ob_tlp_npr_partid/ [Kernel PMU event]
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mrvl_pcie_rc_pmu_<>/ob_tlp_pr_partid/ [Kernel PMU event]
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# perf stat -e ib_inflight,ib_reads,ib_req_no_ro_ebus,ib_req_no_ro_ncb <workload>
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