mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
synced 2024-12-29 17:25:38 +00:00
5780e39edb
- Micro-optimize the x86 bitops code
- Define target-specific {raw,this}_cpu_try_cmpxchg{64,128}() to improve code generation
- Define and use raw_cpu_try_cmpxchg() preempt_count_set()
- Do not clobber %rsi in percpu_{try_,}cmpxchg{64,128}_op
- Remove the unused __sw_hweight64() implementation on x86-32
- Misc fixes and cleanups
Signed-off-by: Ingo Molnar <mingo@kernel.org>
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Merge tag 'x86-asm-2023-10-28' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull x86 assembly code updates from Ingo Molnar:
- Micro-optimize the x86 bitops code
- Define target-specific {raw,this}_cpu_try_cmpxchg{64,128}() to
improve code generation
- Define and use raw_cpu_try_cmpxchg() preempt_count_set()
- Do not clobber %rsi in percpu_{try_,}cmpxchg{64,128}_op
- Remove the unused __sw_hweight64() implementation on x86-32
- Misc fixes and cleanups
* tag 'x86-asm-2023-10-28' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
x86/lib: Address kernel-doc warnings
x86/entry: Fix typos in comments
x86/entry: Remove unused argument %rsi passed to exc_nmi()
x86/bitops: Remove unused __sw_hweight64() assembly implementation on x86-32
x86/percpu: Do not clobber %rsi in percpu_{try_,}cmpxchg{64,128}_op
x86/percpu: Use raw_cpu_try_cmpxchg() in preempt_count_set()
x86/percpu: Define raw_cpu_try_cmpxchg and this_cpu_try_cmpxchg()
x86/percpu: Define {raw,this}_cpu_try_cmpxchg{64,128}
x86/asm/bitops: Use __builtin_clz{l|ll} to evaluate constant expressions
76 lines
2.2 KiB
ArmAsm
76 lines
2.2 KiB
ArmAsm
/* SPDX-License-Identifier: GPL-2.0 */
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#include <linux/export.h>
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#include <linux/linkage.h>
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#include <asm/asm.h>
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/*
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* unsigned int __sw_hweight32(unsigned int w)
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* %rdi: w
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*/
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SYM_FUNC_START(__sw_hweight32)
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#ifdef CONFIG_X86_64
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movl %edi, %eax # w
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#endif
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__ASM_SIZE(push,) %__ASM_REG(dx)
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movl %eax, %edx # w -> t
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shrl %edx # t >>= 1
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andl $0x55555555, %edx # t &= 0x55555555
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subl %edx, %eax # w -= t
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movl %eax, %edx # w -> t
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shrl $2, %eax # w_tmp >>= 2
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andl $0x33333333, %edx # t &= 0x33333333
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andl $0x33333333, %eax # w_tmp &= 0x33333333
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addl %edx, %eax # w = w_tmp + t
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movl %eax, %edx # w -> t
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shrl $4, %edx # t >>= 4
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addl %edx, %eax # w_tmp += t
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andl $0x0f0f0f0f, %eax # w_tmp &= 0x0f0f0f0f
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imull $0x01010101, %eax, %eax # w_tmp *= 0x01010101
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shrl $24, %eax # w = w_tmp >> 24
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__ASM_SIZE(pop,) %__ASM_REG(dx)
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RET
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SYM_FUNC_END(__sw_hweight32)
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EXPORT_SYMBOL(__sw_hweight32)
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/*
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* No 32-bit variant, because it's implemented as an inline wrapper
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* on top of __arch_hweight32():
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*/
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#ifdef CONFIG_X86_64
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SYM_FUNC_START(__sw_hweight64)
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pushq %rdi
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pushq %rdx
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movq %rdi, %rdx # w -> t
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movabsq $0x5555555555555555, %rax
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shrq %rdx # t >>= 1
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andq %rdx, %rax # t &= 0x5555555555555555
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movabsq $0x3333333333333333, %rdx
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subq %rax, %rdi # w -= t
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movq %rdi, %rax # w -> t
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shrq $2, %rdi # w_tmp >>= 2
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andq %rdx, %rax # t &= 0x3333333333333333
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andq %rdi, %rdx # w_tmp &= 0x3333333333333333
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addq %rdx, %rax # w = w_tmp + t
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movq %rax, %rdx # w -> t
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shrq $4, %rdx # t >>= 4
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addq %rdx, %rax # w_tmp += t
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movabsq $0x0f0f0f0f0f0f0f0f, %rdx
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andq %rdx, %rax # w_tmp &= 0x0f0f0f0f0f0f0f0f
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movabsq $0x0101010101010101, %rdx
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imulq %rdx, %rax # w_tmp *= 0x0101010101010101
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shrq $56, %rax # w = w_tmp >> 56
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popq %rdx
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popq %rdi
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RET
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SYM_FUNC_END(__sw_hweight64)
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EXPORT_SYMBOL(__sw_hweight64)
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#endif
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