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c9be539e11
The NXP PTN3222 is the single-port eUSB2 to USB2 redriver that performs translation between eUSB2 and USB2 signalling schemes. It supports all three data rates: Low Speed, Full Speed and High Speed. The reset state enables autonegotiation of the PHY role and of the data rate, so no additional programming is required. Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Tested-by: Konrad Dybcio <konradybcio@kernel.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Stephan Gerhold <stephan.gerhold@linaro.org> Tested-by: Stephan Gerhold <stephan.gerhold@linaro.org> Link: https://lore.kernel.org/r/20240830-nxp-ptn3222-v2-2-4c6d8535cf6c@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
43 lines
1.0 KiB
Makefile
43 lines
1.0 KiB
Makefile
# SPDX-License-Identifier: GPL-2.0
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#
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# Makefile for the phy drivers.
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#
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obj-$(CONFIG_GENERIC_PHY) += phy-core.o
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obj-$(CONFIG_GENERIC_PHY_MIPI_DPHY) += phy-core-mipi-dphy.o
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obj-$(CONFIG_PHY_CAN_TRANSCEIVER) += phy-can-transceiver.o
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obj-$(CONFIG_PHY_LPC18XX_USB_OTG) += phy-lpc18xx-usb-otg.o
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obj-$(CONFIG_PHY_XGENE) += phy-xgene.o
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obj-$(CONFIG_PHY_PISTACHIO_USB) += phy-pistachio-usb.o
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obj-$(CONFIG_USB_LGM_PHY) += phy-lgm-usb.o
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obj-$(CONFIG_PHY_AIROHA_PCIE) += phy-airoha-pcie.o
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obj-$(CONFIG_PHY_NXP_PTN3222) += phy-nxp-ptn3222.o
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obj-y += allwinner/ \
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amlogic/ \
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broadcom/ \
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cadence/ \
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freescale/ \
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hisilicon/ \
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ingenic/ \
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intel/ \
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lantiq/ \
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marvell/ \
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mediatek/ \
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microchip/ \
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motorola/ \
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mscc/ \
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nuvoton/ \
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qualcomm/ \
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ralink/ \
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realtek/ \
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renesas/ \
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rockchip/ \
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samsung/ \
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socionext/ \
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st/ \
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starfive/ \
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sunplus/ \
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tegra/ \
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ti/ \
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xilinx/
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