Andy Chiu 037df2966a dt-bindings: riscv: add Zve32[xf] Zve64[xfd] ISA extension description ... Add description for Zve32x Zve32f Zve64x Zve64f Zve64d ISA extensions. Signed-off-by: Andy Chiu <andy.chiu@sifive.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20240510-zve-detection-v5-4-0711bdd26c12@sifive.com Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>		2024-05-30 14:33:07 -07:00
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canaan.yaml	dt-bindings: Change Damien Le Moal's contact email	2023-06-08 07:31:27 -06:00
cpus.yaml	RISC-V Patches for the 6.9 Merge Window	2024-03-22 10:41:13 -07:00
extensions.yaml	dt-bindings: riscv: add Zve32[xf] Zve64[xfd] ISA extension description	2024-05-30 14:33:07 -07:00
microchip.yaml	dt-bindings: riscv: microchip: document the Aldec TySoM	2023-01-20 22:03:37 +00:00
sifive.yaml	dt-bindings: riscv: Update YAML doc to support SiFive HiFive Unmatched board	2021-01-07 17:37:41 -08:00
sophgo.yaml	dt-bindings: riscv: Add SOPHGO Huashan Pi board compatibles	2023-11-30 12:40:36 +00:00
starfive.yaml	dt-bindings: riscv: starfive: add Milkv Mars board	2024-04-30 22:04:16 +01:00
sunxi.yaml	dt-bindings: arm: sunxi: document MangoPi MQ-R board names	2023-03-27 22:45:22 +02:00
thead.yaml	dt-bindings: riscv: Add BeagleV Ahead board compatibles	2023-08-16 18:59:24 +01:00