Kang Luwei 0a27ff24d5 fpga: dfl: fme: add header sub feature support ...

The Header Register set is always present for FPGA Management Engine (FME),
this patch implements init and uinit function for header sub feature and
introduces several read-only sysfs interfaces for the capability and
status.

Sysfs interfaces:
* /sys/class/fpga_region/<regionX>/<dfl-fme.x>/ports_num
  Read-only. Number of ports implemented

* /sys/class/fpga_region/<regionX>/<dfl-fme.x>/bitstream_id
  Read-only. Bitstream (static FPGA region) identifier number. It contains
  the detailed version and other information of this static FPGA region.

* /sys/class/fpga_region/<regionX>/<dfl-fme.x>/bitstream_metadata
  Read-only. Bitstream (static FPGA region) meta data. It contains the
  synthesis date, seed and other information of this static FPGA region.

Signed-off-by: Tim Whisonant <tim.whisonant@intel.com>
Signed-off-by: Enno Luebbers <enno.luebbers@intel.com>
Signed-off-by: Shiva Rao <shiva.rao@intel.com>
Signed-off-by: Christopher Rauer <christopher.rauer@intel.com>
Signed-off-by: Kang Luwei <luwei.kang@intel.com>
Signed-off-by: Xiao Guangrong <guangrong.xiao@linux.intel.com>
Signed-off-by: Wu Hao <hao.wu@intel.com>
Acked-by: Alan Tull <atull@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

2018-07-15 13:55:46 +02:00

..

altera-cvp.c

fpga: manager: change api, don't use drvdata

2018-05-25 18:23:55 +02:00

altera-fpga2sdram.c

fpga: use SPDX

2018-05-25 18:23:56 +02:00

altera-freeze-bridge.c

fpga: use SPDX

2018-05-25 18:23:56 +02:00

altera-hps2fpga.c

fpga: use SPDX

2018-05-25 18:23:56 +02:00

altera-pr-ip-core-plat.c

fpga: use SPDX

2018-05-25 18:23:56 +02:00

altera-pr-ip-core.c

fpga: use SPDX

2018-05-25 18:23:56 +02:00

altera-ps-spi.c

fpga: manager: change api, don't use drvdata

2018-05-25 18:23:55 +02:00

dfl-fme-main.c

fpga: dfl: fme: add header sub feature support

2018-07-15 13:55:46 +02:00

dfl-pci.c

fpga: dfl-pci: add enumeration for feature devices

2018-07-15 13:55:45 +02:00

dfl.c

fpga: dfl: add dfl_fpga_check_port_id function.

2018-07-15 13:55:45 +02:00

dfl.h

fpga: dfl: add dfl_fpga_check_port_id function.

2018-07-15 13:55:45 +02:00

fpga-bridge.c

fpga: clarify that unregister functions also free

2018-05-25 18:23:56 +02:00

fpga-mgr.c

fpga: mgr: add status for fpga-manager

2018-07-15 13:55:44 +02:00

fpga-region.c

fpga: region: add compat_id support

2018-07-15 13:55:44 +02:00

ice40-spi.c

fpga: manager: change api, don't use drvdata

2018-05-25 18:23:55 +02:00

Kconfig

fpga: dfl: add FPGA Management Engine driver basic framework

2018-07-15 13:55:45 +02:00

machxo2-spi.c

fpga: manager: change api, don't use drvdata

2018-05-25 18:23:55 +02:00

Makefile

fpga: dfl: add FPGA Management Engine driver basic framework

2018-07-15 13:55:45 +02:00

of-fpga-region.c

fpga: use SPDX

2018-05-25 18:23:56 +02:00

socfpga-a10.c

fpga: use SPDX

2018-05-25 18:23:56 +02:00

socfpga.c

fpga: use SPDX

2018-05-25 18:23:56 +02:00

ts73xx-fpga.c

fpga: manager: change api, don't use drvdata

2018-05-25 18:23:55 +02:00

xilinx-pr-decoupler.c

fpga: bridge: change api, don't use drvdata

2018-05-25 18:23:55 +02:00

xilinx-spi.c

fpga: manager: change api, don't use drvdata

2018-05-25 18:23:55 +02:00

zynq-fpga.c

fpga: manager: change api, don't use drvdata

2018-05-25 18:23:55 +02:00