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36f65f9b7a
The question of exactly when KPTI needs to be disabled comes up a lot because it doesn't always need to be done. Add the relevant kernel function and some examples that describe the behavior. Also describe the interrupt requirement and that no error message will be printed if this isn't met. Reviewed-by: Ian Rogers <irogers@google.com> Signed-off-by: James Clark <james.clark@arm.com> Cc: Adrian Hunter <adrian.hunter@intel.com> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: Ingo Molnar <mingo@redhat.com> Cc: Jiri Olsa <jolsa@kernel.org> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <peterz@infradead.org> Link: https://lore.kernel.org/r/20240312132508.423320-1-james.clark@arm.com Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
229 lines
8.7 KiB
Plaintext
229 lines
8.7 KiB
Plaintext
perf-arm-spe(1)
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================
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NAME
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----
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perf-arm-spe - Support for Arm Statistical Profiling Extension within Perf tools
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SYNOPSIS
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--------
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[verse]
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'perf record' -e arm_spe//
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DESCRIPTION
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-----------
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The SPE (Statistical Profiling Extension) feature provides accurate attribution of latencies and
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events down to individual instructions. Rather than being interrupt-driven, it picks an
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instruction to sample and then captures data for it during execution. Data includes execution time
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in cycles. For loads and stores it also includes data address, cache miss events, and data origin.
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The sampling has 5 stages:
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1. Choose an operation
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2. Collect data about the operation
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3. Optionally discard the record based on a filter
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4. Write the record to memory
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5. Interrupt when the buffer is full
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Choose an operation
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~~~~~~~~~~~~~~~~~~~
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This is chosen from a sample population, for SPE this is an IMPLEMENTATION DEFINED choice of all
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architectural instructions or all micro-ops. Sampling happens at a programmable interval. The
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architecture provides a mechanism for the SPE driver to infer the minimum interval at which it should
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sample. This minimum interval is used by the driver if no interval is specified. A pseudo-random
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perturbation is also added to the sampling interval by default.
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Collect data about the operation
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~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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Program counter, PMU events, timings and data addresses related to the operation are recorded.
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Sampling ensures there is only one sampled operation is in flight.
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Optionally discard the record based on a filter
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~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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Based on programmable criteria, choose whether to keep the record or discard it. If the record is
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discarded then the flow stops here for this sample.
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Write the record to memory
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~~~~~~~~~~~~~~~~~~~~~~~~~~
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The record is appended to a memory buffer
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Interrupt when the buffer is full
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~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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When the buffer fills, an interrupt is sent and the driver signals Perf to collect the records.
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Perf saves the raw data in the perf.data file.
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Opening the file
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----------------
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Up until this point no decoding of the SPE data was done by either the kernel or Perf. Only when the
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recorded file is opened with 'perf report' or 'perf script' does the decoding happen. When decoding
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the data, Perf generates "synthetic samples" as if these were generated at the time of the
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recording. These samples are the same as if normal sampling was done by Perf without using SPE,
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although they may have more attributes associated with them. For example a normal sample may have
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just the instruction pointer, but an SPE sample can have data addresses and latency attributes.
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Why Sampling?
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-------------
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- Sampling, rather than tracing, cuts down the profiling problem to something more manageable for
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hardware. Only one sampled operation is in flight at a time.
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- Allows precise attribution data, including: Full PC of instruction, data virtual and physical
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addresses.
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- Allows correlation between an instruction and events, such as TLB and cache miss. (Data source
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indicates which particular cache was hit, but the meaning is implementation defined because
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different implementations can have different cache configurations.)
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However, SPE does not provide any call-graph information, and relies on statistical methods.
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Collisions
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----------
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When an operation is sampled while a previous sampled operation has not finished, a collision
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occurs. The new sample is dropped. Collisions affect the integrity of the data, so the sample rate
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should be set to avoid collisions.
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The 'sample_collision' PMU event can be used to determine the number of lost samples. Although this
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count is based on collisions _before_ filtering occurs. Therefore this can not be used as an exact
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number for samples dropped that would have made it through the filter, but can be a rough
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guide.
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The effect of microarchitectural sampling
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-----------------------------------------
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If an implementation samples micro-operations instead of instructions, the results of sampling must
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be weighted accordingly.
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For example, if a given instruction A is always converted into two micro-operations, A0 and A1, it
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becomes twice as likely to appear in the sample population.
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The coarse effect of conversions, and, if applicable, sampling of speculative operations, can be
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estimated from the 'sample_pop' and 'inst_retired' PMU events.
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Kernel Requirements
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-------------------
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The ARM_SPE_PMU config must be set to build as either a module or statically.
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Depending on CPU model, the kernel may need to be booted with page table isolation disabled
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(kpti=off). If KPTI needs to be disabled, this will fail with a console message "profiling buffer
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inaccessible. Try passing 'kpti=off' on the kernel command line".
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For the full criteria that determine whether KPTI needs to be forced off or not, see function
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unmap_kernel_at_el0() in the kernel sources. Common cases where it's not required
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are on the CPUs in kpti_safe_list, or on Arm v8.5+ where FEAT_E0PD is mandatory.
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The SPE interrupt must also be described by the firmware. If the module is loaded and KPTI is
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disabled (or isn't required to be disabled) but the SPE PMU still doesn't show in
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/sys/bus/event_source/devices/, then it's possible that the SPE interrupt isn't described by
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ACPI or DT. In this case no warning will be printed by the driver.
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Capturing SPE with perf command-line tools
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------------------------------------------
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You can record a session with SPE samples:
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perf record -e arm_spe// -- ./mybench
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The sample period is set from the -c option, and because the minimum interval is used by default
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it's recommended to set this to a higher value. The value is written to PMSIRR.INTERVAL.
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Config parameters
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~~~~~~~~~~~~~~~~~
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These are placed between the // in the event and comma separated. For example '-e
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arm_spe/load_filter=1,min_latency=10/'
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branch_filter=1 - collect branches only (PMSFCR.B)
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event_filter=<mask> - filter on specific events (PMSEVFR) - see bitfield description below
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jitter=1 - use jitter to avoid resonance when sampling (PMSIRR.RND)
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load_filter=1 - collect loads only (PMSFCR.LD)
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min_latency=<n> - collect only samples with this latency or higher* (PMSLATFR)
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pa_enable=1 - collect physical address (as well as VA) of loads/stores (PMSCR.PA) - requires privilege
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pct_enable=1 - collect physical timestamp instead of virtual timestamp (PMSCR.PCT) - requires privilege
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store_filter=1 - collect stores only (PMSFCR.ST)
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ts_enable=1 - enable timestamping with value of generic timer (PMSCR.TS)
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+++*+++ Latency is the total latency from the point at which sampling started on that instruction, rather
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than only the execution latency.
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Only some events can be filtered on; these include:
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bit 1 - instruction retired (i.e. omit speculative instructions)
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bit 3 - L1D refill
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bit 5 - TLB refill
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bit 7 - mispredict
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bit 11 - misaligned access
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So to sample just retired instructions:
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perf record -e arm_spe/event_filter=2/ -- ./mybench
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or just mispredicted branches:
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perf record -e arm_spe/event_filter=0x80/ -- ./mybench
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Viewing the data
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~~~~~~~~~~~~~~~~~
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By default perf report and perf script will assign samples to separate groups depending on the
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attributes/events of the SPE record. Because instructions can have multiple events associated with
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them, the samples in these groups are not necessarily unique. For example perf report shows these
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groups:
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Available samples
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0 arm_spe//
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0 dummy:u
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21 l1d-miss
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897 l1d-access
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5 llc-miss
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7 llc-access
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2 tlb-miss
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1K tlb-access
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36 branch-miss
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0 remote-access
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900 memory
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The arm_spe// and dummy:u events are implementation details and are expected to be empty.
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To get a full list of unique samples that are not sorted into groups, set the itrace option to
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generate 'instruction' samples. The period option is also taken into account, so set it to 1
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instruction unless you want to further downsample the already sampled SPE data:
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perf report --itrace=i1i
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Memory access details are also stored on the samples and this can be viewed with:
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perf report --mem-mode
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Common errors
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~~~~~~~~~~~~~
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- "Cannot find PMU `arm_spe'. Missing kernel support?"
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Module not built or loaded, KPTI not disabled, interrupt not described by firmware,
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or running on a VM. See 'Kernel Requirements' above.
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- "Arm SPE CONTEXT packets not found in the traces."
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Root privilege is required to collect context packets. But these only increase the accuracy of
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assigning PIDs to kernel samples. For userspace sampling this can be ignored.
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- Excessively large perf.data file size
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Increase sampling interval (see above)
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SEE ALSO
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--------
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linkperf:perf-record[1], linkperf:perf-script[1], linkperf:perf-report[1],
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linkperf:perf-inject[1]
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