Huacai Chen 1a34e7f2fc ACPI updates for 6.2-rc1 ... - Update the ACPICA code in the kernel to the 20221020 upstream version and fix a couple of issues in it: * Make acpi_ex_load_op() match upstream implementation (Rafael Wysocki). * Add support for loong_arch-specific APICs in MADT (Huacai Chen). * Add support for fixed PCIe wake event (Huacai Chen). * Add EBDA pointer sanity checks (Vit Kabele). * Avoid accessing VGA memory when EBDA < 1KiB (Vit Kabele). * Add CCEL table support to both compiler/disassembler (Kuppuswamy Sathyanarayanan). * Add a couple of new UUIDs to the known UUID list (Bob Moore). * Add support for FFH Opregion special context data (Sudeep Holla). * Improve warning message for "invalid ACPI name" (Bob Moore). * Add support for CXL 3.0 structures (CXIMS & RDPAS) in the CEDT table (Alison Schofield). * Prepare IORT support for revision E.e (Robin Murphy). * Finish support for the CDAT table (Bob Moore). * Fix error code path in acpi_ds_call_control_method() (Rafael Wysocki). * Fix use-after-free in acpi_ut_copy_ipackage_to_ipackage() (Li Zetao). * Update the version of the ACPICA code in the kernel (Bob Moore). - Use ZERO_PAGE(0) instead of empty_zero_page in the ACPI device enumeration code (Giulio Benetti). - Change the return type of the ACPI driver remove callback to void and update its users accordingly (Dawei Li). - Add general support for FFH address space type and implement the low- level part of it for ARM64 (Sudeep Holla). - Fix stale comments in the ACPI tables parsing code and make it print more messages related to MADT (Hanjun Guo, Huacai Chen). - Replace invocations of generic library functions with more kernel- specific counterparts in the ACPI sysfs interface (Christophe JAILLET, Xu Panda). - Print full name paths of ACPI power resource objects during enumeration (Kane Chen). - Eliminate a compiler warning regarding a missing function prototype in the ACPI power management code (Sudeep Holla). - Fix and clean up the ACPI processor driver (Rafael Wysocki, Li Zhong, Colin Ian King, Sudeep Holla). - Add quirk for the HP Pavilion Gaming 15-cx0041ur to the ACPI EC driver (Mia Kanashi). - Add some mew ACPI backlight handling quirks and update some existing ones (Hans de Goede). - Make the ACPI backlight driver prefer the native backlight control over vendor backlight control when possible (Hans de Goede). - Drop unsetting ACPI APEI driver data on remove (Uwe Kleine-König). - Use xchg_release() instead of cmpxchg() for updating new GHES cache slots (Ard Biesheuvel). - Clean up the ACPI APEI code (Sudeep Holla, Christophe JAILLET, Jay Lu). - Add new I2C device enumeration quirks for Medion Lifetab S10346 and Lenovo Yoga Tab 3 Pro (YT3-X90F) (Hans de Goede). - Make the ACPI battery driver notify user space about adding new battery hooks and removing the existing ones (Armin Wolf). - Modify the pfr_update and pfr_telemetry drivers to use ACPI_FREE() for freeing acpi_object structures to help diagnostics (Wang ShaoBo). - Make the ACPI fan driver use sysfs_emit_at() in its sysfs interface code (ye xingchen). - Fix the _FIF package extraction failure handling in the ACPI fan driver (Hanjun Guo). - Fix the PCC mailbox handling error code path (Huisong Li). - Avoid using PCC Opregions if there is no platform interrupt allocated for this purpose (Huisong Li). - Use sysfs_emit() instead of scnprintf() in the ACPI PAD driver and CPPC library (ye xingchen). - Fix some kernel-doc issues in the ACPI GSI processing code (Xiongfeng Wang). - Fix name memory leak in pnp_alloc_dev() (Yang Yingliang). - Do not disable PNP devices on suspend when they cannot be re-enabled on resume (Hans de Goede). - Clean up the ACPI thermal driver a bit (Rafael Wysocki). -----BEGIN PGP SIGNATURE----- iQJGBAABCAAwFiEE4fcc61cGeeHD/fCwgsRv/nhiVHEFAmOXV10SHHJqd0Byand5 c29ja2kubmV0AAoJEILEb/54YlRxuOwP/2zew6val2Jf7I/Yxf1iQLlRyGmhFnaH wpltJvBjlHjAUKnPQ/kLYK9fjuUY5HVgjOE03WpwhFUpmhftYTrSkhoVkJ1Mw9Zl RNOAEgCG484ThHiTIVp/dMPxrtfuqpdbamhWX3Q51IfXjGW8Vc/lDxIa3k/JQxyq ko8GFPCoebJrSCfuwaAf2+xSQaf6dq4jpL/rlIk+nYMMB9mQmXhNEhc+l97NaCe8 MyCIGynyNbhGsIlwdHRvTp04EIe8h0Z1+Dyns7g/TrzHj3Aezy7QVZbn8sKdZWa1 W/Ck9QST5tfpDWyr+hUXxUJjEn4Yy+GXjM2xON0EMx5q+JD9XsOpwWOVwTR7CS5s FwEd6I89SC8OZM86AgMtnGxygjpK24R/kGzHjhG15IQCsypc8Rvzoxl0L0YVoon/ UTkE57GzNWVzu0pY/oXJc2aT7lVqFXMFZ6ft/zHnBRnQmrcIi+xgDO5ni5KxctFN TVFwbAMCuwVx6IOcVQCZM2g4aJw426KpUn19fKnXvPwR5UIufBaCzSKWMiYrtdXr O5BM8ElYuyKCWGYEE0GSMjZygyDpyY6ENLH7s7P1IEmFyigBzaaGBbKm108JJq4V eCWJYTAx8pAptsU/vfuMvEQ1ErfhZ3TTokA5Lv0uPf53VcAnWDb7EAbW6ZGMwFSI IaV6cv6ILoqO =GVzp -----END PGP SIGNATURE----- mergetag object 6132a490f9 type commit tag irq-core-2022-12-10 tagger Thomas Gleixner <tglx@linutronix.de> 1670689576 +0100 Updates for the interrupt core and driver subsystem: - Core: The bulk is the rework of the MSI subsystem to support per device MSI interrupt domains. This solves conceptual problems of the current PCI/MSI design which are in the way of providing support for PCI/MSI[-X] and the upcoming PCI/IMS mechanism on the same device. IMS (Interrupt Message Store] is a new specification which allows device manufactures to provide implementation defined storage for MSI messages contrary to the uniform and specification defined storage mechanisms for PCI/MSI and PCI/MSI-X. IMS not only allows to overcome the size limitations of the MSI-X table, but also gives the device manufacturer the freedom to store the message in arbitrary places, even in host memory which is shared with the device. There have been several attempts to glue this into the current MSI code, but after lengthy discussions it turned out that there is a fundamental design problem in the current PCI/MSI-X implementation. This needs some historical background. When PCI/MSI[-X] support was added around 2003, interrupt management was completely different from what we have today in the actively developed architectures. Interrupt management was completely architecture specific and while there were attempts to create common infrastructure the commonalities were rudimentary and just providing shared data structures and interfaces so that drivers could be written in an architecture agnostic way. The initial PCI/MSI[-X] support obviously plugged into this model which resulted in some basic shared infrastructure in the PCI core code for setting up MSI descriptors, which are a pure software construct for holding data relevant for a particular MSI interrupt, but the actual association to Linux interrupts was completely architecture specific. This model is still supported today to keep museum architectures and notorious stranglers alive. In 2013 Intel tried to add support for hot-pluggable IO/APICs to the kernel, which was creating yet another architecture specific mechanism and resulted in an unholy mess on top of the existing horrors of x86 interrupt handling. The x86 interrupt management code was already an incomprehensible maze of indirections between the CPU vector management, interrupt remapping and the actual IO/APIC and PCI/MSI[-X] implementation. At roughly the same time ARM struggled with the ever growing SoC specific extensions which were glued on top of the architected GIC interrupt controller. This resulted in a fundamental redesign of interrupt management and provided the today prevailing concept of hierarchical interrupt domains. This allowed to disentangle the interactions between x86 vector domain and interrupt remapping and also allowed ARM to handle the zoo of SoC specific interrupt components in a sane way. The concept of hierarchical interrupt domains aims to encapsulate the functionality of particular IP blocks which are involved in interrupt delivery so that they become extensible and pluggable. The X86 encapsulation looks like this: |--- device 1 [Vector]---[Remapping]---[PCI/MSI]--|... |--- device N where the remapping domain is an optional component and in case that it is not available the PCI/MSI[-X] domains have the vector domain as their parent. This reduced the required interaction between the domains pretty much to the initialization phase where it is obviously required to establish the proper parent relation ship in the components of the hierarchy. While in most cases the model is strictly representing the chain of IP blocks and abstracting them so they can be plugged together to form a hierarchy, the design stopped short on PCI/MSI[-X]. Looking at the hardware it's clear that the actual PCI/MSI[-X] interrupt controller is not a global entity, but strict a per PCI device entity. Here we took a short cut on the hierarchical model and went for the easy solution of providing "global" PCI/MSI domains which was possible because the PCI/MSI[-X] handling is uniform across the devices. This also allowed to keep the existing PCI/MSI[-X] infrastructure mostly unchanged which in turn made it simple to keep the existing architecture specific management alive. A similar problem was created in the ARM world with support for IP block specific message storage. Instead of going all the way to stack a IP block specific domain on top of the generic MSI domain this ended in a construct which provides a "global" platform MSI domain which allows overriding the irq_write_msi_msg() callback per allocation. In course of the lengthy discussions we identified other abuse of the MSI infrastructure in wireless drivers, NTB etc. where support for implementation specific message storage was just mindlessly glued into the existing infrastructure. Some of this just works by chance on particular platforms but will fail in hard to diagnose ways when the driver is used on platforms where the underlying MSI interrupt management code does not expect the creative abuse. Another shortcoming of today's PCI/MSI-X support is the inability to allocate or free individual vectors after the initial enablement of MSI-X. This results in an works by chance implementation of VFIO (PCI pass-through) where interrupts on the host side are not set up upfront to avoid resource exhaustion. They are expanded at run-time when the guest actually tries to use them. The way how this is implemented is that the host disables MSI-X and then re-enables it with a larger number of vectors again. That works by chance because most device drivers set up all interrupts before the device actually will utilize them. But that's not universally true because some drivers allocate a large enough number of vectors but do not utilize them until it's actually required, e.g. for acceleration support. But at that point other interrupts of the device might be in active use and the MSI-X disable/enable dance can just result in losing interrupts and therefore hard to diagnose subtle problems. Last but not least the "global" PCI/MSI-X domain approach prevents to utilize PCI/MSI[-X] and PCI/IMS on the same device due to the fact that IMS is not longer providing a uniform storage and configuration model. The solution to this is to implement the missing step and switch from global PCI/MSI domains to per device PCI/MSI domains. The resulting hierarchy then looks like this: |--- [PCI/MSI] device 1 [Vector]---[Remapping]---|... |--- [PCI/MSI] device N which in turn allows to provide support for multiple domains per device: |--- [PCI/MSI] device 1 |--- [PCI/IMS] device 1 [Vector]---[Remapping]---|... |--- [PCI/MSI] device N |--- [PCI/IMS] device N This work converts the MSI and PCI/MSI core and the x86 interrupt domains to the new model, provides new interfaces for post-enable allocation/free of MSI-X interrupts and the base framework for PCI/IMS. PCI/IMS has been verified with the work in progress IDXD driver. There is work in progress to convert ARM over which will replace the platform MSI train-wreck. The cleanup of VFIO, NTB and other creative "solutions" are in the works as well. - Drivers: - Updates for the LoongArch interrupt chip drivers - Support for MTK CIRQv2 - The usual small fixes and updates all over the place -----BEGIN PGP SIGNATURE----- iQJHBAABCgAxFiEEQp8+kY+LLUocC4bMphj1TA10mKEFAmOUsygTHHRnbHhAbGlu dXRyb25peC5kZQAKCRCmGPVMDXSYoYXiD/40tXKzCzf0qFIqUlZLia1N3RRrwrNC DVTixuLtR9MrjwE+jWLQILa85SHInV8syXHSd35SzhsGDxkURFGi+HBgVWmysODf br9VSh3Gi+kt7iXtIwAg8WNWviGNmS3kPksxCko54F0YnJhMY5r5bhQVUBQkwFG2 wES1C9Uzd4pdV2bl24Z+WKL85cSmZ+pHunyKw1n401lBABXnTF9c4f13zC14jd+y wDxNrmOxeL3mEH4Pg6VyrDuTOURSf3TjJjeEq3EYqvUo0FyLt9I/cKX0AELcZQX7 fkRjrQQAvXNj39RJfeSkojDfllEPUHp7XSluhdBu5aIovSamdYGCDnuEoZ+l4MJ+ CojIErp3Dwj/uSaf5c7C3OaDAqH2CpOFWIcrUebShJE60hVKLEpUwd6W8juplaoT gxyXRb1Y+BeJvO8VhMN4i7f3232+sj8wuj+HTRTTbqMhkElnin94tAx8rgwR1sgR BiOGMJi4K2Y8s9Rqqp0Dvs01CW4guIYvSR4YY+WDbbi1xgiev89OYs6zZTJCJe4Y NUwwpqYSyP1brmtdDdBOZLqegjQm+TwUb6oOaasFem4vT1swgawgLcDnPOx45bk5 /FWt3EmnZxMz99x9jdDn1+BCqAZsKyEbEY1avvhPVMTwoVIuSX2ceTBMLseGq+jM 03JfvdxnueM3gw== =9erA -----END PGP SIGNATURE----- Merge tags 'acpi-6.2-rc1' and 'irq-core-2022-12-10' into loongarch-next LoongArch architecture changes for 6.2 depend on the acpi and irqchip changes to work, so merge them to create a base.		2022-12-13 19:19:41 +08:00
..
ABI	memory tier, sysfs: rename attribute "nodes" to "nodelist"	2022-10-28 13:37:22 -07:00
accounting	filemap: make the accounting of thrashing more consistent	2022-09-26 19:46:06 -07:00
admin-guide	Documentation: add amd-pstate kernel command line options	2022-11-22 19:57:15 +01:00
arc
arm	EFI updates for v6.1	2022-10-09 08:56:54 -07:00
arm64	ARM:	2022-11-06 10:46:59 -08:00
block	Documentation: document ublk user recovery feature	2022-10-18 05:12:26 -07:00
bpf	Networking changes for 6.1.	2022-10-04 13:38:03 -07:00
cdrom
core-api	overflow: Fix kern-doc markup for functions	2022-10-25 14:57:42 -07:00
cpu-freq
crypto
dev-tools	docs: kmsan: fix formatting of "Example report"	2022-11-08 15:57:25 -08:00
devicetree	ACPI updates for 6.2-rc1	2022-12-13 19:19:41 +08:00
doc-guide	Rust introduction for v6.1-rc1	2022-10-03 16:39:37 -07:00
driver-api	TTY/Serial driver fixes for 6.1-rc6	2022-11-18 10:59:52 -08:00
fault-injection	docs: notifier-error-inject: Correct test's name	2022-10-07 10:32:16 -06:00
fb	Documentation: fb: udlfb: clean up text and formatting	2022-09-27 13:21:44 -06:00
features
filesystems	A handful of relatively simple documentation fixes, plus a set of patches	2022-10-13 10:58:32 -07:00
firmware_class
firmware-guide	Merge branches 'acpi-misc', 'acpi-tools' and 'acpi-docs'	2022-10-03 20:03:49 +02:00
fpga
gpu	Immutable backlight-detect-refactor branch between acpi, drm-* and pdx86	2022-09-14 12:27:10 +01:00
hid
hwmon	hwmon: (corsair-psu) Add USB id of the new HX1500i psu	2022-10-22 06:59:12 -07:00
i2c	docs: i2c: slave-interface: return errno when handle I2C_SLAVE_WRITE_REQUESTED	2022-09-28 21:41:59 +02:00
ia64
iio	docs: iio: add documentation for BNO055 driver	2022-09-21 18:42:56 +01:00
images
infiniband
input	Merge branch 'next' into for-linus	2022-10-09 22:30:23 -07:00
isdn
kbuild	Documentation: kbuild: Add description of git for reproducible builds	2022-10-28 00:16:29 +09:00
kernel-hacking	Documentation: Fix spelling mistake in hacking.rst	2022-10-24 11:27:51 -06:00
leds
litmus-tests
livepatch
locking	Remove duplicate words inside documentation	2022-09-27 13:21:43 -06:00
loongarch	docs/LoongArch: Add booting description	2022-12-08 14:59:15 +08:00
m68k
maintainer
mhi
mips
misc-devices
mm	A handful of relatively simple documentation fixes, plus a set of patches	2022-10-13 10:58:32 -07:00
netlabel
networking	Documentation: networking: Update generic_netlink_howto URL	2022-11-23 17:25:02 -08:00
nios2
nvdimm
openrisc
parisc
PCI	Documentation: PCI: Add reference to PCI/MSI device driver APIs	2022-11-17 15:15:21 +01:00
pcmcia
peci
power
powerpc	powerpc/64s: update cpu selection options	2022-09-28 19:22:10 +10:00
process	Char/Misc driver fixes for 6.1-rc6	2022-11-18 10:29:25 -08:00
RCU	There's not a huge amount of activity in the docs tree this time around,	2022-10-03 10:23:32 -07:00
riscv	doc: RISC-V: Document that misaligned accesses are supported	2022-10-12 08:58:10 -07:00
rust	x86: enable initial Rust support	2022-09-28 09:02:45 +02:00
s390	vfio/mdev: embedd struct mdev_parent in the parent data structure	2022-10-04 12:06:58 -06:00
scheduler	docs: scheduler: Update new path for the sysctl knobs	2022-09-27 13:21:42 -06:00
scsi	scsi: docs: Fix a typo	2022-09-01 00:33:34 -04:00
security	landlock: Fix documentation style	2022-09-29 18:43:04 +02:00
sh
sound	ALSA: doc: Drop snd_dma_continuous_data() usages	2022-08-24 08:00:26 +02:00
sparc
sphinx	docs: kerneldoc-preamble: Test xeCJK.sty before loading	2022-08-18 11:27:55 -06:00
sphinx-static
spi
staging	docs: put atomic*.txt and memory-barriers.txt into the core-api book	2022-09-29 12:55:06 -06:00
target
timers
tools	A handful of relatively simple documentation fixes, plus a set of patches	2022-10-13 10:58:32 -07:00
trace	tracing/histogram: Update document for KEYS_MAX size	2022-10-18 15:41:56 -06:00
translations	docs/zh_CN: Add LoongArch booting description's translation	2022-12-08 15:03:14 +08:00
usb	usbip: add USBIP_URB_* URB transfer flags	2022-08-31 09:07:53 +02:00
userspace-api	media fixes for v6.1-rc2	2022-10-22 15:30:15 -07:00
virt	KVM: Document the interaction between KVM_CAP_HALT_POLL and halt_poll_ns	2022-12-02 13:20:30 -05:00
w1	Documentation: W1: minor typo corrections	2022-09-27 13:21:44 -06:00
watchdog
x86	- Get rid of a single ksize() usage	2022-10-04 10:12:08 -07:00
xtensa
.gitignore
arch.rst
atomic_bitops.txt	wait_on_bit: add an acquire memory barrier	2022-08-26 09:30:25 -07:00
atomic_t.txt
Changes
CodingStyle
conf.py	There's not a huge amount of activity in the docs tree this time around,	2022-10-03 10:23:32 -07:00
docutils.conf
dontdiff
index.rst	Rust introduction for v6.1-rc1	2022-10-03 16:39:37 -07:00
Kconfig
Makefile
memory-barriers.txt	docs/memory-barriers.txt: Fixup long lines	2022-08-31 05:15:31 -07:00
SubmittingPatches
subsystem-apis.rst	docs: Rewrite the front page	2022-09-29 12:55:06 -06:00