Jianqun Xu 28b05a64e4 soc: rockchip: io-domain: add rk3568 support ... The io-domain registers on RK3568 SoCs have three separated bits to enable/disable the 1.8v/2.5v/3.3v power. This patch make the write to be a operation, allow rk3568 uses a private register set function. Since the 2.5v mode hasn't been fully validated yet, the driver only sets 1.8v [enable] + 3.3v [disable] for 1.8v mode 1.8v [disable] + 3.3v [enable] for 3.3v mode There is not register order requirement which has been cleared by our IC team. For future reference the full usage matrix including the 2.5V setting is: case V33 V25 V18 result 0 0 0 0 IO safe, but cannot work 1 0 0 1 IO require 1.8V, should < 1.98V, otherwise IO may damage 2 0 1 0 IO require 2.5V, should < 2.75V, otherwise IO may damage 3 0 1 1 Invalid state, should avoid 4 1 0 0 IO require 3.3V, should < 3.63V, otherwise IO may damage 5 1 0 1 IO require 1.8V, should < 1.98V, otherwise IO may damage 6 1 1 0 IO require 2.5V, should < 2.75V, otherwise IO may damage 7 1 1 1 Invalid state, should avoid Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com> Tested-by: Peter Geis <pgwipeout@gmail.com> [added mode clarification from Jay] Link: https://lore.kernel.org/r/20210805120107.27007-3-michael.riesch@wolfvision.net Signed-off-by: Heiko Stuebner <heiko@sntech.de>		2021-08-14 08:23:47 +02:00
..
grf.c	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500	2019-06-19 17:09:55 +02:00
io-domain.c	soc: rockchip: io-domain: add rk3568 support	2021-08-14 08:23:47 +02:00
Kconfig	soc: rockchip: ROCKCHIP_GRF should not default to y, unconditionally	2021-07-12 13:29:09 +02:00
Makefile	PM: AVS: rockchip-io: Move the driver to the rockchip specific drivers	2020-10-16 18:23:15 +02:00
pm_domains.c	soc: rockchip: power-domain: add rk3568 powerdomains	2021-05-11 12:07:04 +02:00