Horatiu Vultur 4e4a1183f2 phy: lan966x: Add missing serdes mux entry ...

According to the datasheet(Table 3-2: Port configuration) the serdes 2
(SD2) can be configured to run QSGMII or SGMII mode. Already the QSGMII
mode is supported in the serdes_muxes list  but was missing the SGMII mode.
In this mode the serdes is connected to the port 4.
Therefore add this entry in the list.

Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
Link: https://lore.kernel.org/r/20240108205140.1701770-1-horatiu.vultur@microchip.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>

2024-01-24 11:24:29 +05:30

..

Kconfig

phy: Add lan966x ethernet serdes PHY driver

2021-11-23 13:09:08 +05:30

lan966x_serdes_regs.h

phy: Add RGMII support on lan966x

2022-09-13 19:14:53 +05:30

lan966x_serdes.c

phy: lan966x: Add missing serdes mux entry

2024-01-24 11:24:29 +05:30

Makefile

phy: Add lan966x ethernet serdes PHY driver

2021-11-23 13:09:08 +05:30

sparx5_serdes_regs.h

phy: sparx5-serdes: add registers required for SD/CMU power down

2023-05-08 17:13:00 +05:30

sparx5_serdes.c

phy: sparx5-serdes: add skip_cmu_cfg check when configuring lanes

2023-05-08 17:13:01 +05:30

sparx5_serdes.h

phy: sparx5-serdes: remove power up of all CMUs

2023-05-08 17:13:01 +05:30