Samuel Holland 8727163a1a dt-bindings: riscv: Add pointer masking ISA extensions ... The RISC-V Pointer Masking specification defines three extensions: Smmpm, Smnpm, and Ssnpm. Document the behavior of these extensions as following the ratified version 1.0 of the specification. Acked-by: Conor Dooley <conor.dooley@microchip.com> Reviewed-by: Charlie Jenkins <charlie@rivosinc.com> Signed-off-by: Samuel Holland <samuel.holland@sifive.com> Link: https://lore.kernel.org/r/20241016202814.4061541-2-samuel.holland@sifive.com Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>		2024-10-24 14:12:52 -07:00
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canaan.yaml	dt-bindings: Change Damien Le Moal's contact email	2023-06-08 07:31:27 -06:00
cpus.yaml	RISC-V Patches for the 6.11 Merge Window, Part 1	2024-07-20 09:11:27 -07:00
extensions.yaml	dt-bindings: riscv: Add pointer masking ISA extensions	2024-10-24 14:12:52 -07:00
microchip.yaml	dt-bindings: riscv: microchip: document beaglev-fire	2024-06-19 12:21:32 +01:00
sifive.yaml	dt-bindings: riscv: Update YAML doc to support SiFive HiFive Unmatched board	2021-01-07 17:37:41 -08:00
sophgo.yaml	dt-bindings: riscv: Add Sipeed LicheeRV Nano board compatibles	2024-09-02 08:55:07 +08:00
starfive.yaml	dt-bindings: riscv: starfive: add Star64 board compatible	2024-06-19 11:05:43 +01:00
sunxi.yaml	dt-bindings: arm: sunxi: document MangoPi MQ-R board names	2023-03-27 22:45:22 +02:00
thead.yaml	dt-bindings: riscv: Add BeagleV Ahead board compatibles	2023-08-16 18:59:24 +01:00