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This PFSM controls the operational modes of the PMIC: - STANDBY and LP_STANDBY, - ACTIVE state, - MCU_ONLY state, - RETENTION state, with or without DDR and/or GPIO retention. Depending on the current operational mode, some voltage domains remain energized while others can be off. This PFSM is also used to trigger a firmware update, and provides R/W access to device registers. See Documentation/misc-devices/tps6594-pfsm.rst for more information. Signed-off-by: Julien Panis <jpanis@baylibre.com> Message-ID: <20230511095126.105104-5-jpanis@baylibre.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
38 lines
1.1 KiB
C
38 lines
1.1 KiB
C
/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
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/*
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* Userspace ABI for TPS6594 PMIC Pre-configurable Finite State Machine
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*
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* Copyright (C) 2023 BayLibre Incorporated - https://www.baylibre.com/
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*/
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#ifndef __TPS6594_PFSM_H
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#define __TPS6594_PFSM_H
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#include <linux/const.h>
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#include <linux/ioctl.h>
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#include <linux/types.h>
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/**
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* struct pmic_state_opt - PMIC state options
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* @gpio_retention: if enabled, power rails associated with GPIO retention remain active
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* @ddr_retention: if enabled, power rails associated with DDR retention remain active
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* @mcu_only_startup_dest: if enabled, startup destination state is MCU_ONLY
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*/
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struct pmic_state_opt {
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__u8 gpio_retention;
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__u8 ddr_retention;
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__u8 mcu_only_startup_dest;
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};
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/* Commands */
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#define PMIC_BASE 'P'
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#define PMIC_GOTO_STANDBY _IO(PMIC_BASE, 0)
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#define PMIC_GOTO_LP_STANDBY _IO(PMIC_BASE, 1)
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#define PMIC_UPDATE_PGM _IO(PMIC_BASE, 2)
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#define PMIC_SET_ACTIVE_STATE _IO(PMIC_BASE, 3)
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#define PMIC_SET_MCU_ONLY_STATE _IOW(PMIC_BASE, 4, struct pmic_state_opt)
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#define PMIC_SET_RETENTION_STATE _IOW(PMIC_BASE, 5, struct pmic_state_opt)
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#endif /* __TPS6594_PFSM_H */
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