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9b3e150e31
The old RISC-V perf implementation allowed counting of only cycle/instruction counters using perf. Restore that feature by implementing a simple platform driver under a separate config to provide backward compatibility. Any existing software stack will continue to work as it is. However, it provides an easy way out in future where we can remove the legacy driver. Reviewed-by: Anup Patel <anup@brainfault.org> Signed-off-by: Atish Patra <atish.patra@wdc.com> Signed-off-by: Atish Patra <atishp@rivosinc.com> Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com> |
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.. | ||
hisilicon | ||
arm_dmc620_pmu.c | ||
arm_dsu_pmu.c | ||
arm_pmu_acpi.c | ||
arm_pmu_platform.c | ||
arm_pmu.c | ||
arm_smmuv3_pmu.c | ||
arm_spe_pmu.c | ||
arm-cci.c | ||
arm-ccn.c | ||
arm-cmn.c | ||
fsl_imx8_ddr_perf.c | ||
Kconfig | ||
Makefile | ||
marvell_cn10k_tad_pmu.c | ||
qcom_l2_pmu.c | ||
qcom_l3_pmu.c | ||
riscv_pmu_legacy.c | ||
riscv_pmu.c | ||
thunderx2_pmu.c | ||
xgene_pmu.c |