Chen-Yu Tsai f101796966 clk: sunxi: Add pll6 / 4 clock output to sun4i-a10-pll6 ...

The pll6 has a /4 output that is used as an input to the ahb mux clock.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>

2015-03-25 11:46:41 -07:00

..

clk-a10-hosc.c

clk: sunxi: Move the 24M oscillator to a file of its own

2014-06-11 09:58:44 +02:00

clk-a20-gmac.c

clk: sunxi: gmac-tx-clk mux is not a CLK_MUX_INDEX_BIT mux

2014-11-23 17:02:57 +01:00

clk-factors.c

clk: Add rate constraints to clocks

2015-02-02 14:23:42 -08:00

clk-factors.h

clk: sunxi: Give sunxi_factors_register a registers parameter

2014-12-21 23:51:37 +01:00

clk-mod0.c

clk: sunxi: Add mod0 and mmc module clock support for A80

2015-01-19 22:48:55 +01:00

clk-sun6i-apb0-gates.c

clk: Remove .owner field for driver

2014-09-25 17:43:31 -07:00

clk-sun6i-apb0.c

clk: Remove .owner field for driver

2014-09-25 17:43:31 -07:00

clk-sun6i-ar100.c

clk: Add rate constraints to clocks

2015-02-02 14:23:42 -08:00

clk-sun8i-apb0.c

clk: Remove .owner field for driver

2014-09-25 17:43:31 -07:00

clk-sun8i-mbus.c

clk: sunxi: Give sunxi_factors_register a registers parameter

2014-12-21 23:51:37 +01:00

clk-sun9i-core.c

clk: sunxi: rewrite sun9i_a80_get_pll4_factors()

2015-01-25 16:55:13 +01:00

clk-sun9i-mmc.c

clk: sunxi: Add driver for A80 MMC config clocks/resets

2015-01-20 17:14:38 +01:00

clk-sunxi.c

clk: sunxi: Add pll6 / 4 clock output to sun4i-a10-pll6

2015-03-25 11:46:41 -07:00

clk-usb.c

clk: sunxi: Add support for sun9i A80 USB clocks and resets

2015-02-23 09:25:54 +01:00

Makefile

clk: sunxi: Move USB clocks to separate file

2015-02-23 09:25:54 +01:00