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ca7f285171
IP core of the DW DMA controller may be synthesized with different max burst length of the transfers per each channel. According to Synopsis having the fixed maximum burst transactions length may provide some performance gain. At the same time setting up the source and destination multi size exceeding the max burst length limitation may cause a serious problems. In our case the DMA transaction just hangs up. In order to fix this lets introduce the max burst length platform config of the DW DMA controller device and don't let the DMA channels configuration code exceed the burst length hardware limitation. Note the maximum burst length parameter can be detected either in runtime from the DWC parameter registers or from the dedicated DT property. Depending on the IP core configuration the maximum value can vary from channel to channel so by overriding the channel slave max_burst capability we make sure a DMA consumer will get the channel-specific max burst length. Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20200723005848.31907-10-Sergey.Semin@baikalelectronics.ru Signed-off-by: Vinod Koul <vkoul@kernel.org>
137 lines
3.5 KiB
C
137 lines
3.5 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Platform driver for the Synopsys DesignWare DMA Controller
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*
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* Copyright (C) 2007-2008 Atmel Corporation
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* Copyright (C) 2010-2011 ST Microelectronics
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* Copyright (C) 2013 Intel Corporation
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*/
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#include <linux/of.h>
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#include <linux/of_dma.h>
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#include <linux/platform_device.h>
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#include "internal.h"
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static struct dma_chan *dw_dma_of_xlate(struct of_phandle_args *dma_spec,
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struct of_dma *ofdma)
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{
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struct dw_dma *dw = ofdma->of_dma_data;
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struct dw_dma_slave slave = {
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.dma_dev = dw->dma.dev,
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};
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dma_cap_mask_t cap;
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if (dma_spec->args_count != 3)
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return NULL;
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slave.src_id = dma_spec->args[0];
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slave.dst_id = dma_spec->args[0];
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slave.m_master = dma_spec->args[1];
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slave.p_master = dma_spec->args[2];
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if (WARN_ON(slave.src_id >= DW_DMA_MAX_NR_REQUESTS ||
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slave.dst_id >= DW_DMA_MAX_NR_REQUESTS ||
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slave.m_master >= dw->pdata->nr_masters ||
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slave.p_master >= dw->pdata->nr_masters))
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return NULL;
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dma_cap_zero(cap);
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dma_cap_set(DMA_SLAVE, cap);
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/* TODO: there should be a simpler way to do this */
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return dma_request_channel(cap, dw_dma_filter, &slave);
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}
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struct dw_dma_platform_data *dw_dma_parse_dt(struct platform_device *pdev)
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{
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struct device_node *np = pdev->dev.of_node;
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struct dw_dma_platform_data *pdata;
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u32 tmp, arr[DW_DMA_MAX_NR_MASTERS], mb[DW_DMA_MAX_NR_CHANNELS];
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u32 nr_masters;
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u32 nr_channels;
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if (!np) {
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dev_err(&pdev->dev, "Missing DT data\n");
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return NULL;
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}
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if (of_property_read_u32(np, "dma-masters", &nr_masters))
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return NULL;
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if (nr_masters < 1 || nr_masters > DW_DMA_MAX_NR_MASTERS)
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return NULL;
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if (of_property_read_u32(np, "dma-channels", &nr_channels))
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return NULL;
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if (nr_channels > DW_DMA_MAX_NR_CHANNELS)
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return NULL;
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pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL);
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if (!pdata)
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return NULL;
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pdata->nr_masters = nr_masters;
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pdata->nr_channels = nr_channels;
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if (!of_property_read_u32(np, "chan_allocation_order", &tmp))
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pdata->chan_allocation_order = (unsigned char)tmp;
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if (!of_property_read_u32(np, "chan_priority", &tmp))
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pdata->chan_priority = tmp;
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if (!of_property_read_u32(np, "block_size", &tmp))
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pdata->block_size = tmp;
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if (!of_property_read_u32_array(np, "data-width", arr, nr_masters)) {
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for (tmp = 0; tmp < nr_masters; tmp++)
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pdata->data_width[tmp] = arr[tmp];
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} else if (!of_property_read_u32_array(np, "data_width", arr, nr_masters)) {
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for (tmp = 0; tmp < nr_masters; tmp++)
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pdata->data_width[tmp] = BIT(arr[tmp] & 0x07);
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}
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if (!of_property_read_u32_array(np, "multi-block", mb, nr_channels)) {
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for (tmp = 0; tmp < nr_channels; tmp++)
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pdata->multi_block[tmp] = mb[tmp];
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} else {
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for (tmp = 0; tmp < nr_channels; tmp++)
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pdata->multi_block[tmp] = 1;
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}
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if (of_property_read_u32_array(np, "snps,max-burst-len", pdata->max_burst,
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nr_channels)) {
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memset32(pdata->max_burst, DW_DMA_MAX_BURST, nr_channels);
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}
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if (!of_property_read_u32(np, "snps,dma-protection-control", &tmp)) {
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if (tmp > CHAN_PROTCTL_MASK)
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return NULL;
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pdata->protctl = tmp;
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}
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return pdata;
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}
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void dw_dma_of_controller_register(struct dw_dma *dw)
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{
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struct device *dev = dw->dma.dev;
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int ret;
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if (!dev->of_node)
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return;
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ret = of_dma_controller_register(dev->of_node, dw_dma_of_xlate, dw);
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if (ret)
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dev_err(dev, "could not register of_dma_controller\n");
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}
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void dw_dma_of_controller_free(struct dw_dma *dw)
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{
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struct device *dev = dw->dma.dev;
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if (!dev->of_node)
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return;
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of_dma_controller_free(dev->of_node);
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}
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