David S. Miller d7ef9eeef0 Merge branch 'am65-cpsw-rx-dscp-prio-map'
Roger Quadros says:

====================
net: ethernet: ti: am65-cpsw: enable DSCP to priority map for RX

Configure default DSCP to User Priority mapping registers as per:
 https://datatracker.ietf.org/doc/html/rfc8325#section-4.3
and
 https://datatracker.ietf.org/doc/html/rfc8622#section-11

Also update Priority to Thread maping to be compliant with
IEEE802.1Q-2014. Priority Code Point (PCP) 2 is higher priority than
PCP 0 (Best Effort). PCP 1 (Background) is lower priority than
PCP 0 (Best Effort).

---
Changes in v4:
- Updated default DSCP to User Priority mapping as per
  https://datatracker.ietf.org/doc/html/rfc8325#section-4.3
  and
  https://datatracker.ietf.org/doc/html/rfc8622#section-11
- Link to v3: https://lore.kernel.org/r/20241109-am65-cpsw-multi-rx-dscp-v3-0-1cfb76928490@kernel.org

Changes in v3:
- Added Reviewed-by tag to patch 1
- Added macros for DSCP PRI field size and DSCP PRI per register
- Drop unnecessary readl() in am65_cpsw_port_set_dscp_map()
- Link to v2: https://lore.kernel.org/r/20241107-am65-cpsw-multi-rx-dscp-v2-0-9e9cd1920035@kernel.org

Changes in v2:
- Updated references to more recent standard IEEE802.1Q-2014.
- Dropped reference to web link which might change in the future.
- Typo fix in commit log.
- Link to v1: https://lore.kernel.org/r/20241105-am65-cpsw-multi-rx-dscp-v1-0-38db85333c88@kernel.org
====================

Signed-off-by: Roger Quadros <rogerq@kernel.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
2024-11-18 12:00:22 +00:00
2024-11-01 13:41:55 -10:00
2024-09-01 20:43:24 -07:00
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2024-11-08 09:25:33 +01:00
2024-10-21 11:22:04 -07:00
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2022-09-28 09:02:20 +02:00
2022-10-10 12:00:45 -07:00
2024-11-10 14:19:35 -08:00
2024-03-18 03:36:32 -06:00

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