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d230f1bfe7
Expose debug capabilities in the KFD topology node's HSA capabilities and debug properties flags. Ensure correct capabilities are exposed based on firmware support. Flag definitions can be referenced in uapi/linux/kfd_sysfs.h. Signed-off-by: Jonathan Kim <jonathan.kim@amd.com> Reviewed-by: Felix Kuehling <felix.kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
124 lines
5.0 KiB
C
124 lines
5.0 KiB
C
/* SPDX-License-Identifier: (GPL-2.0 WITH Linux-syscall-note) OR MIT */
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/*
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* Copyright 2021 Advanced Micro Devices, Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*/
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#ifndef KFD_SYSFS_H_INCLUDED
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#define KFD_SYSFS_H_INCLUDED
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/* Capability bits in node properties */
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#define HSA_CAP_HOT_PLUGGABLE 0x00000001
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#define HSA_CAP_ATS_PRESENT 0x00000002
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#define HSA_CAP_SHARED_WITH_GRAPHICS 0x00000004
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#define HSA_CAP_QUEUE_SIZE_POW2 0x00000008
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#define HSA_CAP_QUEUE_SIZE_32BIT 0x00000010
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#define HSA_CAP_QUEUE_IDLE_EVENT 0x00000020
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#define HSA_CAP_VA_LIMIT 0x00000040
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#define HSA_CAP_WATCH_POINTS_SUPPORTED 0x00000080
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#define HSA_CAP_WATCH_POINTS_TOTALBITS_MASK 0x00000f00
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#define HSA_CAP_WATCH_POINTS_TOTALBITS_SHIFT 8
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#define HSA_CAP_DOORBELL_TYPE_TOTALBITS_MASK 0x00003000
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#define HSA_CAP_DOORBELL_TYPE_TOTALBITS_SHIFT 12
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#define HSA_CAP_DOORBELL_TYPE_PRE_1_0 0x0
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#define HSA_CAP_DOORBELL_TYPE_1_0 0x1
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#define HSA_CAP_DOORBELL_TYPE_2_0 0x2
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#define HSA_CAP_AQL_QUEUE_DOUBLE_MAP 0x00004000
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#define HSA_CAP_TRAP_DEBUG_SUPPORT 0x00008000
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#define HSA_CAP_TRAP_DEBUG_WAVE_LAUNCH_TRAP_OVERRIDE_SUPPORTED 0x00010000
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#define HSA_CAP_TRAP_DEBUG_WAVE_LAUNCH_MODE_SUPPORTED 0x00020000
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#define HSA_CAP_TRAP_DEBUG_PRECISE_MEMORY_OPERATIONS_SUPPORTED 0x00040000
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/* Old buggy user mode depends on this being 0 */
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#define HSA_CAP_RESERVED_WAS_SRAM_EDCSUPPORTED 0x00080000
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#define HSA_CAP_MEM_EDCSUPPORTED 0x00100000
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#define HSA_CAP_RASEVENTNOTIFY 0x00200000
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#define HSA_CAP_ASIC_REVISION_MASK 0x03c00000
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#define HSA_CAP_ASIC_REVISION_SHIFT 22
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#define HSA_CAP_SRAM_EDCSUPPORTED 0x04000000
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#define HSA_CAP_SVMAPI_SUPPORTED 0x08000000
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#define HSA_CAP_FLAGS_COHERENTHOSTACCESS 0x10000000
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#define HSA_CAP_TRAP_DEBUG_FIRMWARE_SUPPORTED 0x20000000
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#define HSA_CAP_RESERVED 0xe00f8000
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/* debug_prop bits in node properties */
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#define HSA_DBG_WATCH_ADDR_MASK_LO_BIT_MASK 0x0000000f
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#define HSA_DBG_WATCH_ADDR_MASK_LO_BIT_SHIFT 0
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#define HSA_DBG_WATCH_ADDR_MASK_HI_BIT_MASK 0x000003f0
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#define HSA_DBG_WATCH_ADDR_MASK_HI_BIT_SHIFT 4
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#define HSA_DBG_DISPATCH_INFO_ALWAYS_VALID 0x00000400
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#define HSA_DBG_WATCHPOINTS_EXCLUSIVE 0x00000800
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#define HSA_DBG_RESERVED 0xfffffffffffff000ull
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/* Heap types in memory properties */
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#define HSA_MEM_HEAP_TYPE_SYSTEM 0
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#define HSA_MEM_HEAP_TYPE_FB_PUBLIC 1
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#define HSA_MEM_HEAP_TYPE_FB_PRIVATE 2
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#define HSA_MEM_HEAP_TYPE_GPU_GDS 3
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#define HSA_MEM_HEAP_TYPE_GPU_LDS 4
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#define HSA_MEM_HEAP_TYPE_GPU_SCRATCH 5
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/* Flag bits in memory properties */
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#define HSA_MEM_FLAGS_HOT_PLUGGABLE 0x00000001
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#define HSA_MEM_FLAGS_NON_VOLATILE 0x00000002
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#define HSA_MEM_FLAGS_RESERVED 0xfffffffc
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/* Cache types in cache properties */
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#define HSA_CACHE_TYPE_DATA 0x00000001
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#define HSA_CACHE_TYPE_INSTRUCTION 0x00000002
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#define HSA_CACHE_TYPE_CPU 0x00000004
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#define HSA_CACHE_TYPE_HSACU 0x00000008
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#define HSA_CACHE_TYPE_RESERVED 0xfffffff0
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/* Link types in IO link properties (matches CRAT link types) */
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#define HSA_IOLINK_TYPE_UNDEFINED 0
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#define HSA_IOLINK_TYPE_HYPERTRANSPORT 1
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#define HSA_IOLINK_TYPE_PCIEXPRESS 2
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#define HSA_IOLINK_TYPE_AMBA 3
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#define HSA_IOLINK_TYPE_MIPI 4
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#define HSA_IOLINK_TYPE_QPI_1_1 5
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#define HSA_IOLINK_TYPE_RESERVED1 6
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#define HSA_IOLINK_TYPE_RESERVED2 7
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#define HSA_IOLINK_TYPE_RAPID_IO 8
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#define HSA_IOLINK_TYPE_INFINIBAND 9
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#define HSA_IOLINK_TYPE_RESERVED3 10
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#define HSA_IOLINK_TYPE_XGMI 11
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#define HSA_IOLINK_TYPE_XGOP 12
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#define HSA_IOLINK_TYPE_GZ 13
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#define HSA_IOLINK_TYPE_ETHERNET_RDMA 14
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#define HSA_IOLINK_TYPE_RDMA_OTHER 15
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#define HSA_IOLINK_TYPE_OTHER 16
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/* Flag bits in IO link properties (matches CRAT flags, excluding the
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* bi-directional flag, which is not offially part of the CRAT spec, and
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* only used internally in KFD)
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*/
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#define HSA_IOLINK_FLAGS_ENABLED (1 << 0)
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#define HSA_IOLINK_FLAGS_NON_COHERENT (1 << 1)
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#define HSA_IOLINK_FLAGS_NO_ATOMICS_32_BIT (1 << 2)
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#define HSA_IOLINK_FLAGS_NO_ATOMICS_64_BIT (1 << 3)
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#define HSA_IOLINK_FLAGS_NO_PEER_TO_PEER_DMA (1 << 4)
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#define HSA_IOLINK_FLAGS_RESERVED 0xffffffe0
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#endif
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