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lan78xx: Read LED states from Device Tree
Add support for DT property "microchip,led-modes", a vector of zero to four cells (u32s) in the range 0-15, each of which sets the mode for one of the LEDs. Some possible values are: 0=link/activity 1=link1000/activity 2=link100/activity 3=link10/activity 4=link100/1000/activity 5=link10/1000/activity 6=link10/100/activity 14=off 15=on These values are given symbolic constants in a dt-bindings header. Also use the presence of the DT property to indicate that the LEDs should be enabled - necessary in the event that no valid OTP or EEPROM is available. Signed-off-by: Phil Elwell <phil@raspberrypi.org> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -14572,6 +14572,7 @@ M: Microchip Linux Driver Support <UNGLinuxDriver@microchip.com>
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L: netdev@vger.kernel.org
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S: Maintained
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F: drivers/net/usb/lan78xx.*
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F: include/dt-bindings/net/microchip-lan78xx.h
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USB MASS STORAGE DRIVER
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M: Alan Stern <stern@rowland.harvard.edu>
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@ -20,6 +20,8 @@
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#include <linux/ethtool.h>
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#include <linux/phy.h>
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#include <linux/microchipphy.h>
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#include <linux/of.h>
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#include <dt-bindings/net/microchip-lan78xx.h>
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#define DRIVER_AUTHOR "WOOJUNG HUH <woojung.huh@microchip.com>"
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#define DRIVER_DESC "Microchip LAN88XX PHY driver"
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@ -70,6 +72,8 @@ static int lan88xx_probe(struct phy_device *phydev)
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{
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struct device *dev = &phydev->mdio.dev;
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struct lan88xx_priv *priv;
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u32 led_modes[4];
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int len;
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priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
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if (!priv)
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@ -77,6 +81,27 @@ static int lan88xx_probe(struct phy_device *phydev)
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priv->wolopts = 0;
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len = of_property_read_variable_u32_array(dev->of_node,
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"microchip,led-modes",
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led_modes,
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0,
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ARRAY_SIZE(led_modes));
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if (len >= 0) {
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u32 reg = 0;
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int i;
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for (i = 0; i < len; i++) {
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if (led_modes[i] > 15)
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return -EINVAL;
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reg |= led_modes[i] << (i * 4);
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}
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for (; i < ARRAY_SIZE(led_modes); i++)
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reg |= LAN78XX_FORCE_LED_OFF << (i * 4);
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(void)phy_write(phydev, LAN78XX_PHY_LED_MODE_SELECT, reg);
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} else if (len == -EOVERFLOW) {
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return -EINVAL;
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}
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/* these values can be used to identify internal PHY */
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priv->chip_id = phy_read_mmd(phydev, 3, LAN88XX_MMD3_CHIP_ID);
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priv->chip_rev = phy_read_mmd(phydev, 3, LAN88XX_MMD3_CHIP_REV);
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@ -37,6 +37,7 @@
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#include <linux/irqchip/chained_irq.h>
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#include <linux/microchipphy.h>
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#include <linux/phy.h>
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#include <linux/of_mdio.h>
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#include <linux/of_net.h>
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#include "lan78xx.h"
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@ -1760,6 +1761,7 @@ static int lan78xx_mdiobus_write(struct mii_bus *bus, int phy_id, int idx,
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static int lan78xx_mdio_init(struct lan78xx_net *dev)
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{
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struct device_node *node;
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int ret;
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dev->mdiobus = mdiobus_alloc();
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@ -1788,7 +1790,13 @@ static int lan78xx_mdio_init(struct lan78xx_net *dev)
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break;
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}
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ret = mdiobus_register(dev->mdiobus);
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node = of_get_child_by_name(dev->udev->dev.of_node, "mdio");
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if (node) {
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ret = of_mdiobus_register(dev->mdiobus, node);
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of_node_put(node);
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} else {
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ret = mdiobus_register(dev->mdiobus);
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}
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if (ret) {
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netdev_err(dev->net, "can't register MDIO bus\n");
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goto exit1;
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@ -2077,6 +2085,28 @@ static int lan78xx_phy_init(struct lan78xx_net *dev)
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mii_adv = (u32)mii_advertise_flowctrl(dev->fc_request_control);
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phydev->advertising |= mii_adv_to_ethtool_adv_t(mii_adv);
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if (phydev->mdio.dev.of_node) {
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u32 reg;
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int len;
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len = of_property_count_elems_of_size(phydev->mdio.dev.of_node,
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"microchip,led-modes",
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sizeof(u32));
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if (len >= 0) {
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/* Ensure the appropriate LEDs are enabled */
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lan78xx_read_reg(dev, HW_CFG, ®);
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reg &= ~(HW_CFG_LED0_EN_ |
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HW_CFG_LED1_EN_ |
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HW_CFG_LED2_EN_ |
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HW_CFG_LED3_EN_);
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reg |= (len > 0) * HW_CFG_LED0_EN_ |
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(len > 1) * HW_CFG_LED1_EN_ |
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(len > 2) * HW_CFG_LED2_EN_ |
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(len > 3) * HW_CFG_LED3_EN_;
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lan78xx_write_reg(dev, HW_CFG, reg);
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}
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}
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genphy_config_aneg(phydev);
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dev->fc_autoneg = phydev->autoneg;
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21
include/dt-bindings/net/microchip-lan78xx.h
Normal file
21
include/dt-bindings/net/microchip-lan78xx.h
Normal file
@ -0,0 +1,21 @@
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/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef _DT_BINDINGS_MICROCHIP_LAN78XX_H
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#define _DT_BINDINGS_MICROCHIP_LAN78XX_H
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/* LED modes for LAN7800/LAN7850 embedded PHY */
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#define LAN78XX_LINK_ACTIVITY 0
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#define LAN78XX_LINK_1000_ACTIVITY 1
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#define LAN78XX_LINK_100_ACTIVITY 2
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#define LAN78XX_LINK_10_ACTIVITY 3
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#define LAN78XX_LINK_100_1000_ACTIVITY 4
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#define LAN78XX_LINK_10_1000_ACTIVITY 5
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#define LAN78XX_LINK_10_100_ACTIVITY 6
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#define LAN78XX_DUPLEX_COLLISION 8
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#define LAN78XX_COLLISION 9
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#define LAN78XX_ACTIVITY 10
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#define LAN78XX_AUTONEG_FAULT 12
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#define LAN78XX_FORCE_LED_OFF 14
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#define LAN78XX_FORCE_LED_ON 15
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#endif
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@ -70,4 +70,7 @@
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#define LAN88XX_MMD3_CHIP_ID (32877)
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#define LAN88XX_MMD3_CHIP_REV (32878)
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/* Registers specific to the LAN7800/LAN7850 embedded phy */
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#define LAN78XX_PHY_LED_MODE_SELECT (0x1D)
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#endif /* _MICROCHIPPHY_H */
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