mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
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pinctrl: sh-pfc: Updates for v4.20 (take two)
- Add MSIOF pin groups on R-Car E3 and D3, - Add support for the new RZ/G1N (R8A7744) and RZ/G2E (R8A774C0) SoCs, - Add I2C4, DU0, QSPI0, SDHI2, and USB pin groups on RZ/G1C, - Convert to SPDX license identifiers, - Small cleanups. -----BEGIN PGP SIGNATURE----- iHUEABYIAB0WIQQ9qaHoIs/1I4cXmEiKwlD9ZEnxcAUCW63oXAAKCRCKwlD9ZEnx cEZ3AP4zgrTOnA9iDjgqMPtkaHcIX4b2R8fykZeRBs0J5u9R3QD/Y4JqDXF/AbVB fAX+GuCf1oMOflFlde7Dpp1nDYIaAg8= =0a9P -----END PGP SIGNATURE----- Merge tag 'sh-pfc-for-v4.20-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into devel pinctrl: sh-pfc: Updates for v4.20 (take two) - Add MSIOF pin groups on R-Car E3 and D3, - Add support for the new RZ/G1N (R8A7744) and RZ/G2E (R8A774C0) SoCs, - Add I2C4, DU0, QSPI0, SDHI2, and USB pin groups on RZ/G1C, - Convert to SPDX license identifiers, - Small cleanups.
This commit is contained in:
Linus Walleij
commit
18887f31df
@ -14,9 +14,11 @@ Required Properties:
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- "renesas,pfc-r8a73a4": for R8A73A4 (R-Mobile APE6) compatible pin-controller.
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- "renesas,pfc-r8a7740": for R8A7740 (R-Mobile A1) compatible pin-controller.
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- "renesas,pfc-r8a7743": for R8A7743 (RZ/G1M) compatible pin-controller.
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- "renesas,pfc-r8a7744": for R8A7744 (RZ/G1N) compatible pin-controller.
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- "renesas,pfc-r8a7745": for R8A7745 (RZ/G1E) compatible pin-controller.
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- "renesas,pfc-r8a77470": for R8A77470 (RZ/G1C) compatible pin-controller.
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- "renesas,pfc-r8a774a1": for R8A774A1 (RZ/G2M) compatible pin-controller.
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- "renesas,pfc-r8a774c0": for R8A774C0 (RZ/G2E) compatible pin-controller.
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- "renesas,pfc-r8a7778": for R8A7778 (R-Car M1) compatible pin-controller.
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- "renesas,pfc-r8a7779": for R8A7779 (R-Car H1) compatible pin-controller.
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- "renesas,pfc-r8a7790": for R8A7790 (R-Car H2) compatible pin-controller.
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@ -1,11 +1,8 @@
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// SPDX-License-Identifier: GPL-2.0
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/*
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* Combined GPIO and pin controller support for Renesas RZ/A1 (r7s72100) SoC
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*
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* Copyright (C) 2017 Jacopo Mondi
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*
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* This file is licensed under the terms of the GNU General Public
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* License version 2. This program is licensed "as is" without any
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* warranty of any kind, whether express or implied.
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*/
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/*
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@ -1,3 +1,4 @@
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# SPDX-License-Identifier: GPL-2.0
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#
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# Renesas SH and SH Mobile PINCTRL drivers
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#
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@ -39,6 +40,11 @@ config PINCTRL_PFC_R8A7743
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depends on ARCH_R8A7743
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select PINCTRL_SH_PFC
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config PINCTRL_PFC_R8A7744
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def_bool y
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depends on ARCH_R8A7744
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select PINCTRL_SH_PFC
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config PINCTRL_PFC_R8A7745
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def_bool y
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depends on ARCH_R8A7745
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@ -54,6 +60,11 @@ config PINCTRL_PFC_R8A774A1
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depends on ARCH_R8A774A1
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select PINCTRL_SH_PFC
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config PINCTRL_PFC_R8A774C0
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def_bool y
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depends on ARCH_R8A774C0
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select PINCTRL_SH_PFC
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config PINCTRL_PFC_R8A7778
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def_bool y
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depends on ARCH_R8A7778
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@ -5,9 +5,11 @@ obj-$(CONFIG_PINCTRL_PFC_EMEV2) += pfc-emev2.o
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obj-$(CONFIG_PINCTRL_PFC_R8A73A4) += pfc-r8a73a4.o
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obj-$(CONFIG_PINCTRL_PFC_R8A7740) += pfc-r8a7740.o
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obj-$(CONFIG_PINCTRL_PFC_R8A7743) += pfc-r8a7791.o
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obj-$(CONFIG_PINCTRL_PFC_R8A7744) += pfc-r8a7791.o
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obj-$(CONFIG_PINCTRL_PFC_R8A7745) += pfc-r8a7794.o
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obj-$(CONFIG_PINCTRL_PFC_R8A77470) += pfc-r8a77470.o
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obj-$(CONFIG_PINCTRL_PFC_R8A774A1) += pfc-r8a7796.o
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obj-$(CONFIG_PINCTRL_PFC_R8A774C0) += pfc-r8a77990.o
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obj-$(CONFIG_PINCTRL_PFC_R8A7778) += pfc-r8a7778.o
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obj-$(CONFIG_PINCTRL_PFC_R8A7779) += pfc-r8a7779.o
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obj-$(CONFIG_PINCTRL_PFC_R8A7790) += pfc-r8a7790.o
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@ -1,3 +1,4 @@
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// SPDX-License-Identifier: GPL-2.0
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/*
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* Pin Control and GPIO driver for SuperH Pin Function Controller.
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*
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@ -5,10 +6,6 @@
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*
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* Copyright (C) 2008 Magnus Damm
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* Copyright (C) 2009 - 2012 Paul Mundt
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*/
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#define DRV_NAME "sh-pfc"
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@ -497,6 +494,12 @@ static const struct of_device_id sh_pfc_of_table[] = {
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.data = &r8a7743_pinmux_info,
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},
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#endif
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#ifdef CONFIG_PINCTRL_PFC_R8A7744
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{
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.compatible = "renesas,pfc-r8a7744",
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.data = &r8a7744_pinmux_info,
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},
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#endif
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#ifdef CONFIG_PINCTRL_PFC_R8A7745
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{
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.compatible = "renesas,pfc-r8a7745",
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@ -515,6 +518,12 @@ static const struct of_device_id sh_pfc_of_table[] = {
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.data = &r8a774a1_pinmux_info,
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},
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#endif
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#ifdef CONFIG_PINCTRL_PFC_R8A774C0
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{
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.compatible = "renesas,pfc-r8a774c0",
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.data = &r8a774c0_pinmux_info,
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},
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#endif
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#ifdef CONFIG_PINCTRL_PFC_R8A7778
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{
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.compatible = "renesas,pfc-r8a7778",
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@ -1,11 +1,8 @@
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/*
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/* SPDX-License-Identifier: GPL-2.0
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*
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* SuperH Pin Function Controller support.
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*
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* Copyright (C) 2012 Renesas Solutions Corp.
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*/
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#ifndef __SH_PFC_CORE_H__
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#define __SH_PFC_CORE_H__
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@ -1,12 +1,9 @@
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// SPDX-License-Identifier: GPL-2.0
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/*
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* SuperH Pin Function Controller GPIO driver.
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*
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* Copyright (C) 2008 Magnus Damm
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* Copyright (C) 2009 - 2012 Paul Mundt
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*/
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#include <linux/device.h>
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@ -1,11 +1,8 @@
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// SPDX-License-Identifier: GPL-2.0
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/*
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* Pin Function Controller Support
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*
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* Copyright (C) 2015 Niklas Söderlund
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*/
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#include <linux/init.h>
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#include <linux/kernel.h>
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@ -1,21 +1,8 @@
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// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (C) 2012-2013 Renesas Solutions Corp.
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* Copyright (C) 2013 Magnus Damm
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* Copyright (C) 2012 Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; version 2 of the
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* License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include <linux/io.h>
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#include <linux/kernel.h>
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@ -1,22 +1,9 @@
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// SPDX-License-Identifier: GPL-2.0
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/*
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* R8A7740 processor support
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*
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* Copyright (C) 2011 Renesas Solutions Corp.
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* Copyright (C) 2011 Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; version 2 of the
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* License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include <linux/io.h>
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#include <linux/kernel.h>
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@ -1197,6 +1197,129 @@ static const unsigned int avb_avtp_capture_b_pins[] = {
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static const unsigned int avb_avtp_capture_b_mux[] = {
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AVB_AVTP_CAPTURE_B_MARK,
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};
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/* - DU --------------------------------------------------------------------- */
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static const unsigned int du0_rgb666_pins[] = {
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/* R[7:2], G[7:2], B[7:2] */
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RCAR_GP_PIN(2, 7), RCAR_GP_PIN(2, 6), RCAR_GP_PIN(2, 5),
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RCAR_GP_PIN(2, 4), RCAR_GP_PIN(2, 3), RCAR_GP_PIN(2, 2),
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RCAR_GP_PIN(2, 15), RCAR_GP_PIN(2, 14), RCAR_GP_PIN(2, 13),
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RCAR_GP_PIN(2, 12), RCAR_GP_PIN(2, 11), RCAR_GP_PIN(2, 10),
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RCAR_GP_PIN(2, 23), RCAR_GP_PIN(2, 22), RCAR_GP_PIN(2, 21),
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RCAR_GP_PIN(2, 20), RCAR_GP_PIN(2, 19), RCAR_GP_PIN(2, 18),
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};
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static const unsigned int du0_rgb666_mux[] = {
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DU0_DR7_MARK, DU0_DR6_MARK, DU0_DR5_MARK, DU0_DR4_MARK,
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DU0_DR3_MARK, DU0_DR2_MARK,
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DU0_DG7_MARK, DU0_DG6_MARK, DU0_DG5_MARK, DU0_DG4_MARK,
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DU0_DG3_MARK, DU0_DG2_MARK,
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DU0_DB7_MARK, DU0_DB6_MARK, DU0_DB5_MARK, DU0_DB4_MARK,
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DU0_DB3_MARK, DU0_DB2_MARK,
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};
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static const unsigned int du0_rgb888_pins[] = {
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/* R[7:0], G[7:0], B[7:0] */
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RCAR_GP_PIN(2, 7), RCAR_GP_PIN(2, 6), RCAR_GP_PIN(2, 5),
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RCAR_GP_PIN(2, 4), RCAR_GP_PIN(2, 3), RCAR_GP_PIN(2, 2),
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RCAR_GP_PIN(2, 1), RCAR_GP_PIN(2, 0),
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RCAR_GP_PIN(2, 15), RCAR_GP_PIN(2, 14), RCAR_GP_PIN(2, 13),
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RCAR_GP_PIN(2, 12), RCAR_GP_PIN(2, 11), RCAR_GP_PIN(2, 10),
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RCAR_GP_PIN(2, 9), RCAR_GP_PIN(2, 8),
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RCAR_GP_PIN(2, 23), RCAR_GP_PIN(2, 22), RCAR_GP_PIN(2, 21),
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RCAR_GP_PIN(2, 20), RCAR_GP_PIN(2, 19), RCAR_GP_PIN(2, 18),
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RCAR_GP_PIN(2, 17), RCAR_GP_PIN(2, 16),
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};
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static const unsigned int du0_rgb888_mux[] = {
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DU0_DR7_MARK, DU0_DR6_MARK, DU0_DR5_MARK, DU0_DR4_MARK,
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DU0_DR3_MARK, DU0_DR2_MARK, DU0_DR1_MARK, DU0_DR0_MARK,
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DU0_DG7_MARK, DU0_DG6_MARK, DU0_DG5_MARK, DU0_DG4_MARK,
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DU0_DG3_MARK, DU0_DG2_MARK, DU0_DG1_MARK, DU0_DG0_MARK,
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DU0_DB7_MARK, DU0_DB6_MARK, DU0_DB5_MARK, DU0_DB4_MARK,
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DU0_DB3_MARK, DU0_DB2_MARK, DU0_DB1_MARK, DU0_DB0_MARK,
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};
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static const unsigned int du0_clk0_out_pins[] = {
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/* DOTCLKOUT0 */
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RCAR_GP_PIN(2, 25),
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};
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static const unsigned int du0_clk0_out_mux[] = {
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DU0_DOTCLKOUT0_MARK
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};
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static const unsigned int du0_clk1_out_pins[] = {
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/* DOTCLKOUT1 */
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RCAR_GP_PIN(2, 26),
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};
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static const unsigned int du0_clk1_out_mux[] = {
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DU0_DOTCLKOUT1_MARK
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};
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static const unsigned int du0_clk_in_pins[] = {
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/* CLKIN */
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RCAR_GP_PIN(2, 24),
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};
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static const unsigned int du0_clk_in_mux[] = {
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DU0_DOTCLKIN_MARK
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};
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static const unsigned int du0_sync_pins[] = {
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/* EXVSYNC/VSYNC, EXHSYNC/HSYNC */
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RCAR_GP_PIN(2, 28), RCAR_GP_PIN(2, 27),
|
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};
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static const unsigned int du0_sync_mux[] = {
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DU0_EXVSYNC_DU0_VSYNC_MARK, DU0_EXHSYNC_DU0_HSYNC_MARK
|
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};
|
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static const unsigned int du0_oddf_pins[] = {
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/* EXODDF/ODDF/DISP/CDE */
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RCAR_GP_PIN(2, 29),
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};
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static const unsigned int du0_oddf_mux[] = {
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DU0_EXODDF_DU0_ODDF_DISP_CDE_MARK,
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};
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static const unsigned int du0_cde_pins[] = {
|
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/* CDE */
|
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RCAR_GP_PIN(2, 31),
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};
|
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static const unsigned int du0_cde_mux[] = {
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DU0_CDE_MARK,
|
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};
|
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static const unsigned int du0_disp_pins[] = {
|
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/* DISP */
|
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RCAR_GP_PIN(2, 30),
|
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};
|
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static const unsigned int du0_disp_mux[] = {
|
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DU0_DISP_MARK
|
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};
|
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/* - I2C4 ------------------------------------------------------------------- */
|
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static const unsigned int i2c4_a_pins[] = {
|
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/* SCL, SDA */
|
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RCAR_GP_PIN(4, 10), RCAR_GP_PIN(4, 11),
|
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};
|
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static const unsigned int i2c4_a_mux[] = {
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SCL4_A_MARK, SDA4_A_MARK,
|
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};
|
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static const unsigned int i2c4_b_pins[] = {
|
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/* SCL, SDA */
|
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RCAR_GP_PIN(5, 30), RCAR_GP_PIN(5, 31),
|
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};
|
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static const unsigned int i2c4_b_mux[] = {
|
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SCL4_B_MARK, SDA4_B_MARK,
|
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};
|
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static const unsigned int i2c4_c_pins[] = {
|
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/* SCL, SDA */
|
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RCAR_GP_PIN(5, 4), RCAR_GP_PIN(5, 5),
|
||||
};
|
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static const unsigned int i2c4_c_mux[] = {
|
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SCL4_C_MARK, SDA4_C_MARK,
|
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};
|
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static const unsigned int i2c4_d_pins[] = {
|
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/* SCL, SDA */
|
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RCAR_GP_PIN(2, 16), RCAR_GP_PIN(2, 17),
|
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};
|
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static const unsigned int i2c4_d_mux[] = {
|
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SCL4_D_MARK, SDA4_D_MARK,
|
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};
|
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static const unsigned int i2c4_e_pins[] = {
|
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/* SCL, SDA */
|
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RCAR_GP_PIN(5, 7), RCAR_GP_PIN(5, 6),
|
||||
};
|
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static const unsigned int i2c4_e_mux[] = {
|
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SCL4_E_MARK, SDA4_E_MARK,
|
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};
|
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/* - MMC -------------------------------------------------------------------- */
|
||||
static const unsigned int mmc_data1_pins[] = {
|
||||
/* D0 */
|
||||
@ -1234,6 +1357,30 @@ static const unsigned int mmc_ctrl_pins[] = {
|
||||
static const unsigned int mmc_ctrl_mux[] = {
|
||||
MMC0_CLK_SDHI1_CLK_MARK, MMC0_CMD_SDHI1_CMD_MARK,
|
||||
};
|
||||
/* - QSPI ------------------------------------------------------------------- */
|
||||
static const unsigned int qspi0_ctrl_pins[] = {
|
||||
/* SPCLK, SSL */
|
||||
RCAR_GP_PIN(1, 16), RCAR_GP_PIN(1, 21),
|
||||
};
|
||||
static const unsigned int qspi0_ctrl_mux[] = {
|
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QSPI0_SPCLK_MARK, QSPI0_SSL_MARK,
|
||||
};
|
||||
static const unsigned int qspi0_data2_pins[] = {
|
||||
/* MOSI_IO0, MISO_IO1 */
|
||||
RCAR_GP_PIN(1, 17), RCAR_GP_PIN(1, 18),
|
||||
};
|
||||
static const unsigned int qspi0_data2_mux[] = {
|
||||
QSPI0_MOSI_QSPI0_IO0_MARK, QSPI0_MISO_QSPI0_IO1_MARK,
|
||||
};
|
||||
static const unsigned int qspi0_data4_pins[] = {
|
||||
/* MOSI_IO0, MISO_IO1, IO2, IO3 */
|
||||
RCAR_GP_PIN(1, 17), RCAR_GP_PIN(1, 18), RCAR_GP_PIN(1, 19),
|
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RCAR_GP_PIN(1, 20),
|
||||
};
|
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static const unsigned int qspi0_data4_mux[] = {
|
||||
QSPI0_MOSI_QSPI0_IO0_MARK, QSPI0_MISO_QSPI0_IO1_MARK,
|
||||
QSPI0_IO2_MARK, QSPI0_IO3_MARK,
|
||||
};
|
||||
/* - SCIF0 ------------------------------------------------------------------ */
|
||||
static const unsigned int scif0_data_a_pins[] = {
|
||||
/* RX, TX */
|
||||
@ -1472,6 +1619,61 @@ static const unsigned int scif_clk_b_pins[] = {
|
||||
static const unsigned int scif_clk_b_mux[] = {
|
||||
SCIF_CLK_B_MARK,
|
||||
};
|
||||
/* - SDHI2 ------------------------------------------------------------------ */
|
||||
static const unsigned int sdhi2_data1_pins[] = {
|
||||
/* D0 */
|
||||
RCAR_GP_PIN(4, 16),
|
||||
};
|
||||
static const unsigned int sdhi2_data1_mux[] = {
|
||||
SD2_DAT0_MARK,
|
||||
};
|
||||
static const unsigned int sdhi2_data4_pins[] = {
|
||||
/* D[0:3] */
|
||||
RCAR_GP_PIN(4, 16), RCAR_GP_PIN(4, 17),
|
||||
RCAR_GP_PIN(4, 18), RCAR_GP_PIN(4, 19),
|
||||
};
|
||||
static const unsigned int sdhi2_data4_mux[] = {
|
||||
SD2_DAT0_MARK, SD2_DAT1_MARK, SD2_DAT2_MARK, SD2_DAT3_MARK,
|
||||
};
|
||||
static const unsigned int sdhi2_ctrl_pins[] = {
|
||||
/* CLK, CMD */
|
||||
RCAR_GP_PIN(4, 14), RCAR_GP_PIN(4, 15),
|
||||
};
|
||||
static const unsigned int sdhi2_ctrl_mux[] = {
|
||||
SD2_CLK_MARK, SD2_CMD_MARK,
|
||||
};
|
||||
static const unsigned int sdhi2_cd_pins[] = {
|
||||
/* CD */
|
||||
RCAR_GP_PIN(4, 20),
|
||||
};
|
||||
static const unsigned int sdhi2_cd_mux[] = {
|
||||
SD2_CD_MARK,
|
||||
};
|
||||
static const unsigned int sdhi2_wp_pins[] = {
|
||||
/* WP */
|
||||
RCAR_GP_PIN(4, 21),
|
||||
};
|
||||
static const unsigned int sdhi2_wp_mux[] = {
|
||||
SD2_WP_MARK,
|
||||
};
|
||||
/* - USB0 ------------------------------------------------------------------- */
|
||||
static const unsigned int usb0_pins[] = {
|
||||
RCAR_GP_PIN(0, 0), /* PWEN */
|
||||
RCAR_GP_PIN(0, 1), /* OVC */
|
||||
};
|
||||
static const unsigned int usb0_mux[] = {
|
||||
USB0_PWEN_MARK,
|
||||
USB0_OVC_MARK,
|
||||
};
|
||||
/* - USB1 ------------------------------------------------------------------- */
|
||||
static const unsigned int usb1_pins[] = {
|
||||
RCAR_GP_PIN(0, 2), /* PWEN */
|
||||
RCAR_GP_PIN(0, 3), /* OVC */
|
||||
};
|
||||
static const unsigned int usb1_mux[] = {
|
||||
USB1_PWEN_MARK,
|
||||
USB1_OVC_MARK,
|
||||
};
|
||||
|
||||
static const struct sh_pfc_pin_group pinmux_groups[] = {
|
||||
SH_PFC_PIN_GROUP(avb_col),
|
||||
@ -1487,10 +1689,27 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
|
||||
SH_PFC_PIN_GROUP(avb_avtp_capture_a),
|
||||
SH_PFC_PIN_GROUP(avb_avtp_match_b),
|
||||
SH_PFC_PIN_GROUP(avb_avtp_capture_b),
|
||||
SH_PFC_PIN_GROUP(du0_rgb666),
|
||||
SH_PFC_PIN_GROUP(du0_rgb888),
|
||||
SH_PFC_PIN_GROUP(du0_clk0_out),
|
||||
SH_PFC_PIN_GROUP(du0_clk1_out),
|
||||
SH_PFC_PIN_GROUP(du0_clk_in),
|
||||
SH_PFC_PIN_GROUP(du0_sync),
|
||||
SH_PFC_PIN_GROUP(du0_oddf),
|
||||
SH_PFC_PIN_GROUP(du0_cde),
|
||||
SH_PFC_PIN_GROUP(du0_disp),
|
||||
SH_PFC_PIN_GROUP(i2c4_a),
|
||||
SH_PFC_PIN_GROUP(i2c4_b),
|
||||
SH_PFC_PIN_GROUP(i2c4_c),
|
||||
SH_PFC_PIN_GROUP(i2c4_d),
|
||||
SH_PFC_PIN_GROUP(i2c4_e),
|
||||
SH_PFC_PIN_GROUP(mmc_data1),
|
||||
SH_PFC_PIN_GROUP(mmc_data4),
|
||||
SH_PFC_PIN_GROUP(mmc_data8),
|
||||
SH_PFC_PIN_GROUP(mmc_ctrl),
|
||||
SH_PFC_PIN_GROUP(qspi0_ctrl),
|
||||
SH_PFC_PIN_GROUP(qspi0_data2),
|
||||
SH_PFC_PIN_GROUP(qspi0_data4),
|
||||
SH_PFC_PIN_GROUP(scif0_data_a),
|
||||
SH_PFC_PIN_GROUP(scif0_data_b),
|
||||
SH_PFC_PIN_GROUP(scif0_data_c),
|
||||
@ -1524,6 +1743,13 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
|
||||
SH_PFC_PIN_GROUP(scif5_data_f),
|
||||
SH_PFC_PIN_GROUP(scif_clk_a),
|
||||
SH_PFC_PIN_GROUP(scif_clk_b),
|
||||
SH_PFC_PIN_GROUP(sdhi2_data1),
|
||||
SH_PFC_PIN_GROUP(sdhi2_data4),
|
||||
SH_PFC_PIN_GROUP(sdhi2_ctrl),
|
||||
SH_PFC_PIN_GROUP(sdhi2_cd),
|
||||
SH_PFC_PIN_GROUP(sdhi2_wp),
|
||||
SH_PFC_PIN_GROUP(usb0),
|
||||
SH_PFC_PIN_GROUP(usb1),
|
||||
};
|
||||
|
||||
static const char * const avb_groups[] = {
|
||||
@ -1541,6 +1767,27 @@ static const char * const avb_groups[] = {
|
||||
"avb_avtp_match_b",
|
||||
"avb_avtp_capture_b",
|
||||
};
|
||||
|
||||
static const char * const du0_groups[] = {
|
||||
"du0_rgb666",
|
||||
"du0_rgb888",
|
||||
"du0_clk0_out",
|
||||
"du0_clk1_out",
|
||||
"du0_clk_in",
|
||||
"du0_sync",
|
||||
"du0_oddf",
|
||||
"du0_cde",
|
||||
"du0_disp",
|
||||
};
|
||||
|
||||
static const char * const i2c4_groups[] = {
|
||||
"i2c4_a",
|
||||
"i2c4_b",
|
||||
"i2c4_c",
|
||||
"i2c4_d",
|
||||
"i2c4_e",
|
||||
};
|
||||
|
||||
static const char * const mmc_groups[] = {
|
||||
"mmc_data1",
|
||||
"mmc_data4",
|
||||
@ -1548,6 +1795,12 @@ static const char * const mmc_groups[] = {
|
||||
"mmc_ctrl",
|
||||
};
|
||||
|
||||
static const char * const qspi0_groups[] = {
|
||||
"qspi0_ctrl",
|
||||
"qspi0_data2",
|
||||
"qspi0_data4",
|
||||
};
|
||||
|
||||
static const char * const scif0_groups[] = {
|
||||
"scif0_data_a",
|
||||
"scif0_data_b",
|
||||
@ -1602,9 +1855,28 @@ static const char * const scif_clk_groups[] = {
|
||||
"scif_clk_b",
|
||||
};
|
||||
|
||||
static const char * const sdhi2_groups[] = {
|
||||
"sdhi2_data1",
|
||||
"sdhi2_data4",
|
||||
"sdhi2_ctrl",
|
||||
"sdhi2_cd",
|
||||
"sdhi2_wp",
|
||||
};
|
||||
|
||||
static const char * const usb0_groups[] = {
|
||||
"usb0",
|
||||
};
|
||||
|
||||
static const char * const usb1_groups[] = {
|
||||
"usb1",
|
||||
};
|
||||
|
||||
static const struct sh_pfc_function pinmux_functions[] = {
|
||||
SH_PFC_FUNCTION(avb),
|
||||
SH_PFC_FUNCTION(du0),
|
||||
SH_PFC_FUNCTION(i2c4),
|
||||
SH_PFC_FUNCTION(mmc),
|
||||
SH_PFC_FUNCTION(qspi0),
|
||||
SH_PFC_FUNCTION(scif0),
|
||||
SH_PFC_FUNCTION(scif1),
|
||||
SH_PFC_FUNCTION(scif2),
|
||||
@ -1612,6 +1884,9 @@ static const struct sh_pfc_function pinmux_functions[] = {
|
||||
SH_PFC_FUNCTION(scif4),
|
||||
SH_PFC_FUNCTION(scif5),
|
||||
SH_PFC_FUNCTION(scif_clk),
|
||||
SH_PFC_FUNCTION(sdhi2),
|
||||
SH_PFC_FUNCTION(usb0),
|
||||
SH_PFC_FUNCTION(usb1),
|
||||
};
|
||||
|
||||
static const struct pinmux_cfg_reg pinmux_config_regs[] = {
|
||||
|
||||
@ -1,3 +1,4 @@
|
||||
// SPDX-License-Identifier: GPL-2.0
|
||||
/*
|
||||
* r8a7778 processor support - PFC hardware block
|
||||
*
|
||||
@ -9,15 +10,6 @@
|
||||
* based on
|
||||
* Copyright (C) 2011 Renesas Solutions Corp.
|
||||
* Copyright (C) 2011 Magnus Damm
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; version 2 of the License.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*/
|
||||
|
||||
#include <linux/io.h>
|
||||
|
||||
@ -1,22 +1,10 @@
|
||||
// SPDX-License-Identifier: GPL-2.0
|
||||
/*
|
||||
* r8a7779 processor support - PFC hardware block
|
||||
*
|
||||
* Copyright (C) 2011, 2013 Renesas Solutions Corp.
|
||||
* Copyright (C) 2011 Magnus Damm
|
||||
* Copyright (C) 2013 Cogent Embedded, Inc.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; version 2 of the License.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
|
||||
*/
|
||||
|
||||
#include <linux/kernel.h>
|
||||
|
||||
@ -1,3 +1,4 @@
|
||||
// SPDX-License-Identifier: GPL-2.0
|
||||
/*
|
||||
* R8A7790 processor support
|
||||
*
|
||||
@ -5,20 +6,6 @@
|
||||
* Copyright (C) 2013 Magnus Damm
|
||||
* Copyright (C) 2012 Renesas Solutions Corp.
|
||||
* Copyright (C) 2012 Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; version 2 of the
|
||||
* License.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
|
||||
*/
|
||||
|
||||
#include <linux/io.h>
|
||||
|
||||
@ -1,12 +1,9 @@
|
||||
// SPDX-License-Identifier: GPL-2.0
|
||||
/*
|
||||
* r8a7791/r8a7743 processor support - PFC hardware block.
|
||||
*
|
||||
* Copyright (C) 2013 Renesas Electronics Corporation
|
||||
* Copyright (C) 2014-2017 Cogent Embedded, Inc.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2
|
||||
* as published by the Free Software Foundation.
|
||||
*/
|
||||
|
||||
#include <linux/kernel.h>
|
||||
@ -4458,7 +4455,7 @@ static const unsigned int vin2_clk_mux[] = {
|
||||
|
||||
static const struct {
|
||||
struct sh_pfc_pin_group common[346];
|
||||
struct sh_pfc_pin_group r8a779x[9];
|
||||
struct sh_pfc_pin_group automotive[9];
|
||||
} pinmux_groups = {
|
||||
.common = {
|
||||
SH_PFC_PIN_GROUP(audio_clk_a),
|
||||
@ -4808,7 +4805,7 @@ static const struct {
|
||||
SH_PFC_PIN_GROUP(vin2_clkenb),
|
||||
SH_PFC_PIN_GROUP(vin2_clk),
|
||||
},
|
||||
.r8a779x = {
|
||||
.automotive = {
|
||||
SH_PFC_PIN_GROUP(adi_common),
|
||||
SH_PFC_PIN_GROUP(adi_chsel0),
|
||||
SH_PFC_PIN_GROUP(adi_chsel1),
|
||||
@ -5365,7 +5362,7 @@ static const char * const vin2_groups[] = {
|
||||
|
||||
static const struct {
|
||||
struct sh_pfc_function common[58];
|
||||
struct sh_pfc_function r8a779x[2];
|
||||
struct sh_pfc_function automotive[2];
|
||||
} pinmux_functions = {
|
||||
.common = {
|
||||
SH_PFC_FUNCTION(audio_clk),
|
||||
@ -5427,7 +5424,7 @@ static const struct {
|
||||
SH_PFC_FUNCTION(vin1),
|
||||
SH_PFC_FUNCTION(vin2),
|
||||
},
|
||||
.r8a779x = {
|
||||
.automotive = {
|
||||
SH_PFC_FUNCTION(adi),
|
||||
SH_PFC_FUNCTION(mlb),
|
||||
}
|
||||
@ -6634,6 +6631,28 @@ const struct sh_pfc_soc_info r8a7743_pinmux_info = {
|
||||
};
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_PINCTRL_PFC_R8A7744
|
||||
const struct sh_pfc_soc_info r8a7744_pinmux_info = {
|
||||
.name = "r8a77440_pfc",
|
||||
.ops = &r8a7791_pinmux_ops,
|
||||
.unlock_reg = 0xe6060000, /* PMMR */
|
||||
|
||||
.function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },
|
||||
|
||||
.pins = pinmux_pins,
|
||||
.nr_pins = ARRAY_SIZE(pinmux_pins),
|
||||
.groups = pinmux_groups.common,
|
||||
.nr_groups = ARRAY_SIZE(pinmux_groups.common),
|
||||
.functions = pinmux_functions.common,
|
||||
.nr_functions = ARRAY_SIZE(pinmux_functions.common),
|
||||
|
||||
.cfg_regs = pinmux_config_regs,
|
||||
|
||||
.pinmux_data = pinmux_data,
|
||||
.pinmux_data_size = ARRAY_SIZE(pinmux_data),
|
||||
};
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_PINCTRL_PFC_R8A7791
|
||||
const struct sh_pfc_soc_info r8a7791_pinmux_info = {
|
||||
.name = "r8a77910_pfc",
|
||||
@ -6646,10 +6665,10 @@ const struct sh_pfc_soc_info r8a7791_pinmux_info = {
|
||||
.nr_pins = ARRAY_SIZE(pinmux_pins),
|
||||
.groups = pinmux_groups.common,
|
||||
.nr_groups = ARRAY_SIZE(pinmux_groups.common) +
|
||||
ARRAY_SIZE(pinmux_groups.r8a779x),
|
||||
ARRAY_SIZE(pinmux_groups.automotive),
|
||||
.functions = pinmux_functions.common,
|
||||
.nr_functions = ARRAY_SIZE(pinmux_functions.common) +
|
||||
ARRAY_SIZE(pinmux_functions.r8a779x),
|
||||
ARRAY_SIZE(pinmux_functions.automotive),
|
||||
|
||||
.cfg_regs = pinmux_config_regs,
|
||||
|
||||
@ -6670,10 +6689,10 @@ const struct sh_pfc_soc_info r8a7793_pinmux_info = {
|
||||
.nr_pins = ARRAY_SIZE(pinmux_pins),
|
||||
.groups = pinmux_groups.common,
|
||||
.nr_groups = ARRAY_SIZE(pinmux_groups.common) +
|
||||
ARRAY_SIZE(pinmux_groups.r8a779x),
|
||||
ARRAY_SIZE(pinmux_groups.automotive),
|
||||
.functions = pinmux_functions.common,
|
||||
.nr_functions = ARRAY_SIZE(pinmux_functions.common) +
|
||||
ARRAY_SIZE(pinmux_functions.r8a779x),
|
||||
ARRAY_SIZE(pinmux_functions.automotive),
|
||||
|
||||
.cfg_regs = pinmux_config_regs,
|
||||
|
||||
|
||||
@ -1,12 +1,9 @@
|
||||
// SPDX-License-Identifier: GPL-2.0
|
||||
/*
|
||||
* r8a7792 processor support - PFC hardware block.
|
||||
*
|
||||
* Copyright (C) 2013-2014 Renesas Electronics Corporation
|
||||
* Copyright (C) 2016 Cogent Embedded, Inc., <source@cogentembedded.com>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2
|
||||
* as published by the Free Software Foundation.
|
||||
*/
|
||||
|
||||
#include <linux/kernel.h>
|
||||
|
||||
@ -1,13 +1,10 @@
|
||||
// SPDX-License-Identifier: GPL-2.0
|
||||
/*
|
||||
* r8a7794/r8a7745 processor support - PFC hardware block.
|
||||
*
|
||||
* Copyright (C) 2014-2015 Renesas Electronics Corporation
|
||||
* Copyright (C) 2015 Renesas Solutions Corp.
|
||||
* Copyright (C) 2015-2017 Cogent Embedded, Inc. <source@cogentembedded.com>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2
|
||||
* as published by the Free Software Foundation.
|
||||
*/
|
||||
|
||||
#include <linux/kernel.h>
|
||||
|
||||
@ -1,11 +1,8 @@
|
||||
// SPDX-License-Identifier: GPL-2.0
|
||||
/*
|
||||
* R8A7795 ES1.x processor support - PFC hardware block.
|
||||
*
|
||||
* Copyright (C) 2015-2017 Renesas Electronics Corporation
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; version 2 of the License.
|
||||
*/
|
||||
|
||||
#include <linux/kernel.h>
|
||||
|
||||
@ -1,11 +1,8 @@
|
||||
// SPDX-License-Identifier: GPL-2.0
|
||||
/*
|
||||
* R8A7795 ES2.0+ processor support - PFC hardware block.
|
||||
*
|
||||
* Copyright (C) 2015-2017 Renesas Electronics Corporation
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; version 2 of the License.
|
||||
*/
|
||||
|
||||
#include <linux/kernel.h>
|
||||
|
||||
@ -1,3 +1,4 @@
|
||||
// SPDX-License-Identifier: GPL-2.0
|
||||
/*
|
||||
* R8A7796 processor support - PFC hardware block.
|
||||
*
|
||||
@ -8,10 +9,6 @@
|
||||
* R-Car Gen3 processor support - PFC hardware block.
|
||||
*
|
||||
* Copyright (C) 2015 Renesas Electronics Corporation
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; version 2 of the License.
|
||||
*/
|
||||
|
||||
#include <linux/kernel.h>
|
||||
@ -4128,7 +4125,7 @@ static const unsigned int vin5_clk_mux[] = {
|
||||
|
||||
static const struct {
|
||||
struct sh_pfc_pin_group common[307];
|
||||
struct sh_pfc_pin_group r8a779x[33];
|
||||
struct sh_pfc_pin_group automotive[33];
|
||||
} pinmux_groups = {
|
||||
.common = {
|
||||
SH_PFC_PIN_GROUP(audio_clk_a_a),
|
||||
@ -4439,7 +4436,7 @@ static const struct {
|
||||
SH_PFC_PIN_GROUP(vin5_clkenb),
|
||||
SH_PFC_PIN_GROUP(vin5_clk),
|
||||
},
|
||||
.r8a779x = {
|
||||
.automotive = {
|
||||
SH_PFC_PIN_GROUP(canfd0_data_a),
|
||||
SH_PFC_PIN_GROUP(canfd0_data_b),
|
||||
SH_PFC_PIN_GROUP(canfd1_data),
|
||||
@ -4971,7 +4968,7 @@ static const char * const vin5_groups[] = {
|
||||
|
||||
static const struct {
|
||||
struct sh_pfc_function common[45];
|
||||
struct sh_pfc_function r8a779x[6];
|
||||
struct sh_pfc_function automotive[6];
|
||||
} pinmux_functions = {
|
||||
.common = {
|
||||
SH_PFC_FUNCTION(audio_clk),
|
||||
@ -5020,7 +5017,7 @@ static const struct {
|
||||
SH_PFC_FUNCTION(vin4),
|
||||
SH_PFC_FUNCTION(vin5),
|
||||
},
|
||||
.r8a779x = {
|
||||
.automotive = {
|
||||
SH_PFC_FUNCTION(canfd0),
|
||||
SH_PFC_FUNCTION(canfd1),
|
||||
SH_PFC_FUNCTION(drif0),
|
||||
@ -6188,10 +6185,10 @@ const struct sh_pfc_soc_info r8a7796_pinmux_info = {
|
||||
.nr_pins = ARRAY_SIZE(pinmux_pins),
|
||||
.groups = pinmux_groups.common,
|
||||
.nr_groups = ARRAY_SIZE(pinmux_groups.common) +
|
||||
ARRAY_SIZE(pinmux_groups.r8a779x),
|
||||
ARRAY_SIZE(pinmux_groups.automotive),
|
||||
.functions = pinmux_functions.common,
|
||||
.nr_functions = ARRAY_SIZE(pinmux_functions.common) +
|
||||
ARRAY_SIZE(pinmux_functions.r8a779x),
|
||||
ARRAY_SIZE(pinmux_functions.automotive),
|
||||
|
||||
.cfg_regs = pinmux_config_regs,
|
||||
.drive_regs = pinmux_drive_regs,
|
||||
|
||||
@ -1,3 +1,4 @@
|
||||
// SPDX-License-Identifier: GPL-2.0
|
||||
/*
|
||||
* R8A77970 processor support - PFC hardware block.
|
||||
*
|
||||
@ -9,10 +10,6 @@
|
||||
* R-Car Gen3 processor support - PFC hardware block.
|
||||
*
|
||||
* Copyright (C) 2015 Renesas Electronics Corporation
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; version 2 of the License.
|
||||
*/
|
||||
|
||||
#include <linux/io.h>
|
||||
|
||||
@ -1595,6 +1595,325 @@ static const unsigned int i2c7_b_mux[] = {
|
||||
SCL7_B_MARK, SDA7_B_MARK,
|
||||
};
|
||||
|
||||
/* - MSIOF0 ----------------------------------------------------------------- */
|
||||
static const unsigned int msiof0_clk_pins[] = {
|
||||
/* SCK */
|
||||
RCAR_GP_PIN(5, 10),
|
||||
};
|
||||
|
||||
static const unsigned int msiof0_clk_mux[] = {
|
||||
MSIOF0_SCK_MARK,
|
||||
};
|
||||
|
||||
static const unsigned int msiof0_sync_pins[] = {
|
||||
/* SYNC */
|
||||
RCAR_GP_PIN(5, 13),
|
||||
};
|
||||
|
||||
static const unsigned int msiof0_sync_mux[] = {
|
||||
MSIOF0_SYNC_MARK,
|
||||
};
|
||||
|
||||
static const unsigned int msiof0_ss1_pins[] = {
|
||||
/* SS1 */
|
||||
RCAR_GP_PIN(5, 14),
|
||||
};
|
||||
|
||||
static const unsigned int msiof0_ss1_mux[] = {
|
||||
MSIOF0_SS1_MARK,
|
||||
};
|
||||
|
||||
static const unsigned int msiof0_ss2_pins[] = {
|
||||
/* SS2 */
|
||||
RCAR_GP_PIN(5, 15),
|
||||
};
|
||||
|
||||
static const unsigned int msiof0_ss2_mux[] = {
|
||||
MSIOF0_SS2_MARK,
|
||||
};
|
||||
|
||||
static const unsigned int msiof0_txd_pins[] = {
|
||||
/* TXD */
|
||||
RCAR_GP_PIN(5, 12),
|
||||
};
|
||||
|
||||
static const unsigned int msiof0_txd_mux[] = {
|
||||
MSIOF0_TXD_MARK,
|
||||
};
|
||||
|
||||
static const unsigned int msiof0_rxd_pins[] = {
|
||||
/* RXD */
|
||||
RCAR_GP_PIN(5, 11),
|
||||
};
|
||||
|
||||
static const unsigned int msiof0_rxd_mux[] = {
|
||||
MSIOF0_RXD_MARK,
|
||||
};
|
||||
|
||||
/* - MSIOF1 ----------------------------------------------------------------- */
|
||||
static const unsigned int msiof1_clk_pins[] = {
|
||||
/* SCK */
|
||||
RCAR_GP_PIN(1, 19),
|
||||
};
|
||||
|
||||
static const unsigned int msiof1_clk_mux[] = {
|
||||
MSIOF1_SCK_MARK,
|
||||
};
|
||||
|
||||
static const unsigned int msiof1_sync_pins[] = {
|
||||
/* SYNC */
|
||||
RCAR_GP_PIN(1, 16),
|
||||
};
|
||||
|
||||
static const unsigned int msiof1_sync_mux[] = {
|
||||
MSIOF1_SYNC_MARK,
|
||||
};
|
||||
|
||||
static const unsigned int msiof1_ss1_pins[] = {
|
||||
/* SS1 */
|
||||
RCAR_GP_PIN(1, 14),
|
||||
};
|
||||
|
||||
static const unsigned int msiof1_ss1_mux[] = {
|
||||
MSIOF1_SS1_MARK,
|
||||
};
|
||||
|
||||
static const unsigned int msiof1_ss2_pins[] = {
|
||||
/* SS2 */
|
||||
RCAR_GP_PIN(1, 15),
|
||||
};
|
||||
|
||||
static const unsigned int msiof1_ss2_mux[] = {
|
||||
MSIOF1_SS2_MARK,
|
||||
};
|
||||
|
||||
static const unsigned int msiof1_txd_pins[] = {
|
||||
/* TXD */
|
||||
RCAR_GP_PIN(1, 18),
|
||||
};
|
||||
|
||||
static const unsigned int msiof1_txd_mux[] = {
|
||||
MSIOF1_TXD_MARK,
|
||||
};
|
||||
|
||||
static const unsigned int msiof1_rxd_pins[] = {
|
||||
/* RXD */
|
||||
RCAR_GP_PIN(1, 17),
|
||||
};
|
||||
|
||||
static const unsigned int msiof1_rxd_mux[] = {
|
||||
MSIOF1_RXD_MARK,
|
||||
};
|
||||
|
||||
/* - MSIOF2 ----------------------------------------------------------------- */
|
||||
static const unsigned int msiof2_clk_a_pins[] = {
|
||||
/* SCK */
|
||||
RCAR_GP_PIN(0, 8),
|
||||
};
|
||||
|
||||
static const unsigned int msiof2_clk_a_mux[] = {
|
||||
MSIOF2_SCK_A_MARK,
|
||||
};
|
||||
|
||||
static const unsigned int msiof2_sync_a_pins[] = {
|
||||
/* SYNC */
|
||||
RCAR_GP_PIN(0, 9),
|
||||
};
|
||||
|
||||
static const unsigned int msiof2_sync_a_mux[] = {
|
||||
MSIOF2_SYNC_A_MARK,
|
||||
};
|
||||
|
||||
static const unsigned int msiof2_ss1_a_pins[] = {
|
||||
/* SS1 */
|
||||
RCAR_GP_PIN(0, 15),
|
||||
};
|
||||
|
||||
static const unsigned int msiof2_ss1_a_mux[] = {
|
||||
MSIOF2_SS1_A_MARK,
|
||||
};
|
||||
|
||||
static const unsigned int msiof2_ss2_a_pins[] = {
|
||||
/* SS2 */
|
||||
RCAR_GP_PIN(0, 14),
|
||||
};
|
||||
|
||||
static const unsigned int msiof2_ss2_a_mux[] = {
|
||||
MSIOF2_SS2_A_MARK,
|
||||
};
|
||||
|
||||
static const unsigned int msiof2_txd_a_pins[] = {
|
||||
/* TXD */
|
||||
RCAR_GP_PIN(0, 11),
|
||||
};
|
||||
|
||||
static const unsigned int msiof2_txd_a_mux[] = {
|
||||
MSIOF2_TXD_A_MARK,
|
||||
};
|
||||
|
||||
static const unsigned int msiof2_rxd_a_pins[] = {
|
||||
/* RXD */
|
||||
RCAR_GP_PIN(0, 10),
|
||||
};
|
||||
|
||||
static const unsigned int msiof2_rxd_a_mux[] = {
|
||||
MSIOF2_RXD_A_MARK,
|
||||
};
|
||||
|
||||
static const unsigned int msiof2_clk_b_pins[] = {
|
||||
/* SCK */
|
||||
RCAR_GP_PIN(1, 13),
|
||||
};
|
||||
|
||||
static const unsigned int msiof2_clk_b_mux[] = {
|
||||
MSIOF2_SCK_B_MARK,
|
||||
};
|
||||
|
||||
static const unsigned int msiof2_sync_b_pins[] = {
|
||||
/* SYNC */
|
||||
RCAR_GP_PIN(1, 10),
|
||||
};
|
||||
|
||||
static const unsigned int msiof2_sync_b_mux[] = {
|
||||
MSIOF2_SYNC_B_MARK,
|
||||
};
|
||||
|
||||
static const unsigned int msiof2_ss1_b_pins[] = {
|
||||
/* SS1 */
|
||||
RCAR_GP_PIN(1, 16),
|
||||
};
|
||||
|
||||
static const unsigned int msiof2_ss1_b_mux[] = {
|
||||
MSIOF2_SS1_B_MARK,
|
||||
};
|
||||
|
||||
static const unsigned int msiof2_ss2_b_pins[] = {
|
||||
/* SS2 */
|
||||
RCAR_GP_PIN(1, 12),
|
||||
};
|
||||
|
||||
static const unsigned int msiof2_ss2_b_mux[] = {
|
||||
MSIOF2_SS2_B_MARK,
|
||||
};
|
||||
|
||||
static const unsigned int msiof2_txd_b_pins[] = {
|
||||
/* TXD */
|
||||
RCAR_GP_PIN(1, 15),
|
||||
};
|
||||
|
||||
static const unsigned int msiof2_txd_b_mux[] = {
|
||||
MSIOF2_TXD_B_MARK,
|
||||
};
|
||||
|
||||
static const unsigned int msiof2_rxd_b_pins[] = {
|
||||
/* RXD */
|
||||
RCAR_GP_PIN(1, 14),
|
||||
};
|
||||
|
||||
static const unsigned int msiof2_rxd_b_mux[] = {
|
||||
MSIOF2_RXD_B_MARK,
|
||||
};
|
||||
|
||||
/* - MSIOF3 ----------------------------------------------------------------- */
|
||||
static const unsigned int msiof3_clk_a_pins[] = {
|
||||
/* SCK */
|
||||
RCAR_GP_PIN(0, 0),
|
||||
};
|
||||
|
||||
static const unsigned int msiof3_clk_a_mux[] = {
|
||||
MSIOF3_SCK_A_MARK,
|
||||
};
|
||||
|
||||
static const unsigned int msiof3_sync_a_pins[] = {
|
||||
/* SYNC */
|
||||
RCAR_GP_PIN(0, 1),
|
||||
};
|
||||
|
||||
static const unsigned int msiof3_sync_a_mux[] = {
|
||||
MSIOF3_SYNC_A_MARK,
|
||||
};
|
||||
|
||||
static const unsigned int msiof3_ss1_a_pins[] = {
|
||||
/* SS1 */
|
||||
RCAR_GP_PIN(0, 15),
|
||||
};
|
||||
|
||||
static const unsigned int msiof3_ss1_a_mux[] = {
|
||||
MSIOF3_SS1_A_MARK,
|
||||
};
|
||||
|
||||
static const unsigned int msiof3_ss2_a_pins[] = {
|
||||
/* SS2 */
|
||||
RCAR_GP_PIN(0, 4),
|
||||
};
|
||||
|
||||
static const unsigned int msiof3_ss2_a_mux[] = {
|
||||
MSIOF3_SS2_A_MARK,
|
||||
};
|
||||
|
||||
static const unsigned int msiof3_txd_a_pins[] = {
|
||||
/* TXD */
|
||||
RCAR_GP_PIN(0, 3),
|
||||
};
|
||||
|
||||
static const unsigned int msiof3_txd_a_mux[] = {
|
||||
MSIOF3_TXD_A_MARK,
|
||||
};
|
||||
|
||||
static const unsigned int msiof3_rxd_a_pins[] = {
|
||||
/* RXD */
|
||||
RCAR_GP_PIN(0, 2),
|
||||
};
|
||||
|
||||
static const unsigned int msiof3_rxd_a_mux[] = {
|
||||
MSIOF3_RXD_A_MARK,
|
||||
};
|
||||
|
||||
static const unsigned int msiof3_clk_b_pins[] = {
|
||||
/* SCK */
|
||||
RCAR_GP_PIN(1, 5),
|
||||
};
|
||||
|
||||
static const unsigned int msiof3_clk_b_mux[] = {
|
||||
MSIOF3_SCK_B_MARK,
|
||||
};
|
||||
|
||||
static const unsigned int msiof3_sync_b_pins[] = {
|
||||
/* SYNC */
|
||||
RCAR_GP_PIN(1, 4),
|
||||
};
|
||||
|
||||
static const unsigned int msiof3_sync_b_mux[] = {
|
||||
MSIOF3_SYNC_B_MARK,
|
||||
};
|
||||
|
||||
static const unsigned int msiof3_ss1_b_pins[] = {
|
||||
/* SS1 */
|
||||
RCAR_GP_PIN(1, 0),
|
||||
};
|
||||
|
||||
static const unsigned int msiof3_ss1_b_mux[] = {
|
||||
MSIOF3_SS1_B_MARK,
|
||||
};
|
||||
|
||||
static const unsigned int msiof3_txd_b_pins[] = {
|
||||
/* TXD */
|
||||
RCAR_GP_PIN(1, 7),
|
||||
};
|
||||
|
||||
static const unsigned int msiof3_txd_b_mux[] = {
|
||||
MSIOF3_TXD_B_MARK,
|
||||
};
|
||||
|
||||
static const unsigned int msiof3_rxd_b_pins[] = {
|
||||
/* RXD */
|
||||
RCAR_GP_PIN(1, 6),
|
||||
};
|
||||
|
||||
static const unsigned int msiof3_rxd_b_mux[] = {
|
||||
MSIOF3_RXD_B_MARK,
|
||||
};
|
||||
|
||||
/* - PWM0 --------------------------------------------------------------------*/
|
||||
static const unsigned int pwm0_a_pins[] = {
|
||||
/* PWM */
|
||||
@ -2070,89 +2389,129 @@ static const unsigned int usb30_id_mux[] = {
|
||||
USB3HS0_ID_MARK,
|
||||
};
|
||||
|
||||
static const struct sh_pfc_pin_group pinmux_groups[] = {
|
||||
SH_PFC_PIN_GROUP(avb_link),
|
||||
SH_PFC_PIN_GROUP(avb_magic),
|
||||
SH_PFC_PIN_GROUP(avb_phy_int),
|
||||
SH_PFC_PIN_GROUP(avb_mii),
|
||||
SH_PFC_PIN_GROUP(avb_avtp_pps),
|
||||
SH_PFC_PIN_GROUP(avb_avtp_match_a),
|
||||
SH_PFC_PIN_GROUP(avb_avtp_capture_a),
|
||||
SH_PFC_PIN_GROUP(du_rgb666),
|
||||
SH_PFC_PIN_GROUP(du_rgb888),
|
||||
SH_PFC_PIN_GROUP(du_clk_in_0),
|
||||
SH_PFC_PIN_GROUP(du_clk_in_1),
|
||||
SH_PFC_PIN_GROUP(du_clk_out_0),
|
||||
SH_PFC_PIN_GROUP(du_sync),
|
||||
SH_PFC_PIN_GROUP(du_disp_cde),
|
||||
SH_PFC_PIN_GROUP(du_cde),
|
||||
SH_PFC_PIN_GROUP(du_disp),
|
||||
SH_PFC_PIN_GROUP(i2c1_a),
|
||||
SH_PFC_PIN_GROUP(i2c1_b),
|
||||
SH_PFC_PIN_GROUP(i2c1_c),
|
||||
SH_PFC_PIN_GROUP(i2c1_d),
|
||||
SH_PFC_PIN_GROUP(i2c2_a),
|
||||
SH_PFC_PIN_GROUP(i2c2_b),
|
||||
SH_PFC_PIN_GROUP(i2c2_c),
|
||||
SH_PFC_PIN_GROUP(i2c2_d),
|
||||
SH_PFC_PIN_GROUP(i2c2_e),
|
||||
SH_PFC_PIN_GROUP(i2c4),
|
||||
SH_PFC_PIN_GROUP(i2c5),
|
||||
SH_PFC_PIN_GROUP(i2c6_a),
|
||||
SH_PFC_PIN_GROUP(i2c6_b),
|
||||
SH_PFC_PIN_GROUP(i2c7_a),
|
||||
SH_PFC_PIN_GROUP(i2c7_b),
|
||||
SH_PFC_PIN_GROUP(pwm0_a),
|
||||
SH_PFC_PIN_GROUP(pwm0_b),
|
||||
SH_PFC_PIN_GROUP(pwm1_a),
|
||||
SH_PFC_PIN_GROUP(pwm1_b),
|
||||
SH_PFC_PIN_GROUP(pwm2_a),
|
||||
SH_PFC_PIN_GROUP(pwm2_b),
|
||||
SH_PFC_PIN_GROUP(pwm2_c),
|
||||
SH_PFC_PIN_GROUP(pwm3_a),
|
||||
SH_PFC_PIN_GROUP(pwm3_b),
|
||||
SH_PFC_PIN_GROUP(pwm3_c),
|
||||
SH_PFC_PIN_GROUP(pwm4_a),
|
||||
SH_PFC_PIN_GROUP(pwm4_b),
|
||||
SH_PFC_PIN_GROUP(pwm5_a),
|
||||
SH_PFC_PIN_GROUP(pwm5_b),
|
||||
SH_PFC_PIN_GROUP(pwm6_a),
|
||||
SH_PFC_PIN_GROUP(pwm6_b),
|
||||
SH_PFC_PIN_GROUP(scif0_data_a),
|
||||
SH_PFC_PIN_GROUP(scif0_clk_a),
|
||||
SH_PFC_PIN_GROUP(scif0_ctrl_a),
|
||||
SH_PFC_PIN_GROUP(scif0_data_b),
|
||||
SH_PFC_PIN_GROUP(scif0_clk_b),
|
||||
SH_PFC_PIN_GROUP(scif1_data),
|
||||
SH_PFC_PIN_GROUP(scif1_clk),
|
||||
SH_PFC_PIN_GROUP(scif1_ctrl),
|
||||
SH_PFC_PIN_GROUP(scif2_data_a),
|
||||
SH_PFC_PIN_GROUP(scif2_clk_a),
|
||||
SH_PFC_PIN_GROUP(scif2_data_b),
|
||||
SH_PFC_PIN_GROUP(scif3_data_a),
|
||||
SH_PFC_PIN_GROUP(scif3_clk_a),
|
||||
SH_PFC_PIN_GROUP(scif3_ctrl_a),
|
||||
SH_PFC_PIN_GROUP(scif3_data_b),
|
||||
SH_PFC_PIN_GROUP(scif3_data_c),
|
||||
SH_PFC_PIN_GROUP(scif3_clk_c),
|
||||
SH_PFC_PIN_GROUP(scif4_data_a),
|
||||
SH_PFC_PIN_GROUP(scif4_clk_a),
|
||||
SH_PFC_PIN_GROUP(scif4_ctrl_a),
|
||||
SH_PFC_PIN_GROUP(scif4_data_b),
|
||||
SH_PFC_PIN_GROUP(scif4_clk_b),
|
||||
SH_PFC_PIN_GROUP(scif4_data_c),
|
||||
SH_PFC_PIN_GROUP(scif4_ctrl_c),
|
||||
SH_PFC_PIN_GROUP(scif5_data_a),
|
||||
SH_PFC_PIN_GROUP(scif5_clk_a),
|
||||
SH_PFC_PIN_GROUP(scif5_data_b),
|
||||
SH_PFC_PIN_GROUP(scif5_data_c),
|
||||
SH_PFC_PIN_GROUP(scif_clk_a),
|
||||
SH_PFC_PIN_GROUP(scif_clk_b),
|
||||
SH_PFC_PIN_GROUP(usb0_a),
|
||||
SH_PFC_PIN_GROUP(usb0_b),
|
||||
SH_PFC_PIN_GROUP(usb0_id),
|
||||
SH_PFC_PIN_GROUP(usb30),
|
||||
SH_PFC_PIN_GROUP(usb30_id),
|
||||
static const struct {
|
||||
struct sh_pfc_pin_group common[117];
|
||||
struct sh_pfc_pin_group automotive[0];
|
||||
} pinmux_groups = {
|
||||
.common = {
|
||||
SH_PFC_PIN_GROUP(avb_link),
|
||||
SH_PFC_PIN_GROUP(avb_magic),
|
||||
SH_PFC_PIN_GROUP(avb_phy_int),
|
||||
SH_PFC_PIN_GROUP(avb_mii),
|
||||
SH_PFC_PIN_GROUP(avb_avtp_pps),
|
||||
SH_PFC_PIN_GROUP(avb_avtp_match_a),
|
||||
SH_PFC_PIN_GROUP(avb_avtp_capture_a),
|
||||
SH_PFC_PIN_GROUP(du_rgb666),
|
||||
SH_PFC_PIN_GROUP(du_rgb888),
|
||||
SH_PFC_PIN_GROUP(du_clk_in_0),
|
||||
SH_PFC_PIN_GROUP(du_clk_in_1),
|
||||
SH_PFC_PIN_GROUP(du_clk_out_0),
|
||||
SH_PFC_PIN_GROUP(du_sync),
|
||||
SH_PFC_PIN_GROUP(du_disp_cde),
|
||||
SH_PFC_PIN_GROUP(du_cde),
|
||||
SH_PFC_PIN_GROUP(du_disp),
|
||||
SH_PFC_PIN_GROUP(i2c1_a),
|
||||
SH_PFC_PIN_GROUP(i2c1_b),
|
||||
SH_PFC_PIN_GROUP(i2c1_c),
|
||||
SH_PFC_PIN_GROUP(i2c1_d),
|
||||
SH_PFC_PIN_GROUP(i2c2_a),
|
||||
SH_PFC_PIN_GROUP(i2c2_b),
|
||||
SH_PFC_PIN_GROUP(i2c2_c),
|
||||
SH_PFC_PIN_GROUP(i2c2_d),
|
||||
SH_PFC_PIN_GROUP(i2c2_e),
|
||||
SH_PFC_PIN_GROUP(i2c4),
|
||||
SH_PFC_PIN_GROUP(i2c5),
|
||||
SH_PFC_PIN_GROUP(i2c6_a),
|
||||
SH_PFC_PIN_GROUP(i2c6_b),
|
||||
SH_PFC_PIN_GROUP(i2c7_a),
|
||||
SH_PFC_PIN_GROUP(i2c7_b),
|
||||
SH_PFC_PIN_GROUP(msiof0_clk),
|
||||
SH_PFC_PIN_GROUP(msiof0_sync),
|
||||
SH_PFC_PIN_GROUP(msiof0_ss1),
|
||||
SH_PFC_PIN_GROUP(msiof0_ss2),
|
||||
SH_PFC_PIN_GROUP(msiof0_txd),
|
||||
SH_PFC_PIN_GROUP(msiof0_rxd),
|
||||
SH_PFC_PIN_GROUP(msiof1_clk),
|
||||
SH_PFC_PIN_GROUP(msiof1_sync),
|
||||
SH_PFC_PIN_GROUP(msiof1_ss1),
|
||||
SH_PFC_PIN_GROUP(msiof1_ss2),
|
||||
SH_PFC_PIN_GROUP(msiof1_txd),
|
||||
SH_PFC_PIN_GROUP(msiof1_rxd),
|
||||
SH_PFC_PIN_GROUP(msiof2_clk_a),
|
||||
SH_PFC_PIN_GROUP(msiof2_sync_a),
|
||||
SH_PFC_PIN_GROUP(msiof2_ss1_a),
|
||||
SH_PFC_PIN_GROUP(msiof2_ss2_a),
|
||||
SH_PFC_PIN_GROUP(msiof2_txd_a),
|
||||
SH_PFC_PIN_GROUP(msiof2_rxd_a),
|
||||
SH_PFC_PIN_GROUP(msiof2_clk_b),
|
||||
SH_PFC_PIN_GROUP(msiof2_sync_b),
|
||||
SH_PFC_PIN_GROUP(msiof2_ss1_b),
|
||||
SH_PFC_PIN_GROUP(msiof2_ss2_b),
|
||||
SH_PFC_PIN_GROUP(msiof2_txd_b),
|
||||
SH_PFC_PIN_GROUP(msiof2_rxd_b),
|
||||
SH_PFC_PIN_GROUP(msiof3_clk_a),
|
||||
SH_PFC_PIN_GROUP(msiof3_sync_a),
|
||||
SH_PFC_PIN_GROUP(msiof3_ss1_a),
|
||||
SH_PFC_PIN_GROUP(msiof3_ss2_a),
|
||||
SH_PFC_PIN_GROUP(msiof3_txd_a),
|
||||
SH_PFC_PIN_GROUP(msiof3_rxd_a),
|
||||
SH_PFC_PIN_GROUP(msiof3_clk_b),
|
||||
SH_PFC_PIN_GROUP(msiof3_sync_b),
|
||||
SH_PFC_PIN_GROUP(msiof3_ss1_b),
|
||||
SH_PFC_PIN_GROUP(msiof3_txd_b),
|
||||
SH_PFC_PIN_GROUP(msiof3_rxd_b),
|
||||
SH_PFC_PIN_GROUP(pwm0_a),
|
||||
SH_PFC_PIN_GROUP(pwm0_b),
|
||||
SH_PFC_PIN_GROUP(pwm1_a),
|
||||
SH_PFC_PIN_GROUP(pwm1_b),
|
||||
SH_PFC_PIN_GROUP(pwm2_a),
|
||||
SH_PFC_PIN_GROUP(pwm2_b),
|
||||
SH_PFC_PIN_GROUP(pwm2_c),
|
||||
SH_PFC_PIN_GROUP(pwm3_a),
|
||||
SH_PFC_PIN_GROUP(pwm3_b),
|
||||
SH_PFC_PIN_GROUP(pwm3_c),
|
||||
SH_PFC_PIN_GROUP(pwm4_a),
|
||||
SH_PFC_PIN_GROUP(pwm4_b),
|
||||
SH_PFC_PIN_GROUP(pwm5_a),
|
||||
SH_PFC_PIN_GROUP(pwm5_b),
|
||||
SH_PFC_PIN_GROUP(pwm6_a),
|
||||
SH_PFC_PIN_GROUP(pwm6_b),
|
||||
SH_PFC_PIN_GROUP(scif0_data_a),
|
||||
SH_PFC_PIN_GROUP(scif0_clk_a),
|
||||
SH_PFC_PIN_GROUP(scif0_ctrl_a),
|
||||
SH_PFC_PIN_GROUP(scif0_data_b),
|
||||
SH_PFC_PIN_GROUP(scif0_clk_b),
|
||||
SH_PFC_PIN_GROUP(scif1_data),
|
||||
SH_PFC_PIN_GROUP(scif1_clk),
|
||||
SH_PFC_PIN_GROUP(scif1_ctrl),
|
||||
SH_PFC_PIN_GROUP(scif2_data_a),
|
||||
SH_PFC_PIN_GROUP(scif2_clk_a),
|
||||
SH_PFC_PIN_GROUP(scif2_data_b),
|
||||
SH_PFC_PIN_GROUP(scif3_data_a),
|
||||
SH_PFC_PIN_GROUP(scif3_clk_a),
|
||||
SH_PFC_PIN_GROUP(scif3_ctrl_a),
|
||||
SH_PFC_PIN_GROUP(scif3_data_b),
|
||||
SH_PFC_PIN_GROUP(scif3_data_c),
|
||||
SH_PFC_PIN_GROUP(scif3_clk_c),
|
||||
SH_PFC_PIN_GROUP(scif4_data_a),
|
||||
SH_PFC_PIN_GROUP(scif4_clk_a),
|
||||
SH_PFC_PIN_GROUP(scif4_ctrl_a),
|
||||
SH_PFC_PIN_GROUP(scif4_data_b),
|
||||
SH_PFC_PIN_GROUP(scif4_clk_b),
|
||||
SH_PFC_PIN_GROUP(scif4_data_c),
|
||||
SH_PFC_PIN_GROUP(scif4_ctrl_c),
|
||||
SH_PFC_PIN_GROUP(scif5_data_a),
|
||||
SH_PFC_PIN_GROUP(scif5_clk_a),
|
||||
SH_PFC_PIN_GROUP(scif5_data_b),
|
||||
SH_PFC_PIN_GROUP(scif5_data_c),
|
||||
SH_PFC_PIN_GROUP(scif_clk_a),
|
||||
SH_PFC_PIN_GROUP(scif_clk_b),
|
||||
SH_PFC_PIN_GROUP(usb0_a),
|
||||
SH_PFC_PIN_GROUP(usb0_b),
|
||||
SH_PFC_PIN_GROUP(usb0_id),
|
||||
SH_PFC_PIN_GROUP(usb30),
|
||||
SH_PFC_PIN_GROUP(usb30_id),
|
||||
}
|
||||
};
|
||||
|
||||
static const char * const avb_groups[] = {
|
||||
@ -2210,6 +2569,53 @@ static const char * const i2c7_groups[] = {
|
||||
"i2c7_b",
|
||||
};
|
||||
|
||||
static const char * const msiof0_groups[] = {
|
||||
"msiof0_clk",
|
||||
"msiof0_sync",
|
||||
"msiof0_ss1",
|
||||
"msiof0_ss2",
|
||||
"msiof0_txd",
|
||||
"msiof0_rxd",
|
||||
};
|
||||
|
||||
static const char * const msiof1_groups[] = {
|
||||
"msiof1_clk",
|
||||
"msiof1_sync",
|
||||
"msiof1_ss1",
|
||||
"msiof1_ss2",
|
||||
"msiof1_txd",
|
||||
"msiof1_rxd",
|
||||
};
|
||||
|
||||
static const char * const msiof2_groups[] = {
|
||||
"msiof2_clk_a",
|
||||
"msiof2_sync_a",
|
||||
"msiof2_ss1_a",
|
||||
"msiof2_ss2_a",
|
||||
"msiof2_txd_a",
|
||||
"msiof2_rxd_a",
|
||||
"msiof2_clk_b",
|
||||
"msiof2_sync_b",
|
||||
"msiof2_ss1_b",
|
||||
"msiof2_ss2_b",
|
||||
"msiof2_txd_b",
|
||||
"msiof2_rxd_b",
|
||||
};
|
||||
|
||||
static const char * const msiof3_groups[] = {
|
||||
"msiof3_clk_a",
|
||||
"msiof3_sync_a",
|
||||
"msiof3_ss1_a",
|
||||
"msiof3_ss2_a",
|
||||
"msiof3_txd_a",
|
||||
"msiof3_rxd_a",
|
||||
"msiof3_clk_b",
|
||||
"msiof3_sync_b",
|
||||
"msiof3_ss1_b",
|
||||
"msiof3_txd_b",
|
||||
"msiof3_rxd_b",
|
||||
};
|
||||
|
||||
static const char * const pwm0_groups[] = {
|
||||
"pwm0_a",
|
||||
"pwm0_b",
|
||||
@ -2309,31 +2715,40 @@ static const char * const usb30_groups[] = {
|
||||
"usb30_id",
|
||||
};
|
||||
|
||||
static const struct sh_pfc_function pinmux_functions[] = {
|
||||
SH_PFC_FUNCTION(avb),
|
||||
SH_PFC_FUNCTION(du),
|
||||
SH_PFC_FUNCTION(i2c1),
|
||||
SH_PFC_FUNCTION(i2c2),
|
||||
SH_PFC_FUNCTION(i2c4),
|
||||
SH_PFC_FUNCTION(i2c5),
|
||||
SH_PFC_FUNCTION(i2c6),
|
||||
SH_PFC_FUNCTION(i2c7),
|
||||
SH_PFC_FUNCTION(pwm0),
|
||||
SH_PFC_FUNCTION(pwm1),
|
||||
SH_PFC_FUNCTION(pwm2),
|
||||
SH_PFC_FUNCTION(pwm3),
|
||||
SH_PFC_FUNCTION(pwm4),
|
||||
SH_PFC_FUNCTION(pwm5),
|
||||
SH_PFC_FUNCTION(pwm6),
|
||||
SH_PFC_FUNCTION(scif0),
|
||||
SH_PFC_FUNCTION(scif1),
|
||||
SH_PFC_FUNCTION(scif2),
|
||||
SH_PFC_FUNCTION(scif3),
|
||||
SH_PFC_FUNCTION(scif4),
|
||||
SH_PFC_FUNCTION(scif5),
|
||||
SH_PFC_FUNCTION(scif_clk),
|
||||
SH_PFC_FUNCTION(usb0),
|
||||
SH_PFC_FUNCTION(usb30),
|
||||
static const struct {
|
||||
struct sh_pfc_function common[28];
|
||||
struct sh_pfc_function automotive[0];
|
||||
} pinmux_functions = {
|
||||
.common = {
|
||||
SH_PFC_FUNCTION(avb),
|
||||
SH_PFC_FUNCTION(du),
|
||||
SH_PFC_FUNCTION(i2c1),
|
||||
SH_PFC_FUNCTION(i2c2),
|
||||
SH_PFC_FUNCTION(i2c4),
|
||||
SH_PFC_FUNCTION(i2c5),
|
||||
SH_PFC_FUNCTION(i2c6),
|
||||
SH_PFC_FUNCTION(i2c7),
|
||||
SH_PFC_FUNCTION(msiof0),
|
||||
SH_PFC_FUNCTION(msiof1),
|
||||
SH_PFC_FUNCTION(msiof2),
|
||||
SH_PFC_FUNCTION(msiof3),
|
||||
SH_PFC_FUNCTION(pwm0),
|
||||
SH_PFC_FUNCTION(pwm1),
|
||||
SH_PFC_FUNCTION(pwm2),
|
||||
SH_PFC_FUNCTION(pwm3),
|
||||
SH_PFC_FUNCTION(pwm4),
|
||||
SH_PFC_FUNCTION(pwm5),
|
||||
SH_PFC_FUNCTION(pwm6),
|
||||
SH_PFC_FUNCTION(scif0),
|
||||
SH_PFC_FUNCTION(scif1),
|
||||
SH_PFC_FUNCTION(scif2),
|
||||
SH_PFC_FUNCTION(scif3),
|
||||
SH_PFC_FUNCTION(scif4),
|
||||
SH_PFC_FUNCTION(scif5),
|
||||
SH_PFC_FUNCTION(scif_clk),
|
||||
SH_PFC_FUNCTION(usb0),
|
||||
SH_PFC_FUNCTION(usb30),
|
||||
}
|
||||
};
|
||||
|
||||
static const struct pinmux_cfg_reg pinmux_config_regs[] = {
|
||||
@ -3059,6 +3474,30 @@ static const struct sh_pfc_soc_operations r8a77990_pinmux_ops = {
|
||||
.set_bias = r8a77990_pinmux_set_bias,
|
||||
};
|
||||
|
||||
#ifdef CONFIG_PINCTRL_PFC_R8A774C0
|
||||
const struct sh_pfc_soc_info r8a774c0_pinmux_info = {
|
||||
.name = "r8a774c0_pfc",
|
||||
.ops = &r8a77990_pinmux_ops,
|
||||
.unlock_reg = 0xe6060000, /* PMMR */
|
||||
|
||||
.function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },
|
||||
|
||||
.pins = pinmux_pins,
|
||||
.nr_pins = ARRAY_SIZE(pinmux_pins),
|
||||
.groups = pinmux_groups.common,
|
||||
.nr_groups = ARRAY_SIZE(pinmux_groups.common),
|
||||
.functions = pinmux_functions.common,
|
||||
.nr_functions = ARRAY_SIZE(pinmux_functions.common),
|
||||
|
||||
.cfg_regs = pinmux_config_regs,
|
||||
.bias_regs = pinmux_bias_regs,
|
||||
|
||||
.pinmux_data = pinmux_data,
|
||||
.pinmux_data_size = ARRAY_SIZE(pinmux_data),
|
||||
};
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_PINCTRL_PFC_R8A77990
|
||||
const struct sh_pfc_soc_info r8a77990_pinmux_info = {
|
||||
.name = "r8a77990_pfc",
|
||||
.ops = &r8a77990_pinmux_ops,
|
||||
@ -3068,10 +3507,12 @@ const struct sh_pfc_soc_info r8a77990_pinmux_info = {
|
||||
|
||||
.pins = pinmux_pins,
|
||||
.nr_pins = ARRAY_SIZE(pinmux_pins),
|
||||
.groups = pinmux_groups,
|
||||
.nr_groups = ARRAY_SIZE(pinmux_groups),
|
||||
.functions = pinmux_functions,
|
||||
.nr_functions = ARRAY_SIZE(pinmux_functions),
|
||||
.groups = pinmux_groups.common,
|
||||
.nr_groups = ARRAY_SIZE(pinmux_groups.common) +
|
||||
ARRAY_SIZE(pinmux_groups.automotive),
|
||||
.functions = pinmux_functions.common,
|
||||
.nr_functions = ARRAY_SIZE(pinmux_functions.common) +
|
||||
ARRAY_SIZE(pinmux_functions.automotive),
|
||||
|
||||
.cfg_regs = pinmux_config_regs,
|
||||
.bias_regs = pinmux_bias_regs,
|
||||
@ -3079,3 +3520,4 @@ const struct sh_pfc_soc_info r8a77990_pinmux_info = {
|
||||
.pinmux_data = pinmux_data,
|
||||
.pinmux_data_size = ARRAY_SIZE(pinmux_data),
|
||||
};
|
||||
#endif
|
||||
|
||||
@ -1,3 +1,4 @@
|
||||
// SPDX-License-Identifier: GPL-2.0
|
||||
/*
|
||||
* R8A77995 processor support - PFC hardware block.
|
||||
*
|
||||
@ -8,10 +9,6 @@
|
||||
* R-Car Gen3 processor support - PFC hardware block.
|
||||
*
|
||||
* Copyright (C) 2015 Renesas Electronics Corporation
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; version 2 of the License.
|
||||
*/
|
||||
|
||||
#include <linux/kernel.h>
|
||||
@ -520,6 +517,10 @@ static const u16 pinmux_data[] = {
|
||||
PINMUX_SINGLE(QSPI0_SPCLK),
|
||||
PINMUX_SINGLE(SCL0),
|
||||
PINMUX_SINGLE(SDA0),
|
||||
PINMUX_SINGLE(MSIOF0_RXD),
|
||||
PINMUX_SINGLE(MSIOF0_TXD),
|
||||
PINMUX_SINGLE(MSIOF0_SYNC),
|
||||
PINMUX_SINGLE(MSIOF0_SCK),
|
||||
|
||||
/* IPSR0 */
|
||||
PINMUX_IPSR_MSEL(IP0_3_0, IRQ0_A, SEL_IRQ_0_0),
|
||||
@ -1277,6 +1278,289 @@ static const unsigned int mmc_ctrl_mux[] = {
|
||||
MMC_CLK_MARK, MMC_CMD_MARK,
|
||||
};
|
||||
|
||||
/* - MSIOF0 ----------------------------------------------------------------- */
|
||||
static const unsigned int msiof0_clk_pins[] = {
|
||||
/* SCK */
|
||||
RCAR_GP_PIN(4, 12),
|
||||
};
|
||||
|
||||
static const unsigned int msiof0_clk_mux[] = {
|
||||
MSIOF0_SCK_MARK,
|
||||
};
|
||||
|
||||
static const unsigned int msiof0_sync_pins[] = {
|
||||
/* SYNC */
|
||||
RCAR_GP_PIN(4, 13),
|
||||
};
|
||||
|
||||
static const unsigned int msiof0_sync_mux[] = {
|
||||
MSIOF0_SYNC_MARK,
|
||||
};
|
||||
|
||||
static const unsigned int msiof0_ss1_pins[] = {
|
||||
/* SS1 */
|
||||
RCAR_GP_PIN(4, 20),
|
||||
};
|
||||
|
||||
static const unsigned int msiof0_ss1_mux[] = {
|
||||
MSIOF0_SS1_MARK,
|
||||
};
|
||||
|
||||
static const unsigned int msiof0_ss2_pins[] = {
|
||||
/* SS2 */
|
||||
RCAR_GP_PIN(4, 21),
|
||||
};
|
||||
|
||||
static const unsigned int msiof0_ss2_mux[] = {
|
||||
MSIOF0_SS2_MARK,
|
||||
};
|
||||
|
||||
static const unsigned int msiof0_txd_pins[] = {
|
||||
/* TXD */
|
||||
RCAR_GP_PIN(4, 14),
|
||||
};
|
||||
|
||||
static const unsigned int msiof0_txd_mux[] = {
|
||||
MSIOF0_TXD_MARK,
|
||||
};
|
||||
|
||||
static const unsigned int msiof0_rxd_pins[] = {
|
||||
/* RXD */
|
||||
RCAR_GP_PIN(4, 15),
|
||||
};
|
||||
|
||||
static const unsigned int msiof0_rxd_mux[] = {
|
||||
MSIOF0_RXD_MARK,
|
||||
};
|
||||
|
||||
/* - MSIOF1 ----------------------------------------------------------------- */
|
||||
static const unsigned int msiof1_clk_pins[] = {
|
||||
/* SCK */
|
||||
RCAR_GP_PIN(4, 16),
|
||||
};
|
||||
|
||||
static const unsigned int msiof1_clk_mux[] = {
|
||||
MSIOF1_SCK_MARK,
|
||||
};
|
||||
|
||||
static const unsigned int msiof1_sync_pins[] = {
|
||||
/* SYNC */
|
||||
RCAR_GP_PIN(4, 19),
|
||||
};
|
||||
|
||||
static const unsigned int msiof1_sync_mux[] = {
|
||||
MSIOF1_SYNC_MARK,
|
||||
};
|
||||
|
||||
static const unsigned int msiof1_ss1_pins[] = {
|
||||
/* SS1 */
|
||||
RCAR_GP_PIN(4, 25),
|
||||
};
|
||||
|
||||
static const unsigned int msiof1_ss1_mux[] = {
|
||||
MSIOF1_SS1_MARK,
|
||||
};
|
||||
|
||||
static const unsigned int msiof1_ss2_pins[] = {
|
||||
/* SS2 */
|
||||
RCAR_GP_PIN(4, 22),
|
||||
};
|
||||
|
||||
static const unsigned int msiof1_ss2_mux[] = {
|
||||
MSIOF1_SS2_MARK,
|
||||
};
|
||||
|
||||
static const unsigned int msiof1_txd_pins[] = {
|
||||
/* TXD */
|
||||
RCAR_GP_PIN(4, 17),
|
||||
};
|
||||
|
||||
static const unsigned int msiof1_txd_mux[] = {
|
||||
MSIOF1_TXD_MARK,
|
||||
};
|
||||
|
||||
static const unsigned int msiof1_rxd_pins[] = {
|
||||
/* RXD */
|
||||
RCAR_GP_PIN(4, 18),
|
||||
};
|
||||
|
||||
static const unsigned int msiof1_rxd_mux[] = {
|
||||
MSIOF1_RXD_MARK,
|
||||
};
|
||||
|
||||
/* - MSIOF2 ----------------------------------------------------------------- */
|
||||
static const unsigned int msiof2_clk_pins[] = {
|
||||
/* SCK */
|
||||
RCAR_GP_PIN(0, 3),
|
||||
};
|
||||
|
||||
static const unsigned int msiof2_clk_mux[] = {
|
||||
MSIOF2_SCK_MARK,
|
||||
};
|
||||
|
||||
static const unsigned int msiof2_sync_a_pins[] = {
|
||||
/* SYNC */
|
||||
RCAR_GP_PIN(0, 6),
|
||||
};
|
||||
|
||||
static const unsigned int msiof2_sync_a_mux[] = {
|
||||
MSIOF2_SYNC_A_MARK,
|
||||
};
|
||||
|
||||
static const unsigned int msiof2_sync_b_pins[] = {
|
||||
/* SYNC */
|
||||
RCAR_GP_PIN(0, 2),
|
||||
};
|
||||
|
||||
static const unsigned int msiof2_sync_b_mux[] = {
|
||||
MSIOF2_SYNC_B_MARK,
|
||||
};
|
||||
|
||||
static const unsigned int msiof2_ss1_pins[] = {
|
||||
/* SS1 */
|
||||
RCAR_GP_PIN(0, 7),
|
||||
};
|
||||
|
||||
static const unsigned int msiof2_ss1_mux[] = {
|
||||
MSIOF2_SS1_MARK,
|
||||
};
|
||||
|
||||
static const unsigned int msiof2_ss2_pins[] = {
|
||||
/* SS2 */
|
||||
RCAR_GP_PIN(0, 8),
|
||||
};
|
||||
|
||||
static const unsigned int msiof2_ss2_mux[] = {
|
||||
MSIOF2_SS2_MARK,
|
||||
};
|
||||
|
||||
static const unsigned int msiof2_txd_pins[] = {
|
||||
/* TXD */
|
||||
RCAR_GP_PIN(0, 4),
|
||||
};
|
||||
|
||||
static const unsigned int msiof2_txd_mux[] = {
|
||||
MSIOF2_TXD_MARK,
|
||||
};
|
||||
|
||||
static const unsigned int msiof2_rxd_pins[] = {
|
||||
/* RXD */
|
||||
RCAR_GP_PIN(0, 5),
|
||||
};
|
||||
|
||||
static const unsigned int msiof2_rxd_mux[] = {
|
||||
MSIOF2_RXD_MARK,
|
||||
};
|
||||
|
||||
/* - MSIOF3 ----------------------------------------------------------------- */
|
||||
static const unsigned int msiof3_clk_a_pins[] = {
|
||||
/* SCK */
|
||||
RCAR_GP_PIN(2, 24),
|
||||
};
|
||||
|
||||
static const unsigned int msiof3_clk_a_mux[] = {
|
||||
MSIOF3_SCK_A_MARK,
|
||||
};
|
||||
|
||||
static const unsigned int msiof3_sync_a_pins[] = {
|
||||
/* SYNC */
|
||||
RCAR_GP_PIN(2, 21),
|
||||
};
|
||||
|
||||
static const unsigned int msiof3_sync_a_mux[] = {
|
||||
MSIOF3_SYNC_A_MARK,
|
||||
};
|
||||
|
||||
static const unsigned int msiof3_ss1_a_pins[] = {
|
||||
/* SS1 */
|
||||
RCAR_GP_PIN(2, 14),
|
||||
};
|
||||
|
||||
static const unsigned int msiof3_ss1_a_mux[] = {
|
||||
MSIOF3_SS1_A_MARK,
|
||||
};
|
||||
|
||||
static const unsigned int msiof3_ss2_a_pins[] = {
|
||||
/* SS2 */
|
||||
RCAR_GP_PIN(2, 10),
|
||||
};
|
||||
|
||||
static const unsigned int msiof3_ss2_a_mux[] = {
|
||||
MSIOF3_SS2_A_MARK,
|
||||
};
|
||||
|
||||
static const unsigned int msiof3_txd_a_pins[] = {
|
||||
/* TXD */
|
||||
RCAR_GP_PIN(2, 22),
|
||||
};
|
||||
|
||||
static const unsigned int msiof3_txd_a_mux[] = {
|
||||
MSIOF3_TXD_A_MARK,
|
||||
};
|
||||
|
||||
static const unsigned int msiof3_rxd_a_pins[] = {
|
||||
/* RXD */
|
||||
RCAR_GP_PIN(2, 23),
|
||||
};
|
||||
|
||||
static const unsigned int msiof3_rxd_a_mux[] = {
|
||||
MSIOF3_RXD_A_MARK,
|
||||
};
|
||||
|
||||
static const unsigned int msiof3_clk_b_pins[] = {
|
||||
/* SCK */
|
||||
RCAR_GP_PIN(1, 8),
|
||||
};
|
||||
|
||||
static const unsigned int msiof3_clk_b_mux[] = {
|
||||
MSIOF3_SCK_B_MARK,
|
||||
};
|
||||
|
||||
static const unsigned int msiof3_sync_b_pins[] = {
|
||||
/* SYNC */
|
||||
RCAR_GP_PIN(1, 9),
|
||||
};
|
||||
|
||||
static const unsigned int msiof3_sync_b_mux[] = {
|
||||
MSIOF3_SYNC_B_MARK,
|
||||
};
|
||||
|
||||
static const unsigned int msiof3_ss1_b_pins[] = {
|
||||
/* SS1 */
|
||||
RCAR_GP_PIN(1, 6),
|
||||
};
|
||||
|
||||
static const unsigned int msiof3_ss1_b_mux[] = {
|
||||
MSIOF3_SS1_B_MARK,
|
||||
};
|
||||
|
||||
static const unsigned int msiof3_ss2_b_pins[] = {
|
||||
/* SS2 */
|
||||
RCAR_GP_PIN(1, 7),
|
||||
};
|
||||
|
||||
static const unsigned int msiof3_ss2_b_mux[] = {
|
||||
MSIOF3_SS2_B_MARK,
|
||||
};
|
||||
|
||||
static const unsigned int msiof3_txd_b_pins[] = {
|
||||
/* TXD */
|
||||
RCAR_GP_PIN(1, 0),
|
||||
};
|
||||
|
||||
static const unsigned int msiof3_txd_b_mux[] = {
|
||||
MSIOF3_TXD_B_MARK,
|
||||
};
|
||||
|
||||
static const unsigned int msiof3_rxd_b_pins[] = {
|
||||
/* RXD */
|
||||
RCAR_GP_PIN(1, 1),
|
||||
};
|
||||
|
||||
static const unsigned int msiof3_rxd_b_mux[] = {
|
||||
MSIOF3_RXD_B_MARK,
|
||||
};
|
||||
|
||||
/* - PWM0 ------------------------------------------------------------------ */
|
||||
static const unsigned int pwm0_a_pins[] = {
|
||||
/* PWM */
|
||||
@ -1752,6 +2036,37 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
|
||||
SH_PFC_PIN_GROUP(mmc_data4),
|
||||
SH_PFC_PIN_GROUP(mmc_data8),
|
||||
SH_PFC_PIN_GROUP(mmc_ctrl),
|
||||
SH_PFC_PIN_GROUP(msiof0_clk),
|
||||
SH_PFC_PIN_GROUP(msiof0_sync),
|
||||
SH_PFC_PIN_GROUP(msiof0_ss1),
|
||||
SH_PFC_PIN_GROUP(msiof0_ss2),
|
||||
SH_PFC_PIN_GROUP(msiof0_txd),
|
||||
SH_PFC_PIN_GROUP(msiof0_rxd),
|
||||
SH_PFC_PIN_GROUP(msiof1_clk),
|
||||
SH_PFC_PIN_GROUP(msiof1_sync),
|
||||
SH_PFC_PIN_GROUP(msiof1_ss1),
|
||||
SH_PFC_PIN_GROUP(msiof1_ss2),
|
||||
SH_PFC_PIN_GROUP(msiof1_txd),
|
||||
SH_PFC_PIN_GROUP(msiof1_rxd),
|
||||
SH_PFC_PIN_GROUP(msiof2_clk),
|
||||
SH_PFC_PIN_GROUP(msiof2_sync_a),
|
||||
SH_PFC_PIN_GROUP(msiof2_sync_b),
|
||||
SH_PFC_PIN_GROUP(msiof2_ss1),
|
||||
SH_PFC_PIN_GROUP(msiof2_ss2),
|
||||
SH_PFC_PIN_GROUP(msiof2_txd),
|
||||
SH_PFC_PIN_GROUP(msiof2_rxd),
|
||||
SH_PFC_PIN_GROUP(msiof3_clk_a),
|
||||
SH_PFC_PIN_GROUP(msiof3_sync_a),
|
||||
SH_PFC_PIN_GROUP(msiof3_ss1_a),
|
||||
SH_PFC_PIN_GROUP(msiof3_ss2_a),
|
||||
SH_PFC_PIN_GROUP(msiof3_txd_a),
|
||||
SH_PFC_PIN_GROUP(msiof3_rxd_a),
|
||||
SH_PFC_PIN_GROUP(msiof3_clk_b),
|
||||
SH_PFC_PIN_GROUP(msiof3_sync_b),
|
||||
SH_PFC_PIN_GROUP(msiof3_ss1_b),
|
||||
SH_PFC_PIN_GROUP(msiof3_ss2_b),
|
||||
SH_PFC_PIN_GROUP(msiof3_txd_b),
|
||||
SH_PFC_PIN_GROUP(msiof3_rxd_b),
|
||||
SH_PFC_PIN_GROUP(pwm0_a),
|
||||
SH_PFC_PIN_GROUP(pwm0_b),
|
||||
SH_PFC_PIN_GROUP(pwm0_c),
|
||||
@ -1982,6 +2297,49 @@ static const char * const vin4_groups[] = {
|
||||
"vin4_clk",
|
||||
};
|
||||
|
||||
static const char * const msiof0_groups[] = {
|
||||
"msiof0_clk",
|
||||
"msiof0_sync",
|
||||
"msiof0_ss1",
|
||||
"msiof0_ss2",
|
||||
"msiof0_txd",
|
||||
"msiof0_rxd",
|
||||
};
|
||||
|
||||
static const char * const msiof1_groups[] = {
|
||||
"msiof1_clk",
|
||||
"msiof1_sync",
|
||||
"msiof1_ss1",
|
||||
"msiof1_ss2",
|
||||
"msiof1_txd",
|
||||
"msiof1_rxd",
|
||||
};
|
||||
|
||||
static const char * const msiof2_groups[] = {
|
||||
"msiof2_clk",
|
||||
"msiof2_sync_a",
|
||||
"msiof2_sync_b",
|
||||
"msiof2_ss1",
|
||||
"msiof2_ss2",
|
||||
"msiof2_txd",
|
||||
"msiof2_rxd",
|
||||
};
|
||||
|
||||
static const char * const msiof3_groups[] = {
|
||||
"msiof3_clk_a",
|
||||
"msiof3_sync_a",
|
||||
"msiof3_ss1_a",
|
||||
"msiof3_ss2_a",
|
||||
"msiof3_txd_a",
|
||||
"msiof3_rxd_a",
|
||||
"msiof3_clk_b",
|
||||
"msiof3_sync_b",
|
||||
"msiof3_ss1_b",
|
||||
"msiof3_ss2_b",
|
||||
"msiof3_txd_b",
|
||||
"msiof3_rxd_b",
|
||||
};
|
||||
|
||||
static const struct sh_pfc_function pinmux_functions[] = {
|
||||
SH_PFC_FUNCTION(audio_clk),
|
||||
SH_PFC_FUNCTION(avb0),
|
||||
@ -1996,6 +2354,10 @@ static const struct sh_pfc_function pinmux_functions[] = {
|
||||
SH_PFC_FUNCTION(i2c2),
|
||||
SH_PFC_FUNCTION(i2c3),
|
||||
SH_PFC_FUNCTION(mmc),
|
||||
SH_PFC_FUNCTION(msiof0),
|
||||
SH_PFC_FUNCTION(msiof1),
|
||||
SH_PFC_FUNCTION(msiof2),
|
||||
SH_PFC_FUNCTION(msiof3),
|
||||
SH_PFC_FUNCTION(pwm0),
|
||||
SH_PFC_FUNCTION(pwm1),
|
||||
SH_PFC_FUNCTION(pwm2),
|
||||
|
||||
@ -1,11 +1,8 @@
|
||||
// SPDX-License-Identifier: GPL-2.0
|
||||
/*
|
||||
* SH7203 Pinmux
|
||||
*
|
||||
* Copyright (C) 2008 Magnus Damm
|
||||
*
|
||||
* This file is subject to the terms and conditions of the GNU General Public
|
||||
* License. See the file "COPYING" in the main directory of this archive
|
||||
* for more details.
|
||||
*/
|
||||
|
||||
#include <linux/kernel.h>
|
||||
|
||||
@ -1,11 +1,8 @@
|
||||
// SPDX-License-Identifier: GPL-2.0
|
||||
/*
|
||||
* SH7264 Pinmux
|
||||
*
|
||||
* Copyright (C) 2012 Renesas Electronics Europe Ltd
|
||||
*
|
||||
* This file is subject to the terms and conditions of the GNU General Public
|
||||
* License. See the file "COPYING" in the main directory of this archive
|
||||
* for more details.
|
||||
*/
|
||||
|
||||
#include <linux/kernel.h>
|
||||
|
||||
@ -1,12 +1,9 @@
|
||||
// SPDX-License-Identifier: GPL-2.0
|
||||
/*
|
||||
* SH7269 Pinmux
|
||||
*
|
||||
* Copyright (C) 2012 Renesas Electronics Europe Ltd
|
||||
* Copyright (C) 2012 Phil Edworthy
|
||||
*
|
||||
* This file is subject to the terms and conditions of the GNU General Public
|
||||
* License. See the file "COPYING" in the main directory of this archive
|
||||
* for more details.
|
||||
*/
|
||||
|
||||
#include <linux/kernel.h>
|
||||
|
||||
@ -1,22 +1,9 @@
|
||||
// SPDX-License-Identifier: GPL-2.0
|
||||
/*
|
||||
* sh73a0 processor support - PFC hardware block
|
||||
*
|
||||
* Copyright (C) 2010 Renesas Solutions Corp.
|
||||
* Copyright (C) 2010 NISHIMOTO Hiroki
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; version 2 of the
|
||||
* License.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
|
||||
*/
|
||||
#include <linux/io.h>
|
||||
#include <linux/kernel.h>
|
||||
|
||||
@ -1,11 +1,8 @@
|
||||
// SPDX-License-Identifier: GPL-2.0
|
||||
/*
|
||||
* SH7720 Pinmux
|
||||
*
|
||||
* Copyright (C) 2008 Magnus Damm
|
||||
*
|
||||
* This file is subject to the terms and conditions of the GNU General Public
|
||||
* License. See the file "COPYING" in the main directory of this archive
|
||||
* for more details.
|
||||
*/
|
||||
|
||||
#include <linux/kernel.h>
|
||||
|
||||
@ -1,11 +1,8 @@
|
||||
// SPDX-License-Identifier: GPL-2.0
|
||||
/*
|
||||
* SH7723 Pinmux
|
||||
*
|
||||
* Copyright (C) 2008 Magnus Damm
|
||||
*
|
||||
* This file is subject to the terms and conditions of the GNU General Public
|
||||
* License. See the file "COPYING" in the main directory of this archive
|
||||
* for more details.
|
||||
*/
|
||||
|
||||
#include <linux/init.h>
|
||||
|
||||
@ -1,3 +1,4 @@
|
||||
// SPDX-License-Identifier: GPL-2.0
|
||||
/*
|
||||
* SH7724 Pinmux
|
||||
*
|
||||
@ -7,10 +8,6 @@
|
||||
*
|
||||
* Based on SH7723 Pinmux
|
||||
* Copyright (C) 2008 Magnus Damm
|
||||
*
|
||||
* This file is subject to the terms and conditions of the GNU General Public
|
||||
* License. See the file "COPYING" in the main directory of this archive
|
||||
* for more details.
|
||||
*/
|
||||
|
||||
#include <linux/init.h>
|
||||
|
||||
@ -1,12 +1,9 @@
|
||||
// SPDX-License-Identifier: GPL-2.0
|
||||
/*
|
||||
* SH7734 processor support - PFC hardware block
|
||||
*
|
||||
* Copyright (C) 2012 Renesas Solutions Corp.
|
||||
* Copyright (C) 2012 Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
|
||||
*
|
||||
* This file is subject to the terms and conditions of the GNU General Public
|
||||
* License. See the file "COPYING" in the main directory of this archive
|
||||
* for more details.
|
||||
*/
|
||||
#include <linux/init.h>
|
||||
#include <linux/kernel.h>
|
||||
|
||||
@ -1,3 +1,4 @@
|
||||
// SPDX-License-Identifier: GPL-2.0
|
||||
/*
|
||||
* SH7757 (B0 step) Pinmux
|
||||
*
|
||||
@ -7,10 +8,6 @@
|
||||
*
|
||||
* Based on SH7723 Pinmux
|
||||
* Copyright (C) 2008 Magnus Damm
|
||||
*
|
||||
* This file is subject to the terms and conditions of the GNU General Public
|
||||
* License. See the file "COPYING" in the main directory of this archive
|
||||
* for more details.
|
||||
*/
|
||||
|
||||
#include <linux/init.h>
|
||||
|
||||
@ -1,11 +1,8 @@
|
||||
// SPDX-License-Identifier: GPL-2.0
|
||||
/*
|
||||
* SH7785 Pinmux
|
||||
*
|
||||
* Copyright (C) 2008 Magnus Damm
|
||||
*
|
||||
* This file is subject to the terms and conditions of the GNU General Public
|
||||
* License. See the file "COPYING" in the main directory of this archive
|
||||
* for more details.
|
||||
*/
|
||||
|
||||
#include <linux/init.h>
|
||||
|
||||
@ -1,3 +1,4 @@
|
||||
// SPDX-License-Identifier: GPL-2.0
|
||||
/*
|
||||
* SH7786 Pinmux
|
||||
*
|
||||
@ -7,10 +8,6 @@
|
||||
* Based on SH7785 pinmux
|
||||
*
|
||||
* Copyright (C) 2008 Magnus Damm
|
||||
*
|
||||
* This file is subject to the terms and conditions of the GNU General Public
|
||||
* License. See the file "COPYING" in the main directory of this archive
|
||||
* for more details.
|
||||
*/
|
||||
|
||||
#include <linux/init.h>
|
||||
|
||||
@ -1,11 +1,8 @@
|
||||
// SPDX-License-Identifier: GPL-2.0
|
||||
/*
|
||||
* SH-X3 prototype CPU pinmux
|
||||
*
|
||||
* Copyright (C) 2010 Paul Mundt
|
||||
*
|
||||
* This file is subject to the terms and conditions of the GNU General Public
|
||||
* License. See the file "COPYING" in the main directory of this archive
|
||||
* for more details.
|
||||
*/
|
||||
#include <linux/init.h>
|
||||
#include <linux/kernel.h>
|
||||
|
||||
@ -1,11 +1,8 @@
|
||||
// SPDX-License-Identifier: GPL-2.0
|
||||
/*
|
||||
* SuperH Pin Function Controller pinmux support.
|
||||
*
|
||||
* Copyright (C) 2012 Paul Mundt
|
||||
*
|
||||
* This file is subject to the terms and conditions of the GNU General Public
|
||||
* License. See the file "COPYING" in the main directory of this archive
|
||||
* for more details.
|
||||
*/
|
||||
|
||||
#define DRV_NAME "sh-pfc"
|
||||
|
||||
@ -1,11 +1,8 @@
|
||||
/*
|
||||
/* SPDX-License-Identifier: GPL-2.0
|
||||
*
|
||||
* SuperH Pin Function Controller Support
|
||||
*
|
||||
* Copyright (c) 2008 Magnus Damm
|
||||
*
|
||||
* This file is subject to the terms and conditions of the GNU General Public
|
||||
* License. See the file "COPYING" in the main directory of this archive
|
||||
* for more details.
|
||||
*/
|
||||
|
||||
#ifndef __SH_PFC_H
|
||||
@ -273,9 +270,11 @@ extern const struct sh_pfc_soc_info emev2_pinmux_info;
|
||||
extern const struct sh_pfc_soc_info r8a73a4_pinmux_info;
|
||||
extern const struct sh_pfc_soc_info r8a7740_pinmux_info;
|
||||
extern const struct sh_pfc_soc_info r8a7743_pinmux_info;
|
||||
extern const struct sh_pfc_soc_info r8a7744_pinmux_info;
|
||||
extern const struct sh_pfc_soc_info r8a7745_pinmux_info;
|
||||
extern const struct sh_pfc_soc_info r8a77470_pinmux_info;
|
||||
extern const struct sh_pfc_soc_info r8a774a1_pinmux_info;
|
||||
extern const struct sh_pfc_soc_info r8a774c0_pinmux_info;
|
||||
extern const struct sh_pfc_soc_info r8a7778_pinmux_info;
|
||||
extern const struct sh_pfc_soc_info r8a7779_pinmux_info;
|
||||
extern const struct sh_pfc_soc_info r8a7790_pinmux_info;
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user