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dt-bindings: reset: add reset IDs for Agilex5
Add reset ID definitions required for Intel Agilex5 SoCFPGA, re-use altr,rst-mgr-s10.h as common header file similar S10 & Agilex. Acked-by: Conor Dooley <conor.dooley@microchip.com> Reviewed-by: Dinh Nguyen <dinguyen@kernel.org> Signed-off-by: Niravkumar L Rabara <niravkumar.l.rabara@intel.com> Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
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@ -63,12 +63,15 @@
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#define I2C2_RESET 74
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#define I2C3_RESET 75
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#define I2C4_RESET 76
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/* 77-79 is empty */
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#define I3C0_RESET 77
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#define I3C1_RESET 78
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/* 79 is empty */
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#define UART0_RESET 80
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#define UART1_RESET 81
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/* 82-87 is empty */
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#define GPIO0_RESET 88
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#define GPIO1_RESET 89
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#define WATCHDOG4_RESET 90
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/* BRGMODRST */
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#define SOC2FPGA_RESET 96
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