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[MIPS] Extend performance counter event field.

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The latest draft version of the MIPS Architecture Specification extends the
6 bit event field by adding a directly adjacent 4-bit EventExt field for a
total of 10 bits.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This commit is contained in:
Ralf Baechle 2008-01-29 10:14:59 +00:00
parent 231a35d372
commit 39a51109dd
1 changed files with 1 additions and 1 deletions
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2
arch/mips/oprofile/op_model_mipsxx.c
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@ -19,7 +19,7 @@
#define M_PERFCTL_SUPERVISOR (1UL << 2)
#define M_PERFCTL_USER (1UL << 3)
#define M_PERFCTL_INTERRUPT_ENABLE (1UL << 4)
#define M_PERFCTL_EVENT(event) (((event) & 0x3f) << 5)
#define M_PERFCTL_EVENT(event) (((event) & 0x3ff) << 5)
#define M_PERFCTL_VPEID(vpe) ((vpe) << 16)
#define M_PERFCTL_MT_EN(filter) ((filter) << 20)
#define M_TC_EN_ALL M_PERFCTL_MT_EN(0)