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regulator: Fix default constraints for fixed voltage regulators

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Default voltage constraints were being provided for fixed voltage
regulator where board constraints were not provided but these constraints
used INT_MIN as the default minimum voltage which is not a valid value
since it is less than zero. Use 1uV instead.

Also set the default values we set in the constraints themselves since
otherwise the max_uV constraint we determine will not be stored in the
actual constraint strucutre and will therefore not be used.

Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Liam Girdwood <lrg@slimlogic.co.uk>
This commit is contained in:
Mark Brown 2009-04-28 11:09:38 +01:00 committed by Liam Girdwood
parent 030853b7ab
commit 3e59091828
1 changed files with 5 additions and 2 deletions
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7
drivers/regulator/core.c
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@ -703,10 +703,13 @@ static int set_machine_constraints(struct regulator_dev *rdev,
int cmin = constraints->min_uV; int cmin = constraints->min_uV;
int cmax = constraints->max_uV; int cmax = constraints->max_uV;
/* it's safe to autoconfigure fixed-voltage supplies */ /* it's safe to autoconfigure fixed-voltage supplies
and the constraints are used by list_voltage. */
if (count == 1 && !cmin) { if (count == 1 && !cmin) {
cmin = INT_MIN; cmin = 1;
cmax = INT_MAX; cmax = INT_MAX;
constraints->min_uV = cmin;
constraints->max_uV = cmax;
} }
/* voltage constraints are optional */ /* voltage constraints are optional */