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net: dsa: mv88e6xxx: convert 88e6185 to phylink_pcs
Convert the 88E6185 SERDES code to use the phylink_pcs infrastructure. Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk> Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Russell King (Oracle)
David S. Miller
parent
05407b0ebc
commit
4aabe35c38
@ -9,6 +9,7 @@ mv88e6xxx-objs += global2.o
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mv88e6xxx-objs += global2_avb.o
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mv88e6xxx-objs += global2_scratch.o
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mv88e6xxx-$(CONFIG_NET_DSA_MV88E6XXX_PTP) += hwtstamp.o
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mv88e6xxx-objs += pcs-6185.o
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mv88e6xxx-objs += phy.o
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mv88e6xxx-objs += port.o
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mv88e6xxx-objs += port_hidden.o
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@ -4230,15 +4230,13 @@ static const struct mv88e6xxx_ops mv88e6095_ops = {
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.stats_get_strings = mv88e6095_stats_get_strings,
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.stats_get_stats = mv88e6095_stats_get_stats,
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.mgmt_rsvd2cpu = mv88e6185_g2_mgmt_rsvd2cpu,
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.serdes_power = mv88e6185_serdes_power,
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.serdes_get_lane = mv88e6185_serdes_get_lane,
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.serdes_pcs_get_state = mv88e6185_serdes_pcs_get_state,
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.ppu_enable = mv88e6185_g1_ppu_enable,
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.ppu_disable = mv88e6185_g1_ppu_disable,
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.reset = mv88e6185_g1_reset,
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.vtu_getnext = mv88e6185_g1_vtu_getnext,
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.vtu_loadpurge = mv88e6185_g1_vtu_loadpurge,
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.phylink_get_caps = mv88e6095_phylink_get_caps,
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.pcs_ops = &mv88e6185_pcs_ops,
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.set_max_frame_size = mv88e6185_g1_set_max_frame_size,
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};
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@ -4276,18 +4274,14 @@ static const struct mv88e6xxx_ops mv88e6097_ops = {
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.set_egress_port = mv88e6095_g1_set_egress_port,
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.watchdog_ops = &mv88e6097_watchdog_ops,
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.mgmt_rsvd2cpu = mv88e6352_g2_mgmt_rsvd2cpu,
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.serdes_power = mv88e6185_serdes_power,
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.serdes_get_lane = mv88e6185_serdes_get_lane,
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.serdes_pcs_get_state = mv88e6185_serdes_pcs_get_state,
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.serdes_irq_mapping = mv88e6390_serdes_irq_mapping,
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.serdes_irq_enable = mv88e6097_serdes_irq_enable,
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.serdes_irq_status = mv88e6097_serdes_irq_status,
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.pot_clear = mv88e6xxx_g2_pot_clear,
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.reset = mv88e6352_g1_reset,
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.rmu_disable = mv88e6085_g1_rmu_disable,
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.vtu_getnext = mv88e6352_g1_vtu_getnext,
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.vtu_loadpurge = mv88e6352_g1_vtu_loadpurge,
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.phylink_get_caps = mv88e6095_phylink_get_caps,
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.pcs_ops = &mv88e6185_pcs_ops,
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.stu_getnext = mv88e6352_g1_stu_getnext,
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.stu_loadpurge = mv88e6352_g1_stu_loadpurge,
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.set_max_frame_size = mv88e6185_g1_set_max_frame_size,
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@ -4768,9 +4762,6 @@ static const struct mv88e6xxx_ops mv88e6185_ops = {
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.set_egress_port = mv88e6095_g1_set_egress_port,
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.watchdog_ops = &mv88e6097_watchdog_ops,
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.mgmt_rsvd2cpu = mv88e6185_g2_mgmt_rsvd2cpu,
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.serdes_power = mv88e6185_serdes_power,
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.serdes_get_lane = mv88e6185_serdes_get_lane,
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.serdes_pcs_get_state = mv88e6185_serdes_pcs_get_state,
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.set_cascade_port = mv88e6185_g1_set_cascade_port,
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.ppu_enable = mv88e6185_g1_ppu_enable,
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.ppu_disable = mv88e6185_g1_ppu_disable,
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@ -4778,6 +4769,7 @@ static const struct mv88e6xxx_ops mv88e6185_ops = {
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.vtu_getnext = mv88e6185_g1_vtu_getnext,
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.vtu_loadpurge = mv88e6185_g1_vtu_loadpurge,
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.phylink_get_caps = mv88e6185_phylink_get_caps,
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.pcs_ops = &mv88e6185_pcs_ops,
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.set_max_frame_size = mv88e6185_g1_set_max_frame_size,
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};
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190
drivers/net/dsa/mv88e6xxx/pcs-6185.c
Normal file
190
drivers/net/dsa/mv88e6xxx/pcs-6185.c
Normal file
@ -0,0 +1,190 @@
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// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* Marvell 88E6185 family SERDES PCS support
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*
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* Copyright (c) 2008 Marvell Semiconductor
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*
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* Copyright (c) 2017 Andrew Lunn <andrew@lunn.ch>
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*/
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#include <linux/phylink.h>
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#include "global2.h"
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#include "port.h"
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#include "serdes.h"
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struct mv88e6185_pcs {
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struct phylink_pcs phylink_pcs;
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unsigned int irq;
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char name[64];
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struct mv88e6xxx_chip *chip;
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int port;
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};
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static struct mv88e6185_pcs *pcs_to_mv88e6185_pcs(struct phylink_pcs *pcs)
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{
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return container_of(pcs, struct mv88e6185_pcs, phylink_pcs);
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}
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static irqreturn_t mv88e6185_pcs_handle_irq(int irq, void *dev_id)
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{
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struct mv88e6185_pcs *mpcs = dev_id;
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struct mv88e6xxx_chip *chip;
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irqreturn_t ret = IRQ_NONE;
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bool link_up;
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u16 status;
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int port;
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int err;
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chip = mpcs->chip;
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port = mpcs->port;
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mv88e6xxx_reg_lock(chip);
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err = mv88e6xxx_port_read(chip, port, MV88E6XXX_PORT_STS, &status);
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mv88e6xxx_reg_unlock(chip);
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if (!err) {
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link_up = !!(status & MV88E6XXX_PORT_STS_LINK);
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phylink_pcs_change(&mpcs->phylink_pcs, link_up);
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ret = IRQ_HANDLED;
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}
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return ret;
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}
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static void mv88e6185_pcs_get_state(struct phylink_pcs *pcs,
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struct phylink_link_state *state)
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{
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struct mv88e6185_pcs *mpcs = pcs_to_mv88e6185_pcs(pcs);
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struct mv88e6xxx_chip *chip = mpcs->chip;
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int port = mpcs->port;
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u16 status;
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int err;
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mv88e6xxx_reg_lock(chip);
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err = mv88e6xxx_port_read(chip, port, MV88E6XXX_PORT_STS, &status);
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mv88e6xxx_reg_unlock(chip);
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if (err)
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status = 0;
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state->link = !!(status & MV88E6XXX_PORT_STS_LINK);
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if (state->link) {
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state->duplex = status & MV88E6XXX_PORT_STS_DUPLEX ?
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DUPLEX_FULL : DUPLEX_HALF;
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switch (status & MV88E6XXX_PORT_STS_SPEED_MASK) {
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case MV88E6XXX_PORT_STS_SPEED_1000:
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state->speed = SPEED_1000;
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break;
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case MV88E6XXX_PORT_STS_SPEED_100:
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state->speed = SPEED_100;
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break;
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case MV88E6XXX_PORT_STS_SPEED_10:
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state->speed = SPEED_10;
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break;
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default:
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state->link = false;
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break;
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}
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}
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}
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static int mv88e6185_pcs_config(struct phylink_pcs *pcs, unsigned int mode,
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phy_interface_t interface,
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const unsigned long *advertising,
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bool permit_pause_to_mac)
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{
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return 0;
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}
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static void mv88e6185_pcs_an_restart(struct phylink_pcs *pcs)
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{
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}
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static const struct phylink_pcs_ops mv88e6185_phylink_pcs_ops = {
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.pcs_get_state = mv88e6185_pcs_get_state,
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.pcs_config = mv88e6185_pcs_config,
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.pcs_an_restart = mv88e6185_pcs_an_restart,
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};
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static int mv88e6185_pcs_init(struct mv88e6xxx_chip *chip, int port)
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{
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struct mv88e6185_pcs *mpcs;
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struct device *dev;
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unsigned int irq;
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int err;
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/* There are no configurable serdes lanes on this switch chip, so
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* we use the static cmode configuration to determine whether we
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* have a PCS or not.
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*/
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if (chip->ports[port].cmode != MV88E6185_PORT_STS_CMODE_SERDES &&
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chip->ports[port].cmode != MV88E6185_PORT_STS_CMODE_1000BASE_X)
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return 0;
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dev = chip->dev;
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mpcs = kzalloc(sizeof(*mpcs), GFP_KERNEL);
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if (!mpcs)
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return -ENOMEM;
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mpcs->chip = chip;
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mpcs->port = port;
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mpcs->phylink_pcs.ops = &mv88e6185_phylink_pcs_ops;
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irq = mv88e6xxx_serdes_irq_mapping(chip, port);
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if (irq) {
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snprintf(mpcs->name, sizeof(mpcs->name),
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"mv88e6xxx-%s-serdes-%d", dev_name(dev), port);
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err = request_threaded_irq(irq, NULL, mv88e6185_pcs_handle_irq,
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IRQF_ONESHOT, mpcs->name, mpcs);
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if (err) {
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kfree(mpcs);
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return err;
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}
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mpcs->irq = irq;
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} else {
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mpcs->phylink_pcs.poll = true;
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}
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chip->ports[port].pcs_private = &mpcs->phylink_pcs;
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return 0;
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}
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static void mv88e6185_pcs_teardown(struct mv88e6xxx_chip *chip, int port)
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{
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struct mv88e6185_pcs *mpcs;
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mpcs = chip->ports[port].pcs_private;
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if (!mpcs)
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return;
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if (mpcs->irq)
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free_irq(mpcs->irq, mpcs);
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kfree(mpcs);
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chip->ports[port].pcs_private = NULL;
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}
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static struct phylink_pcs *mv88e6185_pcs_select(struct mv88e6xxx_chip *chip,
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int port,
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phy_interface_t interface)
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{
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return chip->ports[port].pcs_private;
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}
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const struct mv88e6xxx_pcs_ops mv88e6185_pcs_ops = {
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.pcs_init = mv88e6185_pcs_init,
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.pcs_teardown = mv88e6185_pcs_teardown,
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.pcs_select = mv88e6185_pcs_select,
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};
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@ -460,115 +460,6 @@ int mv88e6341_serdes_get_lane(struct mv88e6xxx_chip *chip, int port)
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return lane;
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}
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int mv88e6185_serdes_power(struct mv88e6xxx_chip *chip, int port, int lane,
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bool up)
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{
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/* The serdes power can't be controlled on this switch chip but we need
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* to supply this function to avoid returning -EOPNOTSUPP in
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* mv88e6xxx_serdes_power_up/mv88e6xxx_serdes_power_down
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*/
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return 0;
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}
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int mv88e6185_serdes_get_lane(struct mv88e6xxx_chip *chip, int port)
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{
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/* There are no configurable serdes lanes on this switch chip but we
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* need to return a non-negative lane number so that callers of
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* mv88e6xxx_serdes_get_lane() know this is a serdes port.
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*/
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switch (chip->ports[port].cmode) {
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case MV88E6185_PORT_STS_CMODE_SERDES:
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case MV88E6185_PORT_STS_CMODE_1000BASE_X:
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return 0;
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default:
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return -ENODEV;
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}
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}
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int mv88e6185_serdes_pcs_get_state(struct mv88e6xxx_chip *chip, int port,
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int lane, struct phylink_link_state *state)
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{
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int err;
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u16 status;
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err = mv88e6xxx_port_read(chip, port, MV88E6XXX_PORT_STS, &status);
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if (err)
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return err;
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state->link = !!(status & MV88E6XXX_PORT_STS_LINK);
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if (state->link) {
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state->duplex = status & MV88E6XXX_PORT_STS_DUPLEX ? DUPLEX_FULL : DUPLEX_HALF;
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switch (status & MV88E6XXX_PORT_STS_SPEED_MASK) {
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case MV88E6XXX_PORT_STS_SPEED_1000:
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state->speed = SPEED_1000;
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break;
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case MV88E6XXX_PORT_STS_SPEED_100:
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state->speed = SPEED_100;
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break;
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case MV88E6XXX_PORT_STS_SPEED_10:
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state->speed = SPEED_10;
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break;
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default:
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dev_err(chip->dev, "invalid PHY speed\n");
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return -EINVAL;
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}
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} else {
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state->duplex = DUPLEX_UNKNOWN;
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state->speed = SPEED_UNKNOWN;
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}
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return 0;
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}
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int mv88e6097_serdes_irq_enable(struct mv88e6xxx_chip *chip, int port, int lane,
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bool enable)
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{
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u8 cmode = chip->ports[port].cmode;
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/* The serdes interrupts are enabled in the G2_INT_MASK register. We
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* need to return 0 to avoid returning -EOPNOTSUPP in
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* mv88e6xxx_serdes_irq_enable/mv88e6xxx_serdes_irq_disable
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*/
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switch (cmode) {
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case MV88E6185_PORT_STS_CMODE_SERDES:
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case MV88E6185_PORT_STS_CMODE_1000BASE_X:
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return 0;
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}
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return -EOPNOTSUPP;
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}
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static void mv88e6097_serdes_irq_link(struct mv88e6xxx_chip *chip, int port)
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{
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u16 status;
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int err;
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err = mv88e6xxx_port_read(chip, port, MV88E6XXX_PORT_STS, &status);
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if (err) {
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dev_err(chip->dev, "can't read port status: %d\n", err);
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return;
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}
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dsa_port_phylink_mac_change(chip->ds, port, !!(status & MV88E6XXX_PORT_STS_LINK));
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}
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irqreturn_t mv88e6097_serdes_irq_status(struct mv88e6xxx_chip *chip, int port,
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int lane)
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{
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u8 cmode = chip->ports[port].cmode;
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switch (cmode) {
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case MV88E6185_PORT_STS_CMODE_SERDES:
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case MV88E6185_PORT_STS_CMODE_1000BASE_X:
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mv88e6097_serdes_irq_link(chip, port);
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return IRQ_HANDLED;
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}
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return IRQ_NONE;
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}
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int mv88e6390_serdes_get_lane(struct mv88e6xxx_chip *chip, int port)
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{
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u8 cmode = chip->ports[port].cmode;
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@ -112,7 +112,6 @@ struct phylink_link_state;
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int mv88e6xxx_pcs_decode_state(struct device *dev, u16 bmsr, u16 lpa,
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u16 status, struct phylink_link_state *state);
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int mv88e6185_serdes_get_lane(struct mv88e6xxx_chip *chip, int port);
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int mv88e6341_serdes_get_lane(struct mv88e6xxx_chip *chip, int port);
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int mv88e6352_serdes_get_lane(struct mv88e6xxx_chip *chip, int port);
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int mv88e6390_serdes_get_lane(struct mv88e6xxx_chip *chip, int port);
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@ -126,8 +125,6 @@ int mv88e6390_serdes_pcs_config(struct mv88e6xxx_chip *chip, int port,
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int lane, unsigned int mode,
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phy_interface_t interface,
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const unsigned long *advertise);
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int mv88e6185_serdes_pcs_get_state(struct mv88e6xxx_chip *chip, int port,
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int lane, struct phylink_link_state *state);
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int mv88e6352_serdes_pcs_get_state(struct mv88e6xxx_chip *chip, int port,
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int lane, struct phylink_link_state *state);
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int mv88e6390_serdes_pcs_get_state(struct mv88e6xxx_chip *chip, int port,
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@ -146,8 +143,6 @@ unsigned int mv88e6352_serdes_irq_mapping(struct mv88e6xxx_chip *chip,
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int port);
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unsigned int mv88e6390_serdes_irq_mapping(struct mv88e6xxx_chip *chip,
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int port);
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int mv88e6185_serdes_power(struct mv88e6xxx_chip *chip, int port, int lane,
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bool up);
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int mv88e6352_serdes_power(struct mv88e6xxx_chip *chip, int port, int lane,
|
||||
bool on);
|
||||
int mv88e6390_serdes_power(struct mv88e6xxx_chip *chip, int port, int lane,
|
||||
@ -155,16 +150,12 @@ int mv88e6390_serdes_power(struct mv88e6xxx_chip *chip, int port, int lane,
|
||||
int mv88e6393x_serdes_power(struct mv88e6xxx_chip *chip, int port, int lane,
|
||||
bool on);
|
||||
int mv88e6393x_serdes_setup_errata(struct mv88e6xxx_chip *chip);
|
||||
int mv88e6097_serdes_irq_enable(struct mv88e6xxx_chip *chip, int port, int lane,
|
||||
bool enable);
|
||||
int mv88e6352_serdes_irq_enable(struct mv88e6xxx_chip *chip, int port, int lane,
|
||||
bool enable);
|
||||
int mv88e6390_serdes_irq_enable(struct mv88e6xxx_chip *chip, int port, int lane,
|
||||
bool enable);
|
||||
int mv88e6393x_serdes_irq_enable(struct mv88e6xxx_chip *chip, int port,
|
||||
int lane, bool enable);
|
||||
irqreturn_t mv88e6097_serdes_irq_status(struct mv88e6xxx_chip *chip, int port,
|
||||
int lane);
|
||||
irqreturn_t mv88e6352_serdes_irq_status(struct mv88e6xxx_chip *chip, int port,
|
||||
int lane);
|
||||
irqreturn_t mv88e6390_serdes_irq_status(struct mv88e6xxx_chip *chip, int port,
|
||||
@ -254,4 +245,6 @@ mv88e6xxx_serdes_irq_status(struct mv88e6xxx_chip *chip, int port, int lane)
|
||||
return chip->info->ops->serdes_irq_status(chip, port, lane);
|
||||
}
|
||||
|
||||
extern const struct mv88e6xxx_pcs_ops mv88e6185_pcs_ops;
|
||||
|
||||
#endif
|
||||
|
||||
Loading…
Reference in New Issue
Block a user