mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
synced 2025-01-10 07:10:27 +00:00
[POWERPC] Whitespace cleanup in arch/powerpc
Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
This commit is contained in:
Scott Wood
Paul Mackerras
parent
16a15a30f8
commit
4b218e9bb2
@ -10,207 +10,209 @@
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*/
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/ {
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model = "MPC8272ADS";
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compatible = "MPC8260ADS";
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#address-cells = <1>;
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#size-cells = <1>;
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model = "MPC8272ADS";
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compatible = "MPC8260ADS";
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#address-cells = <1>;
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#size-cells = <1>;
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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PowerPC,8272@0 {
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device_type = "cpu";
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reg = <0>;
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d-cache-line-size = <20>; // 32 bytes
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i-cache-line-size = <20>; // 32 bytes
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d-cache-size = <4000>; // L1, 16K
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i-cache-size = <4000>; // L1, 16K
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timebase-frequency = <0>;
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bus-frequency = <0>;
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clock-frequency = <0>;
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32-bit;
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};
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};
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PowerPC,8272@0 {
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device_type = "cpu";
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reg = <0>;
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d-cache-line-size = <20>; // 32 bytes
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i-cache-line-size = <20>; // 32 bytes
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d-cache-size = <4000>; // L1, 16K
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i-cache-size = <4000>; // L1, 16K
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timebase-frequency = <0>;
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bus-frequency = <0>;
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clock-frequency = <0>;
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32-bit;
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};
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};
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pci_pic: interrupt-controller@f8200000 {
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#address-cells = <0>;
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#interrupt-cells = <2>;
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interrupt-controller;
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reg = <f8200000 f8200004>;
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built-in;
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device_type = "pci-pic";
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};
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memory {
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device_type = "memory";
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reg = <00000000 4000000 f4500000 00000020>;
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};
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pci_pic: interrupt-controller@f8200000 {
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#address-cells = <0>;
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#interrupt-cells = <2>;
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interrupt-controller;
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reg = <f8200000 f8200004>;
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built-in;
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device_type = "pci-pic";
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};
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chosen {
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name = "chosen";
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linux,platform = <0>;
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memory {
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device_type = "memory";
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reg = <00000000 4000000 f4500000 00000020>;
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};
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chosen {
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name = "chosen";
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linux,platform = <0>;
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interrupt-controller = <&Cpm_pic>;
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};
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};
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soc8272@f0000000 {
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#address-cells = <1>;
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#size-cells = <1>;
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#interrupt-cells = <2>;
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device_type = "soc";
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ranges = <00000000 f0000000 00053000>;
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reg = <f0000000 10000>;
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soc8272@f0000000 {
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#address-cells = <1>;
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#size-cells = <1>;
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#interrupt-cells = <2>;
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device_type = "soc";
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ranges = <00000000 f0000000 00053000>;
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reg = <f0000000 10000>;
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mdio@0 {
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device_type = "mdio";
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compatible = "fs_enet";
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reg = <0 0>;
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#address-cells = <1>;
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#size-cells = <0>;
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mdio@0 {
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device_type = "mdio";
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compatible = "fs_enet";
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reg = <0 0>;
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#address-cells = <1>;
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#size-cells = <0>;
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phy0:ethernet-phy@0 {
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interrupt-parent = <&Cpm_pic>;
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interrupts = <17 4>;
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reg = <0>;
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bitbang = [ 12 12 13 02 02 01 ];
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device_type = "ethernet-phy";
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};
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interrupts = <17 4>;
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reg = <0>;
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bitbang = [ 12 12 13 02 02 01 ];
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device_type = "ethernet-phy";
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};
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phy1:ethernet-phy@1 {
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interrupt-parent = <&Cpm_pic>;
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interrupts = <17 4>;
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bitbang = [ 12 12 13 02 02 01 ];
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reg = <3>;
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device_type = "ethernet-phy";
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};
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};
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interrupts = <17 4>;
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bitbang = [ 12 12 13 02 02 01 ];
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reg = <3>;
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device_type = "ethernet-phy";
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};
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};
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ethernet@24000 {
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#address-cells = <1>;
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#size-cells = <0>;
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device_type = "network";
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device-id = <1>;
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compatible = "fs_enet";
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model = "FCC";
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reg = <11300 20 8400 100 11380 30>;
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mac-address = [ 00 11 2F 99 43 54 ];
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interrupts = <20 2>;
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ethernet@24000 {
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#address-cells = <1>;
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#size-cells = <0>;
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device_type = "network";
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device-id = <1>;
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compatible = "fs_enet";
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model = "FCC";
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reg = <11300 20 8400 100 11380 30>;
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mac-address = [ 00 11 2F 99 43 54 ];
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interrupts = <20 2>;
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interrupt-parent = <&Cpm_pic>;
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phy-handle = <&Phy0>;
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rx-clock = <13>;
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tx-clock = <12>;
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};
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rx-clock = <13>;
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tx-clock = <12>;
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};
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ethernet@25000 {
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device_type = "network";
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device-id = <2>;
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compatible = "fs_enet";
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model = "FCC";
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reg = <11320 20 8500 100 113b0 30>;
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mac-address = [ 00 11 2F 99 44 54 ];
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interrupts = <21 2>;
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ethernet@25000 {
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device_type = "network";
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device-id = <2>;
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compatible = "fs_enet";
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model = "FCC";
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reg = <11320 20 8500 100 113b0 30>;
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mac-address = [ 00 11 2F 99 44 54 ];
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interrupts = <21 2>;
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interrupt-parent = <&Cpm_pic>;
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phy-handle = <&Phy1>;
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rx-clock = <17>;
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tx-clock = <18>;
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};
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rx-clock = <17>;
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tx-clock = <18>;
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};
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cpm@f0000000 {
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#address-cells = <1>;
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#size-cells = <1>;
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#interrupt-cells = <2>;
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device_type = "cpm";
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model = "CPM2";
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ranges = <00000000 00000000 20000>;
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reg = <0 20000>;
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command-proc = <119c0>;
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brg-frequency = <17D7840>;
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cpm_clk = <BEBC200>;
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cpm@f0000000 {
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#address-cells = <1>;
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#size-cells = <1>;
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#interrupt-cells = <2>;
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device_type = "cpm";
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model = "CPM2";
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ranges = <00000000 00000000 20000>;
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reg = <0 20000>;
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command-proc = <119c0>;
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brg-frequency = <17D7840>;
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cpm_clk = <BEBC200>;
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scc@11a00 {
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device_type = "serial";
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compatible = "cpm_uart";
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model = "SCC";
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device-id = <1>;
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reg = <11a00 20 8000 100>;
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current-speed = <1c200>;
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interrupts = <28 2>;
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scc@11a00 {
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device_type = "serial";
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compatible = "cpm_uart";
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model = "SCC";
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device-id = <1>;
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reg = <11a00 20 8000 100>;
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current-speed = <1c200>;
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interrupts = <28 2>;
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interrupt-parent = <&Cpm_pic>;
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clock-setup = <0 00ffffff>;
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rx-clock = <1>;
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tx-clock = <1>;
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};
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clock-setup = <0 00ffffff>;
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rx-clock = <1>;
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tx-clock = <1>;
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};
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scc@11a60 {
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device_type = "serial";
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compatible = "cpm_uart";
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model = "SCC";
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device-id = <4>;
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reg = <11a60 20 8300 100>;
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current-speed = <1c200>;
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interrupts = <2b 2>;
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scc@11a60 {
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device_type = "serial";
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compatible = "cpm_uart";
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model = "SCC";
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device-id = <4>;
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reg = <11a60 20 8300 100>;
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current-speed = <1c200>;
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interrupts = <2b 2>;
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interrupt-parent = <&Cpm_pic>;
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clock-setup = <1b ffffff00>;
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rx-clock = <4>;
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tx-clock = <4>;
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};
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clock-setup = <1b ffffff00>;
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rx-clock = <4>;
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tx-clock = <4>;
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};
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};
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};
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cpm_pic:interrupt-controller@10c00 {
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#address-cells = <0>;
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#interrupt-cells = <2>;
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interrupt-controller;
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reg = <10c00 80>;
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built-in;
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device_type = "cpm-pic";
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compatible = "CPM2";
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};
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pci@0500 {
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#interrupt-cells = <1>;
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#size-cells = <2>;
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#address-cells = <3>;
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compatible = "8272";
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device_type = "pci";
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reg = <10430 4dc>;
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clock-frequency = <3f940aa>;
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interrupt-map-mask = <f800 0 0 7>;
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interrupt-map = <
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cpm_pic:interrupt-controller@10c00 {
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#address-cells = <0>;
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#interrupt-cells = <2>;
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interrupt-controller;
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reg = <10c00 80>;
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built-in;
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device_type = "cpm-pic";
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compatible = "CPM2";
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};
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/* IDSEL 0x16 */
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b000 0 0 1 f8200000 40 8
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b000 0 0 2 f8200000 41 8
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b000 0 0 3 f8200000 42 8
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b000 0 0 4 f8200000 43 8
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pci@0500 {
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#interrupt-cells = <1>;
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#size-cells = <2>;
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#address-cells = <3>;
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compatible = "8272";
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device_type = "pci";
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reg = <10430 4dc>;
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clock-frequency = <3f940aa>;
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interrupt-map-mask = <f800 0 0 7>;
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interrupt-map = <
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/* IDSEL 0x16 */
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b000 0 0 1 f8200000 40 8
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b000 0 0 2 f8200000 41 8
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b000 0 0 3 f8200000 42 8
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b000 0 0 4 f8200000 43 8
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/* IDSEL 0x17 */
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b800 0 0 1 f8200000 43 8
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b800 0 0 2 f8200000 40 8
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b800 0 0 3 f8200000 41 8
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b800 0 0 4 f8200000 42 8
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/* IDSEL 0x17 */
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b800 0 0 1 f8200000 43 8
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b800 0 0 2 f8200000 40 8
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b800 0 0 3 f8200000 41 8
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b800 0 0 4 f8200000 42 8
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/* IDSEL 0x18 */
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c000 0 0 1 f8200000 42 8
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c000 0 0 2 f8200000 43 8
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c000 0 0 3 f8200000 40 8
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c000 0 0 4 f8200000 41 8>;
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/* IDSEL 0x18 */
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c000 0 0 1 f8200000 42 8
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c000 0 0 2 f8200000 43 8
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c000 0 0 3 f8200000 40 8
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c000 0 0 4 f8200000 41 8>;
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interrupt-parent = <&Cpm_pic>;
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interrupts = <14 8>;
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bus-range = <0 0>;
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ranges = <02000000 0 80000000 80000000 0 40000000
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01000000 0 00000000 f6000000 0 02000000>;
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};
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interrupts = <14 8>;
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bus-range = <0 0>;
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ranges = <02000000 0 80000000 80000000 0 40000000
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01000000 0 00000000 f6000000 0 02000000>;
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};
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/* May need to remove if on a part without crypto engine */
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crypto@30000 {
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device_type = "crypto";
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model = "SEC2";
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compatible = "talitos";
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reg = <30000 10000>;
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interrupts = <b 2>;
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crypto@30000 {
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device_type = "crypto";
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model = "SEC2";
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compatible = "talitos";
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reg = <30000 10000>;
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interrupts = <b 2>;
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interrupt-parent = <&Cpm_pic>;
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num-channels = <4>;
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channel-fifo-len = <18>;
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exec-units-mask = <0000007e>;
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num-channels = <4>;
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channel-fifo-len = <18>;
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exec-units-mask = <0000007e>;
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/* desc mask is for rev1.x, we need runtime fixup for >=2.x */
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descriptor-types-mask = <01010ebf>;
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};
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};
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descriptor-types-mask = <01010ebf>;
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};
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};
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};
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@ -272,7 +272,7 @@ void do_IRQ(struct pt_regs *regs)
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struct thread_info *curtp, *irqtp;
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#endif
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irq_enter();
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irq_enter();
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#ifdef CONFIG_DEBUG_STACKOVERFLOW
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/* Debugging check for stack overflow: is there less than 2KB free? */
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@ -321,7 +321,7 @@ void do_IRQ(struct pt_regs *regs)
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/* That's not SMP safe ... but who cares ? */
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ppc_spurious_interrupts++;
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irq_exit();
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irq_exit();
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set_irq_regs(old_regs);
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#ifdef CONFIG_PPC_ISERIES
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@ -89,24 +89,24 @@ init_internal_rtc(void)
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static int __init get_freq(char *name, unsigned long *val)
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{
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struct device_node *cpu;
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const unsigned int *fp;
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int found = 0;
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struct device_node *cpu;
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const unsigned int *fp;
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int found = 0;
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/* The cpu node should have timebase and clock frequency properties */
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cpu = of_find_node_by_type(NULL, "cpu");
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/* The cpu node should have timebase and clock frequency properties */
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cpu = of_find_node_by_type(NULL, "cpu");
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if (cpu) {
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fp = of_get_property(cpu, name, NULL);
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if (fp) {
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found = 1;
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*val = *fp;
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}
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if (cpu) {
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fp = of_get_property(cpu, name, NULL);
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if (fp) {
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found = 1;
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*val = *fp;
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}
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of_node_put(cpu);
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}
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of_node_put(cpu);
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}
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return found;
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return found;
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}
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/* The decrementer counts at the system (internal) clock frequency divided by
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@ -122,7 +122,7 @@ void __init mpc8xx_calibrate_decr(void)
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sit8xx_t *sys_tmr2;
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int irq, virq;
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clk_r1 = (cark8xx_t *) immr_map(im_clkrstk);
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clk_r1 = (cark8xx_t *) immr_map(im_clkrstk);
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/* Unlock the SCCR. */
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out_be32(&clk_r1->cark_sccrk, ~KAPWR_KEY);
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@ -130,24 +130,24 @@ void __init mpc8xx_calibrate_decr(void)
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immr_unmap(clk_r1);
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/* Force all 8xx processors to use divide by 16 processor clock. */
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clk_r2 = (car8xx_t *) immr_map(im_clkrst);
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clk_r2 = (car8xx_t *) immr_map(im_clkrst);
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setbits32(&clk_r2->car_sccr, 0x02000000);
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immr_unmap(clk_r2);
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/* Processor frequency is MHz.
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*/
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ppc_tb_freq = 50000000;
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if (!get_freq("bus-frequency", &ppc_tb_freq)) {
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printk(KERN_ERR "WARNING: Estimating decrementer frequency "
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"(not found)\n");
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}
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ppc_tb_freq /= 16;
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ppc_proc_freq = 50000000;
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if (!get_freq("clock-frequency", &ppc_proc_freq))
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printk(KERN_ERR "WARNING: Estimating processor frequency"
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"(not found)\n");
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ppc_tb_freq = 50000000;
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if (!get_freq("bus-frequency", &ppc_tb_freq)) {
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printk(KERN_ERR "WARNING: Estimating decrementer frequency "
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"(not found)\n");
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}
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ppc_tb_freq /= 16;
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ppc_proc_freq = 50000000;
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if (!get_freq("clock-frequency", &ppc_proc_freq))
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printk(KERN_ERR "WARNING: Estimating processor frequency"
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"(not found)\n");
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printk("Decrementer Frequency = 0x%lx\n", ppc_tb_freq);
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printk("Decrementer Frequency = 0x%lx\n", ppc_tb_freq);
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/* Perform some more timer/timebase initialization. This used
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* to be done elsewhere, but other changes caused it to get
|
||||
@ -164,7 +164,7 @@ void __init mpc8xx_calibrate_decr(void)
|
||||
* we guarantee the registers are locked, then we unlock them
|
||||
* for our use.
|
||||
*/
|
||||
sys_tmr1 = (sitk8xx_t *) immr_map(im_sitk);
|
||||
sys_tmr1 = (sitk8xx_t *) immr_map(im_sitk);
|
||||
out_be32(&sys_tmr1->sitk_tbscrk, ~KAPWR_KEY);
|
||||
out_be32(&sys_tmr1->sitk_rtcsck, ~KAPWR_KEY);
|
||||
out_be32(&sys_tmr1->sitk_tbk, ~KAPWR_KEY);
|
||||
@ -180,8 +180,8 @@ void __init mpc8xx_calibrate_decr(void)
|
||||
* we have to enable the timebase). The decrementer interrupt
|
||||
* is wired into the vector table, nothing to do here for that.
|
||||
*/
|
||||
cpu = of_find_node_by_type(NULL, "cpu");
|
||||
virq= irq_of_parse_and_map(cpu, 0);
|
||||
cpu = of_find_node_by_type(NULL, "cpu");
|
||||
virq= irq_of_parse_and_map(cpu, 0);
|
||||
irq = irq_map[virq].hwirq;
|
||||
|
||||
sys_tmr2 = (sit8xx_t *) immr_map(im_sit);
|
||||
@ -211,10 +211,10 @@ int mpc8xx_set_rtc_time(struct rtc_time *tm)
|
||||
sit8xx_t *sys_tmr2;
|
||||
int time;
|
||||
|
||||
sys_tmr1 = (sitk8xx_t *) immr_map(im_sitk);
|
||||
sys_tmr1 = (sitk8xx_t *) immr_map(im_sitk);
|
||||
sys_tmr2 = (sit8xx_t *) immr_map(im_sit);
|
||||
time = mktime(tm->tm_year+1900, tm->tm_mon+1, tm->tm_mday,
|
||||
tm->tm_hour, tm->tm_min, tm->tm_sec);
|
||||
tm->tm_hour, tm->tm_min, tm->tm_sec);
|
||||
|
||||
out_be32(&sys_tmr1->sitk_rtck, KAPWR_KEY);
|
||||
out_be32(&sys_tmr2->sit_rtc, time);
|
||||
@ -233,8 +233,8 @@ void mpc8xx_get_rtc_time(struct rtc_time *tm)
|
||||
/* Get time from the RTC. */
|
||||
data = in_be32(&sys_tmr->sit_rtc);
|
||||
to_tm(data, tm);
|
||||
tm->tm_year -= 1900;
|
||||
tm->tm_mon -= 1;
|
||||
tm->tm_year -= 1900;
|
||||
tm->tm_mon -= 1;
|
||||
immr_unmap(sys_tmr);
|
||||
return;
|
||||
}
|
||||
@ -298,7 +298,7 @@ void __init m8xx_pic_init(void)
|
||||
int irq;
|
||||
|
||||
if (mpc8xx_pic_init()) {
|
||||
printk(KERN_ERR "Failed interrupt 8xx controller initialization\n");
|
||||
printk(KERN_ERR "Failed interrupt 8xx controller initialization\n");
|
||||
return;
|
||||
}
|
||||
|
||||
|
||||
@ -45,10 +45,10 @@
|
||||
#define CPM_MAP_SIZE (0x4000)
|
||||
|
||||
static void m8xx_cpm_dpinit(void);
|
||||
static uint host_buffer; /* One page of host buffer */
|
||||
static uint host_end; /* end + 1 */
|
||||
cpm8xx_t *cpmp; /* Pointer to comm processor space */
|
||||
cpic8xx_t *cpic_reg;
|
||||
static uint host_buffer; /* One page of host buffer */
|
||||
static uint host_end; /* end + 1 */
|
||||
cpm8xx_t *cpmp; /* Pointer to comm processor space */
|
||||
cpic8xx_t *cpic_reg;
|
||||
|
||||
static struct device_node *cpm_pic_node;
|
||||
static struct irq_host *cpm_pic_host;
|
||||
@ -115,7 +115,7 @@ static int cpm_pic_host_map(struct irq_host *h, unsigned int virq,
|
||||
* and return. This is a no-op function so we don't need any special
|
||||
* tests in the interrupt handler.
|
||||
*/
|
||||
static irqreturn_t cpm_error_interrupt(int irq, void *dev)
|
||||
static irqreturn_t cpm_error_interrupt(int irq, void *dev)
|
||||
{
|
||||
return IRQ_HANDLED;
|
||||
}
|
||||
@ -181,7 +181,7 @@ unsigned int cpm_pic_init(void)
|
||||
printk(KERN_ERR "CPM PIC init: can not find cpm node\n");
|
||||
goto end;
|
||||
}
|
||||
eirq= irq_of_parse_and_map(np, 0);
|
||||
eirq = irq_of_parse_and_map(np, 0);
|
||||
if (eirq == NO_IRQ)
|
||||
goto end;
|
||||
|
||||
@ -197,15 +197,15 @@ end:
|
||||
|
||||
void cpm_reset(void)
|
||||
{
|
||||
cpm8xx_t *commproc;
|
||||
sysconf8xx_t *siu_conf;
|
||||
cpm8xx_t *commproc;
|
||||
sysconf8xx_t *siu_conf;
|
||||
|
||||
commproc = (cpm8xx_t *)ioremap(CPM_MAP_ADDR, CPM_MAP_SIZE);
|
||||
|
||||
#ifdef CONFIG_UCODE_PATCH
|
||||
/* Perform a reset.
|
||||
*/
|
||||
out_be16(&commproc->cp_cpcr, CPM_CR_RST | CPM_CR_FLG);
|
||||
out_be16(&commproc->cp_cpcr, CPM_CR_RST | CPM_CR_FLG);
|
||||
|
||||
/* Wait for it.
|
||||
*/
|
||||
@ -307,7 +307,7 @@ static rh_block_t cpm_boot_dpmem_rh_block[16];
|
||||
static rh_info_t cpm_dpmem_info;
|
||||
|
||||
#define CPM_DPMEM_ALIGNMENT 8
|
||||
static u8* dpram_vbase;
|
||||
static u8 *dpram_vbase;
|
||||
static uint dpram_pbase;
|
||||
|
||||
void m8xx_cpm_dpinit(void)
|
||||
|
||||
@ -201,7 +201,7 @@ int cpm2_clk_setup(enum cpm_clk_target target, int clock, int mode)
|
||||
}
|
||||
|
||||
if (mode == CPM_CLK_RX)
|
||||
shift +=3;
|
||||
shift += 3;
|
||||
|
||||
for (i=0; i<24; i++) {
|
||||
if (clk_map[i][0] == target && clk_map[i][1] == clock) {
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user